DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claims 1, 2, 4-13, and 15-20 is/are rejected under 35 U.S.C. 103 as being unpatentable Hammes et al., and Breakstone, and Jreji et al., and in further view of Chou et al., all previously sited in IDS by Applicant.
As per claim 1, Hammes teaches a first device (21, Fig. 3), comprising: an interface (serial interface, 23) to connect to a second device (22, Fig. 3) via a connector (serial interface, 24); and a mode component (part of first device’s circuit, col. 4, lines 45-50) to receive from the second device a signal (“wake-up”), the second device configured to send the signal (col. 4, lines 45-50), wherein the first device is configured to during boot in booting from a power off state, change from enter a first mode of operation [to] or a second mode of operation based at least in part on the signal (col. 4, lines 51-58), the first mode of operation associated with a first product data (data packet, col. 3, lines 36-41, clock, operating, or voltage “product”) of the second device and the second mode of operation associated with a second product data (another data packet, col. 3, lines 36-41) of the second device.
Hammes teaches a system having a first and second device, wherein both devices have a serial interface connector between the two designed for the purpose of data interchange. Further, both devices include a type of mode component – which could be part of the serial interface connector - for enabling a first device to change from a first mode of operation to a second mode of operation as soon as a signal is sent from the second device. (Hammes, col. 1, lines 19-col. 5, lines 1-6)
Nonetheless, in an analogous art, Breakstone discloses a host device and peripheral storage device wherein a mode component (a circuit “power controller, 621) is used to further configure a device (storage device, 610, Fig.6) to change from a first mode of operation to a second mode of operation during boot in booting from a power off state, (change low power mode, such as idle modes of connected storage devices, col.20, lines 53-60) based on a product data. Breakstone discloses monitoring different ‘product data’ such as usage status or usage statistics that includes power active status, voltage levels, phase measurements, current draw, holdup circuits status or level, among other statistics. (col. 11, lines 13-44, col. 18, lines 58-col. 21, lines 1-18)
Breakstone discloses changing from a first mode of operation to a second mode of operation during a reset (low power (re)boot) because Breakstone teaches making the mode change when changing from a low power mode (boot or reboot from idle mode) to another mode.
It would have been obvious one ordinary skill in the art before the effective filling date of the claimed invention, to include Breakstone’s different ‘product data’ such as usage status or usage statistics that includes power active status, voltage levels, phase measurements, current draw, holdup circuits status or level, among other statistics when first device is configured to change during a reset - low power (re)boot) from a first mode of operation to a second mode of operation with Hammes. Doing so would simplify the power management features to enhanced data communication operations during power interruptions in connected storage devices based on different ‘product data’ such as usage status or usage statistics that includes power active status, voltage levels, phase measurements, current draw, holdup circuits status or level, among other statistics in order to control a first or second mode operation of connected storages devices. (Breakstone, col. 2, lines 54-col. 3, lines 1-3)
Nonetheless, Hammes-Breakstone does not expressly teach changing “from a first mode of operation to a second mode of operation during boot in booting from a power off state.”
Jreji discloses circuitry via the configured to (“CPU 101 is coupled to service processor 102”, [0021], see Fig. 1) select a first mode of operation {“ monitor the state [MODE] of an IHS”, [0019]} to a second mode of operation during boot in booting from a power off state.”{“ solid state hybrid drives (SSHD) combine the features of SSDs and HDDs”, [0018], the first signal received via the connector of the first device (signals via connector as claimed “via several interface and to an array of PCIe SSDs 105”, see Fig. 1, [0021]; a second mode of operation based {“determine the source of NVMe power management”, see Fig. 2 [0027]} at least in part on a second signal from the component {“ polling and/or receiving events about PCIe SSD 105 usage, see Fig. 2 [0028] }, the second signal received via the connector {“ metrics data received from other sources within an IHS”, see Fig. 2 [0028]}; configure the device to use the first mode of operation {‘ any change from PCIe/CPU/Memory usage data or statistics”, [0029]} based at least in part on selection of the first mode of operation by the circuit {“whether there has been any change from an application profile monitoring from the ISM, or whether any adjustments are needed”, [0029] {‘“the result may be mapped to a power control value [in the respective first or second mode] or limit either directly or via a look-up table”, [0028]}.
Jreji discloses“ polling and/or receiving events about PCIe SSD 105 usage, see Fig. 2 [0028],” therein it would have been obvious to one of ordinary skill that the polling for the selection of the mode operation is performed during boot up or start up.
Both Jreji and Hammes-Breakstone are analogous because they are from the same field of endeavor, managing peripheral devices. At the time of the invention, it would have been obvious to one of ordinary skill in the art, having the teachings of Jreji and Hammes-Breakstone before him or her, to modify incorporating Jreji’s “managing power to NVMe devices 105” (see Fig. 2, [0028]) and “ polling and/or receiving events about PCIe SSD 105 usage, see Fig. 2 [0028], during start up.
The suggestion/motivation for doing so would have been to incorporate developed systems and methods for smartly managing the mode selection and power management to include Jreji’s storage device that is configured to change between ‘modes’ during a Hot Plug booting from a power off state with Hammes-Breakstone.
It would have been obvious one ordinary skill in the art before the effective filling date of the claimed invention, to include Jreji’s storage device that is configured to change between ‘modes’ during a Hot Plug booting from a power off state with Hammes-Breakstone. Doing so would simplify the power management features to enhanced data communication operations and further it will be apparent to those skilled in the art that various modifications and variations can be made to the structure of the present invention without departing from the scope or spirit of the invention. (Chou, Abstract, [0065-0067])
Nonetheless, Hammes-Breakstone-Jreji does not expressly disclose the host system may then apply the power to a connector and activate the mode signal. Chou discloses a first device (multi-mode device system 600, through an ExpressCard plug a type of storage device configured to operate in a first mode and second mode – Fig. 14, [0070-0071]). Chou teaches when the storage device (ExpressCard) is ‘Hot Plugged’ is further configured to operate in a mode that is based on a status of a signal at a pin received from a host device, 630, whereas the changing from a first mode of operation to a second mode of operation is performed when the storage device is booted from a power off state. Chou specifically teaches “…In order to hot plug a first portion 710 using the PCI Express interface 650, a host system chipset must have the ability to handle several software requests including selectively asserting and deasserting the PCI RST# signal to the connector 690. In addition, the host system chipset must be able to selectively isolate the first portion 710 from the logic on the host system board, and selectively remove or apply power to the card connector. To hot plug the first portion 710 into host system 720 using the PCI Express interface 650, a user may inform a Hot Plug Service utility that the first portion 710 will be installed in connector 690. The host system 720 may command its chipset to set an LED in the host system (not shown) to indicate that the first portion may be safely inserted in the connector 690. The user may the insert the first portion 710 in connector 690. The host system 720 normally will detect that the first portion 710 is already inserted and may then turn off the LED to indicate that the first portion 710 must remain inserted in the connector 690. The host system may then apply the power to the connector 690 and activate the RST# signal. The isolation logic may then be turned off between the connector 690 and a first portion bus. (Chou, [0065-0067, 0080-0081])
It would have been obvious one ordinary skill in the art before the effective filling date of the claimed invention, to include Chou’s storage device that is configured to change between ‘modes’ during a Hot Plug booting from a power off state with Hammes-Breakstone- Jreji. Doing so would simplify the power management features to enhanced data communication operations and further it will be apparent to those skilled in the art that various modifications and variations can be made to the structure of the present invention without departing from the scope or spirit of the invention. (Chou, Abstract, [0065-0067])
As per claim 2, Hammes-Breakstone-Jreji-Chou teaches wherein the first device includes at least one Solid State Drive (SSD). (Breakstone, col. 3, lines 14-30, col. 6, lines 22-28, col. 9, lines 16-31)
As per claim 4, Hammes-Breakstone-Jreji-Chou teaches wherein the second device is configured to send the signal based at least in part on a product data or a thermal data of the second device. (Hammes, data packet, col. 3, lines 36-41, clock, operating, or voltage “product,” Breakstone - usage status or usage statistics that includes power active status, voltage levels, phase measurements, current draw, holdup circuits status or level, among other statistics, (col. 11, lines 13-44, col. 18, lines 58-col. 21, lines 1-18)
As per claim 5, Hammes-Breakstone-Jreji-Chou does not expressly teach wherein the second device could include a Field Programmable Gate Array (FPGA). Nonetheless, Breakstone discloses wherein processor 620 could comprise a FPGA and depending upon switching between first and second modes it would not be out of Breakstone’s inventive concept to implement such a well-known processing device. Thereby, implementing an FPGA in a first or second device would be obvious to one of ordinary skilled in the art at the time the invention was filed.
As per claim 6, Hammes-Breakstone-Jreji-Chou teaches wherein the mode component includes a (PCIe) controller device to communicate with the second device using the connector. (Breakstone, col. 2, lines 54-col. 21, lines 1-18)
As per claim 7, Hammes teaches wherein the connector includes at least one pin to receive the signal from the second device. (Hammes, col. 1, lines 19-col. 5, lines 1-6)
As per claim 8, Hammes-Breakstone-Jreji-Chou does not expressly teach wherein the connector includes at least one General Purpose Input/Output (GPIO) pin to receive the signal from the second device, the at least one GPIO pin latched after receiving the signal from the second device. However, Breakstone teaches utilizing a U.2 type connector that carries PCI or NVMe signaling, including combinations and variations thereof. Further, it is well known in the art these pins may be, for example, GPIO pins in U.2 connector, not otherwise used, can carry signals and/or power over signal host connectors. (Breakstone, col. 6, lines 35-46) Therein, U.2 type connector that utilize a GPIO is well known in the art, therein, making use of the GPIO pin for signal connection would be to out of Breakstone inventive concept as well as well-known at the time the invention was filed.
As per claim 9, Hammes-Breakstone-Chou, wherein the first device includes a Non-Volatile Memory Express (NVMe) device. (Breakstone, col. 3, lines 14-30)
As per claim 10, Breakstone teaches wherein the interface includes a Peripheral Component Interconnect Express (PCIe) interface. (Breakstone, col. 3, lines 14-30, col. 6, lines 22-28, col. 9,lines 16-31)
As per claim 11, Breakstone teaches wherein the connector includes an M.2 connector. (Breakstone, col. 3, lines 14-30-col. 4, lines 1-10, col. 6, lines 22-28, col. 9, lines 16-31)
As per claims 12, 13, and 15-20, the method claim is also rejection under the same rational for claims 1, 2, and 4-11 above. Specifically, to claims 13 and 15-17, the functionality corresponds to the device apparatus of claims 2, 4-11 as it relates to an interface connector between the first and second device and receiving a signal from said corresponding interface connector.
Conclusion
The examiner requests, in response to this office action, support be shown for language added to any original claims on amendment and any new claims. That is, indicate support for newly added claim language by specifically pointing to page(s) and line number(s) in the specification and/or drawing figure(s). This will assist the examiner in prosecuting the application. When responding to this office action, applicant is advised to clearly point out the patentable novelty which he or she thinks the claims present, in view of the state of art disclosed by the references cited or the objections made. He or she must also show how the amendments avoid such references or objections. See 37 C.F.R.I .Hi(c). In amending in reply to a rejection of claims in an application or patent under reexamination, the applicant or patent owner must clearly point out the patentable novelty which he or she thinks the claims present in view the state of the art disclosed by the references cited or the objections made. The applicant or patent owner must also show how the amendments avoid such references or objections. Any inquiry concerning this communication or earlier communications from the examiner should be directed to Tammara Peyton whose telephone number is (571) 272-4157. The examiner can normally be reached between 8:30- 6:00 from Monday to Thursday, (I am off every first Friday), and 7:30- 4:00 every second Friday. If attempts to reach the examiner by telephone are unsuccessful, the examiner's supervisor Henry Tsai can be reached on (571)272-4176. The fax phone number for the organization where this application or proceeding is assigned is (571) 273-8300. Any inquiry of a general nature of relating to the status of this application should be directed to the Group receptionist whose telephone number is (571) 272- 2100.
/TAMMARA R PEYTON/Primary Examiner, Art Unit 2184 May 30, 2026
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