Prosecution Insights
Last updated: April 19, 2026
Application No. 18/076,120

REMOVING CORE MEMORY ACCESSES IN HASH TABLE LOOKUPS USING AN ACCELERATOR DEVICE

Non-Final OA §102§112
Filed
Dec 06, 2022
Examiner
PATEL, KAUSHIKKUMAR M
Art Unit
2138
Tech Center
2100 — Computer Architecture & Software
Assignee
Intel Corporation
OA Round
1 (Non-Final)
82%
Grant Probability
Favorable
1-2
OA Rounds
2y 10m
To Grant
82%
With Interview

Examiner Intelligence

Grants 82% — above average
82%
Career Allow Rate
615 granted / 753 resolved
+26.7% vs TC avg
Minimal +0% lift
Without
With
+0.2%
Interview Lift
resolved cases with interview
Typical timeline
2y 10m
Avg Prosecution
11 currently pending
Career history
764
Total Applications
across all art units

Statute-Specific Performance

§101
6.0%
-34.0% vs TC avg
§103
51.4%
+11.4% vs TC avg
§102
14.6%
-25.4% vs TC avg
§112
15.0%
-25.0% vs TC avg
Black line = Tech Center average estimate • Based on career data from 753 resolved cases

Office Action

§102 §112
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Rejections - 35 USC § 112 The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph: The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention. Claims 1, 3, 5-11, 14-17 and 20 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being incomplete for omitting essential elements/steps, such omission amounting to a gap between the elements. See MPEP § 2172.01. The omitted elements for claims 1, 8 and 15 are: “wherein the instruction is to comprise a key comparison operation, wherein the circuitry is to generate the descriptor based on a determination that the key comparison operation results in a match in a hash table”. According to specification, the accelerator/processor generates the descriptor based on the key comparison instruction when compared against the hash table results in the match. Therefore, prior to generating descriptor, the essential step of receiving the instruction indicating key comparison operation and matching against the hash table is required. The claims depending the rejected claims fail to cure the deficiency of the rejected parent claims and therefore rejected under same rationales as applied to parent independent claims. Claim 3 recites the limitation “detect a fence flag associated with the instruction, wherein the descriptor is generated based on the detection of the fence flag”. However, according to current disclosure, the descriptor comprise a comparison descriptor, a fence flag and a copy descriptor. Thus, the limitation “detect a fence flag associated with the instruction and generating descriptor is indefinite. Claim 7 recites the limitation “refrain from processing another descriptor associated with the instruction based on the generation of the descriptor”. Claim 7 depends from claim 1 and claim 1 recite generating only one descriptor and therefore the limitation “another descriptor” is indefinite. Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claims 1, 2, 4, 8, 14, 15 and 20 are rejected under 35 U.S.C. 102(a)(1)/(a)(2) as being anticipated by Wang et al. (US 2019/0102346). As per claim 1, Wang teaches an apparatus (Wang: claim 1), comprising: a processor (Wang: par. [0033]); and an accelerator device to comprise circuitry (Wang: par. [0022[: “The lookup engine can be used to accelerate flow classification lookup”; par. [0036]: “Queries from the same core could be dispatched to different accelerators to exploit the parallelism”) to: generate a descriptor based on an instruction received from the processor, wherein the instruction is to be processed by the accelerator device; and process the descriptor (Wang: par. [0047]: “the instruction query from command queue 502 is provided to scoreboard 506 and scoreboard 506 generates at least several actions in sequence. First, based on the key address passed by the instruction, scoreboard 506 generates a data request to fetch the key from an LLC slice. Second, after the key has been returned, hash 508-A or B performs a hashing operation for the key and calculates the indexes of the buckets. Third, scoreboard 506 generates a request for contents of the buckets. Fourth, a comparator 510-A or B compares the signature in each entry of the primary bucket to find a match”; par. [0048]: “Scoreboard 506 can orchestrate operation of lookup engine 500”; taught as the lookup engine/scoreboard receives the query instruction and generates several actions (e.g., descriptors) and process the instructions of retrieving index of hash bucket, obtaining key and compare signatures). As per claim 2, Wang teaches wherein the instruction is to comprise a key comparison operation, wherein the circuitry is to generate the descriptor based on a determination that the key comparison operation results in a match (Wang: par. [0031]: “A bucket can be associated with several entries, where an entry has a signature and a pointer to the key-data pair. In this example of hash table lookup procedure, a provided key is hashed to retrieve an index of a corresponding bucket in the table…Hashed keys that match a signature in a bucket lead to retrieval of the associated key-data pointer pairs”; taught as a key is hashed to retrieve an index of a bucket, means if the key index matches the bucket, then the keys from the bucket are obtained for the comparison). As per claim 4, Wang teaches wherein the key comparison operation is based on a first memory address specified in the instruction and a memory address of an entry of a hash table (Wang: par. [0031]: “Hashed keys that match a signature in a bucket lead to retrieval of the associated key-data pointer pairs. The key portion of the key-data pointer pair is compared against the key from the query. If there is a match, the data pointer can be used to retrieve the data that is requested”; fig. 1, pointer and data pointer). As per claims 8 and 15, Wang teaches a non-transitory computer-readable storage medium including instructions that when executed by circuitry of a processor (Wang: par. [0090])/an apparatus, comprising an accelerator device (Wang: pars. [0022], [0036]), cause the processor to: generate a plurality of batch descriptors, each batch descriptor associated with a lookup in a hash table, each batch descriptor to comprise a respective plurality of descriptors; and transmit the plurality of batch descriptors to an accelerator coupled to the processor to cause the accelerator to process the lookups in the hash table in parallel (Wang: par. [0022[: “The lookup engine can be used to accelerate flow classification lookup”; par. [0036]: “Queries from the same core could be dispatched to different accelerators to exploit the parallelism”; par. [0047]: “the instruction query from command queue 502 is provided to scoreboard 506 and scoreboard 506 generates at least several actions in sequence. First, based on the key address passed by the instruction, scoreboard 506 generates a data request to fetch the key from an LLC slice. Second, after the key has been returned, hash 508-A or B performs a hashing operation for the key and calculates the indexes of the buckets. Third, scoreboard 506 generates a request for contents of the buckets. Fourth, a comparator 510-A or B compares the signature in each entry of the primary bucket to find a match”; par. [0048]: “Scoreboard 506 can orchestrate operation of lookup engine 500”; taught as the lookup engine/scoreboard receives the query instruction and generates several actions (e.g., descriptors) and process the instructions of retrieving index of hash bucket, obtaining key and compare signatures). As per claims 14 and 20, Wang teaches receive, from the accelerator based on a hit for an input key in the hash table, a value address associated with a value in the hash table; and access the value based on the value address (Wang: par. [0031]: “Hashed keys that match a signature in a bucket lead to retrieval of the associated key-data pointer pairs. The key portion of the key-data pointer pair is compared against the key from the query. If there is a match, the data pointer can be used to retrieve the data that is requested”). Allowable Subject Matter Claims 5, 6, 9-13 and 16-19 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims as well as overcoming 35 USC 112(b) rejection of the claims noted above. Any comments considered necessary by applicant must be submitted no later than the payment of the issue fee and, to avoid processing delays, should preferably accompany the issue fee. Such submissions should be clearly labeled “Comments on Statement of Reasons for Allowance.” Conclusion The examiner also requests, in response to this Office action, support be shown for language added to any original claims on amendment and any new claims. That is, indicate support for newly added claim language by specifically pointing to page(s) and line no(s) in the specification and/or drawing figure(s). This will assist the examiner in prosecuting the application. 37 C.F.R. § 1.75(d) (1) requires such support in the Specification for any new language added to the claims and 37 C.F.R. § 1.83(a) requires support be found in the Drawings for all claimed features. When responding to this office action, Applicant is advised to clearly point out the patentable novelty which he or she thinks the claims present, in view of the state of the art disclosed by the references cited or the objections made. He or she must also show how the amendments avoid such references or objections See 37 CFR 1.111(c). Examiner has cited particular columns and line numbers in the references as applied to the claims above for the convenience of the applicant. Although the specified citations are representative of the teachings in the art and are applied to the specific limitations within the individual claim, other passages and figures may apply as well. It is respectfully requested from the applicant, in preparing the responses, to fully consider the references in entirety as potentially teaching all or part of the claimed invention, as well as the context of the passage as taught by the prior art or disclosed by the examiner. The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Dai et al. (US 2024/0012811) teaches a method of processing query comprising key with PIM device. Jiang et al. (US 2023/0394082) teaches a hash table system for comparing keys to the hash table. Matthews et al. (US 10,795,873) teaches a system performing hash based operations. Vemulapalli et al. (US 2020/0226099) teaches a hash table that reduces a number DMA operations during table traverse. Any inquiry concerning this communication or earlier communications from the examiner should be directed to KAUSHIKKUMAR M PATEL whose telephone number is (571)272-5536. The examiner can normally be reached Mon-Fri: 9:00 AM - 5:30 PM. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Tim T Vo can be reached at 571-272-3642. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. Kaushikkumar M. Patel Primary Examiner Art Unit 2138 /Kaushikkumar M Patel/Primary Examiner, Art Unit 2138
Read full office action

Prosecution Timeline

Dec 06, 2022
Application Filed
Jan 05, 2023
Response after Non-Final Action
Feb 05, 2026
Non-Final Rejection — §102, §112 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
82%
Grant Probability
82%
With Interview (+0.2%)
2y 10m
Median Time to Grant
Low
PTA Risk
Based on 753 resolved cases by this examiner. Grant probability derived from career allow rate.

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