Prosecution Insights
Last updated: October 01, 2026
Application No. 18/077,385

Automatic USB3 Hub for Detecting and Changing Link Speed

Non-Final OA §103
Filed
Dec 08, 2022
Priority
Mar 11, 2022 — provisional 63/319,002
Examiner
HUYNH, KIM T
Art Unit
2184
Tech Center
2100 — Computer Architecture & Software
Assignee
Microchip Technology Incorporated
OA Round
5 (Non-Final)
83%
Grant Probability
Favorable
5-6
OA Rounds
0m
Est. Remaining
90%
With Interview

Examiner Intelligence

Grants 83% — above average
83%
Career Allowance Rate
592 granted / 717 resolved
+27.6% vs TC avg
Moderate +7% lift
Without
With
+7.2%
Interview Lift
resolved cases with interview
Typical timeline
2y 8m
Avg Prosecution
20 currently pending
Career history
741
Total Applications
across all art units

Statute-Specific Performance

§101
3.4%
-36.6% vs TC avg
§103
50.1%
+10.1% vs TC avg
§102
32.1%
-7.9% vs TC avg
§112
3.5%
-36.5% vs TC avg
Black line = Tech Center average estimate • Based on career data from 717 resolved cases

Office Action

§103
Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Rejections - 35 USC § 103 1. In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. 2. Claims 1-5, 7-13, 15-16 are rejected under 35 U.S.C. 103 as being unpatentable over Rueger et al. (Pub. No. US2018/0217887) in view of USB specification Revision 2.0 and further in view of MANNEMALA et al. (Pub. No. US20150350957) As per claim 1, Rueger discloses a method comprising: counting errors encountered by a connection (fig.2, Fibre Channel port); comparing a number of counted errors to an error count threshold within a set time frame (paragraph 45, lines 3-4, each error counter in the set of error counters associated with the particular error code has a different associated time interval); identifying a port speed configuration for the connection (paragraph 47, line 3, monitors the selected port speed for each Fibre Channel port); and Rueger discloses all the limitations as the above but does not explicitly disclose counting errors encountered by a USB connection. However, USB specification Revision 2.0 discloses this (page 19, 4.5.2 Error Handling-The protocol allows for error handling in hardware or software. Hardware error handling includes reporting and retry of failed transfers. A USB Host Controller will try a transmission that encounters errors up to three times before informing the client software of the failure. The client software can recover in an implementation-specific way.) It would have been obvious to one with ordinary skill in the art before the effective filling date of the claimed invention was made to consider the teachings of USB specification Revision 2.0 with the teaching of Rueger would be beneficial to add to USB instead of simply stopping if three errors are found. So as to yield the predicatable result so as to control efficiently, thus enhance the system performance. Rueger in view of USB specification Revision 2.0 of disclose all the limitations as the above but does not explicitly disclose changing the port speed configuration for the USB connection to a slower port speed configuration than the identified port speed configuration. However, MANNEMALA discloses this. (paragraphs 40-41, performs convergence transmissions that may be more finely granular changes to the data rate between an acceptable rate and an unacceptable rate (e.g., the sixth fallback rate 370 and the seventh fallback rate 380 in this example)) It would have been obvious to one with ordinary skill in the art before the effective filling date of the claimed invention was made to consider the teachings of MANNEMALA with the teaching of Rueger in view of USB specification Revision 2.0 so as to yield the predicatable result so as to control efficiently, thus enhance the system performance. As per claim 9, Rueger discloses an apparatus comprising: a connection detector circuit (fig.3, error log area engine 310), wherein the connection detector circuit counts errors encountered (paragraph 47, Error log area engine 310 monitors the selected port speed for each Fibre Channel port 316) by a connection(fig.2, USB and other ports), wherein the connection detector circuit compares a number of counted errors to an error count threshold within a set time frame(paragraph 45, lines 3-4, each error counter in the set of error counters associated with the particular error code has a different associated time interval), wherein the connection detector circuit identifies a port speed configuration for the connection(paragraph 47, line 3, monitors the selected port speed for each Fibre Channel port); and Rueger discloses all the limitations as the above but does not explicitly disclose counting errors encountered by a USB connection. However, USB specification Revision 2.0 discloses this (page 19, 4.5.2 Error Handling-The protocol allows for error handling in hardware or software. Hardware error handling includes reporting and retry of failed transfers. A USB Host Controller will try a transmission that encounters errors up to three times before informing the client software of the failure. The client software can recover in an implementation-specific way.) It would have been obvious to one with ordinary skill in the art before the effective filling date of the claimed invention was made to consider the teachings of USB specification Revision 2.0 with the teaching of Rueger would be beneficial to add to USB instead of simply stopping if three errors are found. So as to yield the predicatable result so as to control efficiently, thus enhance the system performance. Rueger in view of USB specification Revision 2.0 of disclose all the limitations as the above but does not explicitly disclose changing the port speed configuration for the USB connection to a slower port speed configuration than the identified port speed configuration. However, MANNEMALA discloses this. (paragraphs 40-41, performs convergence transmissions that may be more finely granular changes to the data rate between an acceptable rate and an unacceptable rate (e.g., the sixth fallback rate 370 and the seventh fallback rate 380 in this example)) It would have been obvious to one with ordinary skill in the art before the effective filling date of the claimed invention was made to consider the teachings of MANNEMALA with the teaching of Rueger in view of USB specification Revision 2.0 so as to yield the predicatable result so as to control efficiently, thus enhance the system performance. As per claims 2 and 10, Rueger discloses wherein said counting errors comprises counting a type of error selected from: entries to link recovery, warm resets received, retries detected, and link bad commands received. (paragraph 65, each time the error detection logic identifies an error associated with a particular device coupled to an associated Fibre Channel port and each set of error counters in the multiple set of error counters 318a-318n associated with the particular Fibre Channel port 316 is associated with a particular error code as further cited in paragraph 45, lines 1-2) As per claims 3 and 11, Rueger discloses wherein said counting errors comprises counting two or more types of errors selected from: entries to link recovery, warm resets received, retries detected, and link bad commands received. (paragraph 65, each time the error detection logic identifies an error associated with a particular device coupled to an associated Fibre Channel port and each set of error counters in the multiple set of error counters 318a-318n associated with the particular Fibre Channel port 316 is associated with a particular error code as further cited in paragraph 45, lines 1-2) As per claims 4 and 12, Rueger discloses wherein said comparing comprises comparing a respective number of counted errors for the two or more types of errors to a respective error count threshold for the two or more types of errors. (paragraph 67, monitors each error log area and each error counter in the set of error counters associated with each Fibre Channel port in the Fibre Channel switch to determine whether a clip level in a set of clip levels has been met) As per claims 5 and 13, Rueger discloses wherein identifying a port speed configuration for the connection comprises identifying a port speed configuration selected from 10Gbps) and 5Gbps. (paragraph 70, The error data collection mechanism also automatically adjust an error log area for a SAN port according to the selected port speed, which allows faster ports to have a larger error log area to avoid running out of space in an error log area.) As per claims 7 and 15, Rueger discloses wherein changing the port speed for the connection to a slower speed comprises changing from 10Gbps to 5Gbps. (paragraph 70, The error data collection mechanism also automatically adjust an error log area for a SAN port according to the selected port speed, which allows faster ports to have a larger error log area to avoid running out of space in an error log area.) As per claims 8 and 16, Rueger discloses wherein changing the port speed for the connection to a slower speed comprises changing from 5Gbps to 480 Mbps. (paragraph 70, The error data collection mechanism also automatically adjust an error log area for a SAN port according to the selected port speed, which allows faster ports to have a larger error log area to avoid running out of space in an error log area.) 3. Claims 6, 14, 17-20 are rejected under 35 U.S.C. 103 as being unpatentable over Rueger et al. (Pub. No. US2018/0217887) in view of USB specification Revision 2.0 and further in view of MANNEMALA et al. (Pub. No. US20150350957) and further in view of Das Sharma et al. (Pub. No. US2021/0050941) As per claims 6 and 14, Rueger in view of USB specification Revision 2.0 and further in view of MANNEMALA discloses all the limitations as the above but does not explicitly disclose the method comprising determining whether the USB connection is through an upstream port or a downstream port. However, Das Sharma discloses this. (paragraph 48, Each retimer 204 and 206 can have an upstream path and a downstream path. In some implementations, a retimer can include two pseudo ports, and the pseudo ports can determine their respective downstream/upstream orientation dynamically.) It would have been obvious to one with ordinary skill in the art before the effective filling date of the claimed invention was made to consider the teachings of Das Sharma with the teaching of Rueger in view of USB specification Revision 2.0 and further in view of MANNEMALA so as to provide isolation of streams to exchange data and information, so as to yield the predicatable result so as to control efficiently, thus enhances the system performance. As per claim 17, Rueger discloses a system comprising: a connection detector circuit(fig.3, error log area engine 310), wherein the connection detector circuit counts errors encountered by either the first or second USB connection(paragraph 47, Error log area engine 310 monitors the selected port speed for each Fibre Channel port 316), wherein the connection detector circuit compares a number of counted errors to an error count threshold within a set time frame(paragraph 45, lines 3-4, each error counter in the set of error counters associated with the particular error code has a different associated time interval), wherein the connection detector circuit identifies a port speed configuration for either the first or second USB connection; (paragraph 47, line 3, monitors the selected port speed for each Fibre Channel port) and responsive to the number of counted errors being greater than the error count threshold within the set time frame. (paragraph 47, lines 4-5, error log area engine 310 adjusts the size of the dedicated error log area so that ports with a larger port speed utilize a larger error log area for logging detected errors) Rueger discloses all the limitations as the above but does not explicitly disclose counting errors encountered by a USB connection. However, USB specification Revision 2.0 discloses this (page 19, 4.5.2 Error Handling-The protocol allows for error handling in hardware or software. Hardware error handling includes reporting and retry of failed transfers. A USB Host Controller will try a transmission that encounters errors up to three times before informing the client software of the failure. The client software can recover in an implementation-specific way.) It would have been obvious to one with ordinary skill in the art before the effective filling date of the claimed invention was made to consider the teachings of USB specification Revision 2.0 with the teaching of Rueger would be beneficial to add to USB instead of simply stopping if three errors are found. So as to yield the predicatable result so as to control efficiently, thus enhance the system performance. Rueger in view of USB specification Revision 2.0 disclose all the limitations as the above but does not explicitly disclose changing the port speed configuration for the USB connection to a slower port speed configuration than the identified port speed configuration. However, MANNEMALA discloses this. (paragraphs 40-41, performs convergence transmissions that may be more finely granular changes to the data rate between an acceptable rate and an unacceptable rate (e.g., the sixth fallback rate 370 and the seventh fallback rate 380 in this example)) It would have been obvious to one with ordinary skill in the art before the effective filling date of the claimed invention was made to consider the teachings of MANNEMALA with the teaching of Rueger in view of USB specification Revision 2.0 so as to yield the predicatable result so as to control efficiently, thus enhance the system performance. Furthermore, Rueger in view of USB specification Revision 2.0 disclose all the limitations as the above but does not explicitly disclose a USB hub comprising an upstream port, at least one downstream port, and a switch in electrical communication with the upstream port and the at least one downstream port, a USB host in electrical communication with the USB hub upstream port via a first USB connection. However, Das Sharma discloses this. (fig.10, controller hub 1015 and paragraph 48, Each retimer 204 and 206 can have an upstream path and a downstream path. In some implementations, a retimer can include two pseudo ports, and the pseudo ports can determine their respective downstream/upstream orientation dynamically.) It would have been obvious to one with ordinary skill in the art before the effective filling date of the claimed invention was made to consider the teachings of Das Sharma with the teaching of Rueger in view of USB specification Revision 2.0 so as to provide isolation of streams to exchange data and information, so as to yield the predicatable result so as to control efficiently, thus enhances the system performance. As per claim 18, Das Sharma discloses wherein the USB hub comprises the connection detector circuit. (fig.5, the CRC detected error counter 504) As per claim 19, Rueger discloses wherein the USB host comprises the connection detector circuit. (fig.3, error log area engine 310) As per claim 20, Rueger discloses wherein the USB device comprises the connection detector circuit. (fig.2, switch 204) Response to Amendment 4. Applicant's amendment filed on 7/13/2026 have been fully considered but are moot in view of the new ground(s) of rejection. 5. The prior art made of record and not relied upon is considered pertinent to applicant’s disclosure. Zhou [Pub. No. US20120250567] discloses the user can select to change the port service configuration actively according to monitoring of the electric quantity or monitoring of the net speed. Conclusion 6. Any inquiry concerning this communication or earlier communications from the examiner should be directed to KIM T HUYNH whose telephone number is (571)272-3635 or via e-mail addressed to [kim.huynh3@uspto.gov]. The examiner can normally be reached on M-F 7.00AM- 4:00PM. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Tsai Henry can be reached at (571)272-4176 or via e-mail addressed to [Henry.Tsai@USPTO.GOV]. The fax phone numbers for the organization where this application or proceeding is assigned are (571)273-8300 for regular communications and After Final communications. Any inquiry of a general nature or relating to the status of this application or proceeding should be directed to the receptionist whose telephone number is (571)272-2100. Information regarding the status of an application may be obtained from the Patent Application Information Retrieval (PAIR) system. Status information for published applications may be obtained from either Private PAIR or Public PAIR. Status information for unpublished applications is available through Private PAIR only. For more information about the PAIR system, see http://pair-direct.uspto.gov. Should you have questions on access to the Private PAIR system, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative or access to the automated information system, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /K. T. H./ Examiner, Art Unit 2184 /HENRY TSAI/Supervisory Patent Examiner, Art Unit 2184
Read full office action

Prosecution Timeline

Show 5 earlier events
Oct 15, 2024
Notice of Allowance
Dec 16, 2024
Response after Non-Final Action
Dec 28, 2024
Response after Non-Final Action
May 15, 2025
Non-Final Rejection mailed — §103
Jul 18, 2025
Response Filed
May 12, 2026
Final Rejection mailed — §103
Jul 13, 2026
Response after Non-Final Action
Aug 18, 2026
Non-Final Rejection mailed — §103 (current)

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Prosecution Projections

5-6
Expected OA Rounds
83%
Grant Probability
90%
With Interview (+7.2%)
2y 8m (~0m remaining)
Median Time to Grant
High
PTA Risk
Based on 717 resolved cases by this examiner. Grant probability derived from career allowance rate.

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