Prosecution Insights
Last updated: October 25, 2026
Application No. 18/080,676

ADJUSTABLE PROGRAMMING CIRCUIT FOR NEURAL NETWORK

Final Rejection §103
Filed
Dec 13, 2022
Priority
Jan 29, 2019 — provisional 62/798,394 +1 more
Examiner
HO, HOAI V
Art Unit
2199
Tech Center
2100 — Computer Architecture & Software
Assignee
Silicon Storage Technology Inc.
OA Round
2 (Final)
93%
Grant Probability
Favorable
3-4
OA Rounds
0m
Est. Remaining
98%
With Interview

Examiner Intelligence

Grants 93% — above average
93%
Career Allowance Rate
1036 granted / 1118 resolved
+37.7% vs TC avg
Moderate +6% lift
Without
With
+5.5%
Interview Lift
resolved cases with interview
Fast prosecutor
1y 8m
Avg Prosecution
17 currently pending
Career history
1137
Total Applications
across all art units

Statute-Specific Performance

§101
1.2%
-38.8% vs TC avg
§103
30.2%
-9.8% vs TC avg
§102
45.0%
+5.0% vs TC avg
§112
16.6%
-23.4% vs TC avg
Black line = Tech Center average estimate • Based on career data from 1118 resolved cases

Office Action

§103
Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Response to Amendment 1. This office action is responsive to communication(s) filed on 9/2/2026. 2. Claims 1-12 are presented for examination. 3. Applicant's arguments with respect to the newly added limitations have been considered but are moot in view of the new ground(s) of rejections as follows: Claim Rejections - 35 U.S.C. § 103 4. The following is a quotation of 35 U.S.C. § 103(a) which forms the basis for all obviousness rejections set forth in this Office action: (a) A patent may not be obtained though the invention is not identically disclosed or described as set forth in section 102 of this title, if the differences between the subject matter sought to be patented and the prior art are such that the subject matter as a whole would have been obvious at the time the invention was made to a person having ordinary skill in the art to which said subject matter pertains. Patentability shall not be negatived by the manner in which the invention was made. 5. Claims 1-12 are rejected under 35 U.S.C. § 103(a) as being unpatentable over Li et al. US Pub. No. 8754794 (previous cited) in view of Schie US Pub. No. 20140344200. As per claims 1 and 7, Fig. 4 of Li is directed to an adjustable programming circuit for generating a programming voltage that comprises one of a plurality of different voltages to program a non-volatile memory cell (col. 3, lines 47-49) for a neural network to store one of a plurality of different voltages on a floating gate of the non- volatile memory cell, comprising: an operational amplifier (214) comprising a first input terminal (+ terminal of 214), a second input terminal (- terminal of 214), and an output terminal (TB), the first input terminal receiving a reference voltage (-Vref), the output terminal providing a voltage to program the non-volatile memory cell (col. 3, lines 47-49); a first switched capacitor network (218 or Fig. 5) coupled between the second input terminal of the operational amplifier and the output terminal of the operational amplifier; and a second switched capacitor network (216 or Fig. 5) coupled between an input voltage and the second input terminal of the operational amplifierB,) that varies (Fig. 6) in response to a capacitance (Fig. 5) of the first switched capacitor network and a capacitance (Fig. 5) of the second switched capacitor network. Li discloses a second switched capacitor network (216 or Fig. 5) coupled between an input voltage and the second input terminal of the operational amplifier but fails to disclose while the first switched capacitor network is coupled between the second input terminal of the operational amplifier and the output terminal of the operational amplifier. However, Fig. 1, 3, 4 or 14 of Schie discloses the first switched capacitor network (2, or 2p) is coupled between the second input terminal (- terminal, Fig.1 or 4) of the operational amplifier (12 or 24, Fig.1 or 4) and the output terminal (Vout) of the operational amplifier. It would have been obvious to a person of ordinary skill in the art at the time invention was made to modify Li’s adjustable programming circuit which utilizes the first capacitor network as taught by Schie in order to the first switched capacitor network and the second switched capacitor network are electrically coupled by the switches 2 and 4 (par. 11 or 40). As per claims 2 and 8, Fig. 4 or 5 of Li discloses wherein the first switched capacitor network comprises an adjustable capacitor (218). As per claims 3-4 and 9-10 , Fig. 4 or 5 of Li discloses wherein the second switched capacitor network comprises an adjustable capacitor (216). As per claims 5-6 and 11-12, a column 3, lines 47-52 of Li discloses wherein the non-volatile memory cell is a stacked-gate memory cell (other suitable types of memory). Response to Arguments 6. Applicant's arguments with respect to the newly added limitations have been considered but are moot in view of the new ground(s) of rejections as set forth in the rejection above. For the above reasons, it is believed that the rejections should be sustained. Feature of an invention not found in the claims can be given no patentable weight in distinguishing the claimed invention over the prior art. 7. Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). See MPEP  706.07(a). Applicants are reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for response to this final action is set to expire THREE MONTHS from the date of this action. In the event a first response is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any extension fee pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event will the statutory period for response expire later than SIX MONTHS from the date of this final action. 8. When responding to the office action, Applicants are advised to provide the examiner with the line numbers and page numbers in the application and/or references cited to assist the examiner to locate the appropriate paragraphs. 9. Any inquiry concerning this communication or earlier communications from the examiner should be directed to HOAI V HO whose telephone number is (571)272-1777. The examiner can normally be reached 7:00 AM -- 5:30 PM from Thursday and Friday of the first week of a bi-week and Tuesday and Wednesday of the second week. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Amir Zarabian can be reached on (571) 272-1852. The fax phone number for the organization where this application or proceeding is assigned is (571)-273-8300. Information regarding the status of an application may be obtained from the Patent Application Information Retrieval (PAIR) system. Status information for published applications may be obtained from either Private PAIR or Public PAIR. Status information for unpublished applications is available through Private PAIR only. For more information about the PAIR system, see http://pair-direct.uspto.gov. Should you have questions on access to the Private PAIR system, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). /HOAI V HO/Primary Examiner, Art Unit 2827
Read full office action

Prosecution Timeline

Dec 13, 2022
Application Filed
Jun 04, 2026
Non-Final Rejection mailed — §103
Sep 02, 2026
Response Filed
Oct 07, 2026
Final Rejection mailed — §103 (current)

Precedent Cases

Applications granted by this same examiner with similar technology

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2y 4m to grant Granted Oct 20, 2026
Patent 12763132
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ROW HAMMER REFRESH ADDRESS CALCULATION METHOD AND CALCULATION CIRCUIT, AND SEMICONDUCTOR MEMORY DEVICE MOUNTING THE CALCULATION CIRCUIT
2y 1m to grant Granted Oct 13, 2026
Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

3-4
Expected OA Rounds
93%
Grant Probability
98%
With Interview (+5.5%)
1y 8m (~0m remaining)
Median Time to Grant
Moderate
PTA Risk
Based on 1118 resolved cases by this examiner. Grant probability derived from career allowance rate.

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