DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 112(b)
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 10 and 26 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Specifically, claims 10 and 16 each recite the two inputs without clear antecedent basis.
Claim Rejections - 35 USC § 101
35 U.S.C. 101 reads as follows:
Whoever invents or discovers any new and useful process, machine, manufacture, or composition of matter, or any new and useful improvement thereof, may obtain a patent therefor, subject to the conditions and requirements of this title.
Claims 18-20 are rejected under 35 U.S.C. 101 because the claimed invention is directed to a signal per se which is non-statutory subject matter according to MPEP 2106, which states that a signal per se is not directed to one of the four categories of statutory subject matter listed in 35 U.S.C. 101. According to paragraph 66 of the specification, “Data structures and program code described in this detailed description are typically stored on a non-transitory computer-readable storage medium, which may be any device or medium that can store code and/or data for use by a computer system. Non-transitory computer-readable storage media include, but are not limited to, volatile memory; non-volatile memory; electrical, magnetic, and optical storage devices, solid- state drives, and/or other non-transitory computer-readable media now known or later developed.”
This recitation blurs the line between non-transitory and transitory. For example, “a non-transitory computer-readable storage medium, which may be any device or medium that can store code and/or data” includes signals. Additionally, “Non-transitory computer-readable storage media include, but are not limited to, volatile memory; non-volatile memory; electrical, magnetic, and optical storage devices.” The “but are not limited” language and the recitation of “electrical” (e.g., wires) and “optical” (e.g., fiber optics) include signals. Lastly, the language of “or later developed” does not indicate the status of unknown transitory devices later developed.
Examiner suggests amending the Specification to exclude this language to overcome this rejection.
Claims 1, 5-13, 17-18, 21- 28 are rejected under 35 U.S.C. 101 because the claimed invention is directed to an abstract idea without significantly more.
Step 1: Claim 1 is a method claim. Claim 13 is an apparatus claim. Claim 18 is a CRM claim. Therefore, claims 1, 13, and 18 are directed to either a process, machine, manufacture or composition of matter.
With respect to Claim 1:
Step 2A Prong 1:
identifying a set of adjustable registers to be use by the hardware device to implement the neural network node (mental process – user can manually identify a set of adjustable registers to be use by the hardware device to implement the neural network node)
modeling quantization of neural network parameters and output of the neural network node on the hardware device as an optimization problem by formulating at least an objective function and a set of hardware constraints associated with the set of adjustable registers, wherein the objective function is formulated to minimize a weighted sum of a plurality of right-bit shift values associated with the quantization (mental process – user can manually model quantization of neural network parameters and output of the neural network node on the hardware device as an optimization problem by formulating at least an objective function and a set of hardware constraints associated with the set of adjustable registers, wherein the objective function is formulated to minimize a weighted sum of a plurality of right-bit shift values associated with the quantization)
solving the optimization problem by identifying a set of values for the set of adjustable registers that satisfies the objective function (mental process – user can manually solve the optimization problem by identifying a set of values for the set of adjustable registers that satisfies the objective function)
Step 2A Prong 2: This judicial exception is not integrated into a practical application. Additional elements:
setting the set of adjustable registers of the hardware device using with the set of identified values (Adding the words “apply it” (or an equivalent) with the judicial exception, or mere instructions to implement an abstract idea on a computer, or merely uses a computer as a tool to perform an abstract idea - see MPEP 2106.05(f))
Step 2B: The claim does not include additional elements considered individually and in combination that are sufficient to amount to significantly more than the judicial exception. Additional elements:
setting the set of adjustable registers of the hardware device using with the set of identified values (Adding the words “apply it” (or an equivalent) with the judicial exception, or mere instructions to implement an abstract idea on a computer, or merely uses a computer as a tool to perform an abstract idea - see MPEP 2106.05(f))
Conclusion: The claim is not patent eligible.
Claims 13 and 18 are rejected on the same grounds as claim 1. Additionally for claims 13 and 18: Claim 13 has the additional elements of a processor and a storage device. These elements are mere instructions to apply the exception using a generic computer component under Step 2A prong 2 and Step 2B. Claim 18 has the additional element of a non-transitory computer readable storage medium. This element is mere instructions to apply the exception using a generic computer component under Step 2A prong 2 and Step 2B.
Regarding Claim 5: The limitation(s), as drafted, are a process that, under its broadest reasonable interpretation, covers performance of the limitation(s) in the mind. That is, nothing in the claim limitation(s) precludes the step from practically being performed in the mind.
The limitation(s) encompasses the user manually wherein the optimization problem additionally comprises a set of mathematical constraints associated with the set of adjustable parameters; and wherein solving the optimization problem further comprises identifying the set of values for the set of adjustable registers that satisfy the set of hardware constraints and the set of mathematical constraints.
These judicial exceptions are not integrated into a practical application. In particular, the claims do not recite any additional elements. Accordingly, this does not integrate the abstract idea into a practical application because it does not impose any meaningful limits on practicing the abstract idea.
The claims do not include additional elements that are sufficient to amount to significantly more than the judicial exception. As discussed above with respect to integration of the abstract idea into a practical application, no additional elements are cited. Accordingly, the claim is not patent eligible.
Regarding Claim 6: The limitation(s), as drafted, are a process that, under its broadest reasonable interpretation, covers performance of the limitation(s) in the mind. That is, nothing in the claim limitation(s) precludes the step from practically being performed in the mind.
The limitation(s) encompasses the user manually wherein formulating the optimization problem further comprises generating the set of constraints by: identifying a set of arithmetic operations within the neural network node; and for each identified arithmetic operation, generating one or more mathematical constraints by mathematically modeling the arithmetic operation with respect to both the set of adjustable registers and a set of quantization parameters associated with the quantization of neural network parameters.
These judicial exceptions are not integrated into a practical application. In particular, the claims do not recite any additional elements. Accordingly, this does not integrate the abstract idea into a practical application because it does not impose any meaningful limits on practicing the abstract idea.
The claims do not include additional elements that are sufficient to amount to significantly more than the judicial exception. As discussed above with respect to integration of the abstract idea into a practical application, no additional elements are cited. Accordingly, the claim is not patent eligible.
Regarding Claim 7: The limitation(s), as drafted, are a process that, under its broadest reasonable interpretation, covers performance of the limitation(s) in the mind. That is, nothing in the claim limitation(s) precludes the step from practically being performed in the mind.
The limitation(s) encompasses the user manually wherein the set of identified arithmetic operations comprises one or more of: a multiplication operation; an adding operation; a clipping operation; a rounding operation; a left bit-shift operation; and a right bit-shift operation.
These judicial exceptions are not integrated into a practical application. In particular, the claims do not recite any additional elements. Accordingly, this does not integrate the abstract idea into a practical application because it does not impose any meaningful limits on practicing the abstract idea.
The claims do not include additional elements that are sufficient to amount to significantly more than the judicial exception. As discussed above with respect to integration of the abstract idea into a practical application, no additional elements are cited. Accordingly, the claim is not patent eligible.
Regarding Claim 8: The limitation(s), as drafted, are a process that, under its broadest reasonable interpretation, covers performance of the limitation(s) in the mind. That is, nothing in the claim limitation(s) precludes the step from practically being performed in the mind.
The limitation(s) encompasses the user manually wherein the set of quantization parameters for a given quantized neural network parameter comprises: a quantization scale; a zero point value; and a calibrated upper bound value for the quantized neural network parameter.
These judicial exceptions are not integrated into a practical application. In particular, the claims do not recite any additional elements. Accordingly, this does not integrate the abstract idea into a practical application because it does not impose any meaningful limits on practicing the abstract idea.
The claims do not include additional elements that are sufficient to amount to significantly more than the judicial exception. As discussed above with respect to integration of the abstract idea into a practical application, no additional elements are cited. Accordingly, the claim is not patent eligible.
Regarding Claim 9: The limitation(s), as drafted, are a process that, under its broadest reasonable interpretation, covers performance of the limitation(s) in the mind. That is, nothing in the claim limitation(s) precludes the step from practically being performed in the mind.
The limitation(s) encompasses the user manually wherein the set of mathematical constraints comprises a first quantization-scale equality constraint between the quantization scales of a set of input values of the neural network node and the quantization scale of an output of the neural network node.
These judicial exceptions are not integrated into a practical application. In particular, the claims do not recite any additional elements. Accordingly, this does not integrate the abstract idea into a practical application because it does not impose any meaningful limits on practicing the abstract idea.
The claims do not include additional elements that are sufficient to amount to significantly more than the judicial exception. As discussed above with respect to integration of the abstract idea into a practical application, no additional elements are cited. Accordingly, the claim is not patent eligible.
Regarding Claim 10: The limitation(s), as drafted, are a process that, under its broadest reasonable interpretation, covers performance of the limitation(s) in the mind. That is, nothing in the claim limitation(s) precludes the step from practically being performed in the mind.
The limitation(s) encompasses the user manually wherein the identified set of arithmetic operations comprises a set of addition operations; and wherein the set of mathematical constraints comprises a second quantization-scale equality constraint between the two inputs of each addition operation within the set of identified addition operations.
These judicial exceptions are not integrated into a practical application. In particular, the claims do not recite any additional elements. Accordingly, this does not integrate the abstract idea into a practical application because it does not impose any meaningful limits on practicing the abstract idea.
The claims do not include additional elements that are sufficient to amount to significantly more than the judicial exception. As discussed above with respect to integration of the abstract idea into a practical application, no additional elements are cited. Accordingly, the claim is not patent eligible.
Regarding Claim 11: The limitation(s), as drafted, are a process that, under its broadest reasonable interpretation, covers performance of the limitation(s) in the mind. That is, nothing in the claim limitation(s) precludes the step from practically being performed in the mind.
The limitation(s) encompasses the user manually wherein the identified set of arithmetic operations comprises a set of bit-shift operations; and wherein the set of hardware constraints comprises a set of inequality constraints corresponding to size limits of a set of registers in the hardware device used to implement the set of identified bit-shift operations.
These judicial exceptions are not integrated into a practical application. In particular, the claims do not recite any additional elements. Accordingly, this does not integrate the abstract idea into a practical application because it does not impose any meaningful limits on practicing the abstract idea.
The claims do not include additional elements that are sufficient to amount to significantly more than the judicial exception. As discussed above with respect to integration of the abstract idea into a practical application, no additional elements are cited. Accordingly, the claim is not patent eligible.
Regarding Claim 12: The limitation(s), as drafted, are a process that, under its broadest reasonable interpretation, covers performance of the limitation(s) in the mind. That is, nothing in the claim limitation(s) precludes the step from practically being performed in the mind.
The limitation(s) encompasses the user manually wherein solving the optimization problem comprises applying one of the following optimization techniques: a linear optimization technique; and a brute-force search technique.
These judicial exceptions are not integrated into a practical application. In particular, the claims do not recite any additional elements. Accordingly, this does not integrate the abstract idea into a practical application because it does not impose any meaningful limits on practicing the abstract idea.
The claims do not include additional elements that are sufficient to amount to significantly more than the judicial exception. As discussed above with respect to integration of the abstract idea into a practical application, no additional elements are cited. Accordingly, the claim is not patent eligible.
Claim 17 is rejected on the same grounds as claims 5 respectively.
Claims 21-28 are rejected on the same grounds as claims 5-12 respectively.
No Prior Art Rejections
Claims 1, 5-13, 17-18, 21-28 are not currently rejected by prior art. In light of the claim as a whole, the limitation of modeling quantization of neural network parameters and output of the neural network node on the hardware device as an optimization problem by formulating at least an objective function and a set of hardware constraints associated with the set of adjustable registers, wherein the objective function is formulated to minimize a weighted sum of a plurality of right-bit shift values associated with the quantization was not found in the prior art. The closest prior art found includes the art of record as well as Yao et al. (HAWQ-V3: Dyadic Neural Network Quantization) which discloses a mixed-precision integer only quantization framework with integer-only multiplication, addition, and bit shifting with static quantization.
Response to Arguments
Regarding the §101 rejections, Applicant's arguments have been fully considered but have been found unpersuasive. Applicant argues that the claims are directed to a hardware device and integrate the abstract idea into a practical application of using a hardware device to perform computations for a neural network node. Examiner disagrees for at least the following reasons.
The claims are directed to a judicial exception. Exemplary claim 1 recites identifying, modeling by formulating, and solving. All three of these limitations encompass the judicial exceptions of mental processes and mathematical concepts. As outlined in the rejection above, a person can manually perform these steps mentally. The final limitation cannot be performed mentally and is an additional element. Setting the registers using the calculated values is merely applying the judicial exception to a computing environment. There is no recited practical application.
For at least these reasons, the rejections are maintained.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Yang et al. (Quantization Networks) discloses a simple and uniform way for weights and activations quantization by formulating it as a differentiable non-linear function.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to ROBERT H BEJCEK II whose telephone number is (571)270-3610. The examiner can normally be reached Monday - Friday: 9:00am - 5:00pm.
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/R.B./ Examiner, Art Unit 2148
/MICHELLE T BECHTOLD/ Supervisory Patent Examiner, Art Unit 2148
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