Prosecution Insights
Last updated: October 27, 2026
Application No. 18/081,537

APPLICATION PROGRAMMING INTERFACE TO STORE MEMORY TRANSACTION INFORMATION

Final Rejection §DOUBLEPATENT
Filed
Dec 14, 2022
Priority
Nov 17, 2022 — WO PCT/CN2022/132533 +1 more
Examiner
GHAFFARI, ABU Z
Art Unit
2195
Tech Center
2100 — Computer Architecture & Software
Assignee
NVIDIA Corporation
OA Round
4 (Final)
79%
Grant Probability
Favorable
5-6
OA Rounds
0m
Est. Remaining
99%
With Interview

Examiner Intelligence

Grants 79% — above average
79%
Career Allowance Rate
558 granted / 704 resolved
+24.3% vs TC avg
Strong +48% interview lift
Without
With
+47.7%
Interview Lift
resolved cases with interview
Typical timeline
3y 2m
Avg Prosecution
24 currently pending
Career history
746
Total Applications
across all art units

Statute-Specific Performance

§101
17.2%
-22.8% vs TC avg
§103
38.6%
-1.4% vs TC avg
§102
0.1%
-39.9% vs TC avg
§112
39.6%
-0.4% vs TC avg
Black line = Tech Center average estimate • Based on career data from 704 resolved cases

Office Action

§DOUBLEPATENT
DETAILED ACTION The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . This final office action is responsive to the amendments filed on 09/01/2026. Claims 1-20 are pending. Response to Amendment Applicant has amended independent claims 1, 8, 14 and dependent claims 5, 7, 12-13, 18-19 to include new/old limitations in a form not previously presented necessitating new search and considerations. Double Patenting The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969). A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on nonstatutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP §§ 706.02(l)(1) - 706.02(l)(3) for applications not subject to examination under the first inventor to file provisions of the AIA . A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b). The USPTO Internet website contains terminal disclaimer forms which may be used. Please visit www.uspto.gov/patent/patents-forms. The filing date of the application in which the form is filed determines what form (e.g., PTO/SB/25, PTO/SB/26, PTO/AIA /25, or PTO/AIA /26) should be used. A web-based eTerminal Disclaimer may be filled out completely online using web-screens. An eTerminal Disclaimer that meets all requirements is auto-processed and approved immediately upon submission. For more information about eTerminal Disclaimers, refer to www.uspto.gov/patents/process/file/efs/guidance/eTD-info-I.jsp. Claims 1-20 of the instant invention is provisionally rejected on the ground of nonstatutory double patenting as being unpatentable over claim 1-20 of co-pending Application 18/081,559 (hereafter ‘559). Following table illustrate the mapping between the independent claim 1 of instant invention and claim 1 of co-pending application ‘559: Instant Invention co-pending Application ‘559 1. One of more processors, comprising: 1. One or more processors, comprising: circuitry to, in response to a call to an application programming interface (API), cause information received by the API about one or more memory transactions associated with a graphics processing unit (GPU) to be stored by updating a thread synchronization object, circuitry to, in response to an application programming interface (API) call, cause one or more software thread synchronization objects associated with one or more threads to indicate whether one or more asynchronous memory transactions that include data movement operations between a first type of memory of a graphics processing unit (GPU) and a second type of memory of the GPU have been performed by the one or more threads, wherein one or more input parameters to the API indicate a number of threads used to perform the one or more asynchronous memory transactions, and wherein the thread synchronization object is to be updated based, at least in part, on the information received by the API and a transaction count indicating an amount of data to be moved by the one or more asynchronous memory transaction. wherein the circuitry is further to, in response to the call to the API, perform manual transaction accounting of the one or more asynchronous memory transactions by updating the one or more thread synchronization objects based at least on an expected transaction count indicating an amount of data to be moved by the one or more threads As illustrated in above table, Claim 1 of instant application are rejected on over claim 1 of co-pending application ‘559. Although the claims at issue are not identical, they are not patentably distinct from each other because in both application, claim is directed to updating thread synchronization object based on the transaction count indicating an amount of data to be moved by one or more asynchronous memory transaction, and is only variant of claim 1 of the co-pending application. This is a provisional nonstatutory double patenting rejection because the patentably indistinct claims have not in fact been patented. Claims 1 of the instant invention is provisionally rejected on the ground of nonstatutory double patenting as being unpatentable over claim 1 of co-pending Application 18/081,561 (hereafter ‘561) based on similar analysis as above. Following table illustrate the mapping between the claims: Instant Invention co-pending Application ‘561 1. One of more processors, comprising: 1. One or more processors, comprising, circuitry to, in response to a call to an application programming interface (API), cause information received by the API about one or more memory transactions associated with a graphics processing unit (GPU) to be stored by updating a thread synchronization object, one or more circuits to perform an application programming interface (API) to cause wherein the thread synchronization object is to be updated based, at least in part, on the information received by the API and a transaction count indicating an amount of data to be moved by the one or more asynchronous memory transaction. an amount of information to be accessed as a result of one or more asynchronous memory transactions that include data movement operations, to be provided to one or more users, by updating one or more synchronization objects. Response to Arguments The previous 112(b) objections have been withdrawn. The previous double patent objections have been maintained. Allowable Subject Matter Claims 1-20 would be allowable if rewritten or amended to overcome the rejection(s) set forth in this Office action. Reasons for Allowance The following is an examiner’s statement of reasons for allowance: Interpreting the claims in light of the specification examiner finds the claimed invention is patentably distinct from the prior art of record. The prior art of record does not expressly teach or render obvious the invention as recited in amended independent claims. Kumar et al. (US 2006/0085591 A1) teaches one or more processors, comprising: circuitry to, in response to a call to an application programming interface (API), cause information received by the API about one or more memory transactions associated with a graphics processing unit (GPU) by updating a thread synchronization object based, at least in part, on the information received by the API. Apodaca et al. (US 2016/0364829 A1) teaches cause information received by the API about one or more asynchronous memory transactions to be stored. Sura et al. (US 2020/0151028 A1) teaches information stored by updating a thread synchronization object, based, at least in part, on an amount of data to be updated. The combination of prior art of record does not expressly teach or render obvious the limitations of “the thread synchronization object is to be updated based, at least in part, on the information received by the API about one or more memory transaction associated with GPU and a transaction count indicating an amount of data to be moved by the one or more asynchronous memory transaction”, when taken in the context of the claims as a whole, as recited in claim independent claims 1, 8 and 14 were not disclosed in the prior art of record. Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Gadre; Shirish et al. (US 8997103 B2) teaches N-way memory barrier operation coalescing. Hu; Guoyu et al. (US 20190129848 A1) teaches throttling writes with asynchronous flushing Shveidel; Vladimir (US 20200026582 A1) teaches synchronization object with watermark. THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to ABU ZAR GHAFFARI whose telephone number is (571)270-3799. The examiner can normally be reached Monday-Thursday 9:00 - 17:00. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Aimee Li can be reached at 571-272-4169. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. ABU ZAR GHAFFARI Primary Examiner Art Unit 2195 /ABU ZAR GHAFFARI/Primary Examiner, Art Unit 2195
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Prosecution Timeline

Show 8 earlier events
May 06, 2026
Request for Continued Examination
May 07, 2026
Response after Non-Final Action
Jun 03, 2026
Non-Final Rejection mailed — §DOUBLEPATENT
Sep 01, 2026
Response Filed
Sep 02, 2026
Interview Requested
Sep 22, 2026
Examiner Interview Summary
Sep 22, 2026
Applicant Interview (Telephonic)
Oct 13, 2026
Final Rejection mailed — §DOUBLEPATENT (current)

Precedent Cases

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

5-6
Expected OA Rounds
79%
Grant Probability
99%
With Interview (+47.7%)
3y 2m (~0m remaining)
Median Time to Grant
High
PTA Risk
Based on 704 resolved cases by this examiner. Grant probability derived from career allowance rate.

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