Prosecution Insights
Last updated: October 02, 2026
Application No. 18/081,614

THREE-DIMENSIONAL MEMORY DEVICES AND METHODS FOR FORMING THE SAME

Non-Final OA §112
Filed
Dec 14, 2022
Priority
Jan 10, 2022 — CN 202210021158.1 +1 more
Examiner
RAHMAN, KHATIB A
Art Unit
2818
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Yangtze Memory Technologies Co., Ltd.
OA Round
3 (Non-Final)
91%
Grant Probability
Favorable
3-4
OA Rounds
0m
Est. Remaining
96%
With Interview

Examiner Intelligence

Grants 91% — above average
91%
Career Allowance Rate
432 granted / 474 resolved
+23.1% vs TC avg
Minimal +5% lift
Without
With
+5.0%
Interview Lift
resolved cases with interview
Typical timeline
2y 2m
Avg Prosecution
17 currently pending
Career history
491
Total Applications
across all art units

Statute-Specific Performance

§103
49.4%
+9.4% vs TC avg
§102
27.2%
-12.8% vs TC avg
§112
18.5%
-21.5% vs TC avg
Black line = Tech Center average estimate • Based on career data from 474 resolved cases

Office Action

§112
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Response to Amendment Amendment dated 07/21/2026 has been acknowledged. Claims 1 & 8 are amended. Claims 12-22 are cancelled. Claims 30-31 are added. Claims 1-11 and 23-31 are pending in applications. Response to Arguments Applicant’s argument dated 07/21/2026 has been acknowledged. Claims 1, 3-9, 11, 23-27, 29-31 are allowed in current office action. However, claims 2, 10 & 28 are newly rejected under 35 U.S.C. 112(b) (see rejections below) . Accordingly, allowability of claim 28 as indicated in previous office action are withdrawn and thus this office action is made non-final. Claim Rejections - 35 USC § 112 The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph: The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention. Claims 2, 10 & 28 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention. Claims 2 recites, “wherein a third width of the semiconductor channel at the bottom portion of the channel structure below the angled structure is smaller than a fourth width of the semiconductor channel at an upper portion of the channel structure above the angled structure. The limitation “the angled structure ” (in line 2) has an antecedent base issue. It is not clear if it was referring to “an angled structure” as recited in previously presented claim 1 (in line 11) or a different angled structure. Furthermore, the limitation “a third width…” (in line 1) ” and “a fourth width…” (in line 4) are not clearly understood in view of Fig. 2 and paragraph [0051] of the disclosure. It is not clear if they are respectively referring to “the outer diameter W1 at the bottom portion of the channel structure 118” and “the outer diameter W2 at the upper portion of the channel structure 118” or different width. For examination purpose, examiner is interpreting the entire limitation as “wherein the semiconductor channel comprises an angled structure, and the angled structure is disposed between the first semiconductor layer and a bottommost conductive layer of the first conductive layers ,and wherein an [[third width]] outer diameter of the semiconductor channel at the bottom portion of the channel structure below the angled structure is smaller than an [[fourth width]] outer diameter of the semiconductor channel at an upper portion of the channel structure above the angled structure. Claims 10 recites, “wherein a third width of the semiconductor channel at the bottom portion of the channel structure below the angled structure is smaller than a fourth width of the semiconductor channel at an upper portion of the channel structure above the angled structure”. The limitation “the angled structure ” (in line 2) has an antecedent base issue. It is not clear if it was referring to “an angled structure” as recited in previously presented claim 8 (in line 10) or a different angled structure. Furthermore, the limitation “a third width…” (in line 1) ” and “a fourth width…” (in line 4) are not clearly understood from Fig. 2 and paragraph [0051] of the disclosure. It is not clear if they are respectively referring to “the outer diameter W1 at the bottom portion of the channel structure 118” and “the outer diameter W2 at the upper portion of the channel structure 118” or different width. For examination purpose, examiner is interpreting the entire limitation as “wherein the semiconductor channel comprises an angled structure, and the angled structure is disposed between the third semiconductor layer and a bottommost conductive layer of the first conductive layers, and wherein an [[third width]] outer diameter of the semiconductor channel at the bottom portion of the channel structure below the angled structure is smaller than an [[fourth width]] outer diameter of the semiconductor channel at an upper portion of the channel structure above the angled structure” Claim 28 recites, “wherein the semiconductor channel comprises an angled structure, and a third width of the semiconductor channel at the bottom portion of the channel structure below the angled structure is smaller than a fourth width of the semiconductor channel at an upper portion of the channel structure above the angled structure”. It is not clear if the limitation “an angled structure” (in line 2) is referring to an angled structure (bending structure) of semiconductor channel 132 disposed between the first semiconductor layer 136 and a bottommost conductive layer of the first conductive layers 113 “ as described in Fig. 2 and paragraph [0051] of the disclosure or different angled structure. Furthermore, the limitation “a third width…” (in line 1) ” and “a fourth width…” (in line 4) are not clearly understood from Fig. 2 and paragraph [0051] of the disclosure. It is not clear if they are respectively referring to “the outer diameter W1 at the bottom portion of the channel structure 118” and “the outer diameter W2 at the upper portion of the channel structure 118” or different width. For examination purpose, examiner is interpreting the entire limitation as “wherein the semiconductor channel comprises an angled structure, and the angled structure is disposed between the first semiconductor layer and a bottommost conductive layer of the first conductive layers, and wherein an [[third width]] outer diameter of the semiconductor channel at the bottom portion of the channel structure below the angled structure is smaller than an [[fourth width]] outer diameter of the semiconductor channel at an upper portion of the channel structure above the angled structure” . Allowable Subject Matter The indication of allowance of claim 28 in previous office action has been withdrawn upon discovery of 112(b) issue in claim 28 as rejected in current office action (see above). Claims 1, 3-9, 11, 23-27, 29-31 are allowed. With respect to claim 1, the prior art made of record does not teach or suggest either alone or in combination “and a dielectric core surrounded by the semiconductor channel, and the dielectric core extends into the first semiconductor layer” in further combination with the additionally claimed limitations, as they are claimed by the Applicant. The above limitation is the allowable subject matter of previously presented claim 21 as indicated in previous office action. None of the prior arts on record or cited arts teaches the allowable limitations nor would be obvious to modify without breaking the functionality of the devices. Claims 3-7, 30-31 are allowed being dependent on claim 1. With respect to claim 8, the prior art made of record does not teach or suggest either alone or in combination “and a dielectric core surrounded by the semiconductor channel, and the dielectric core extends into the third semiconductor layer” in further combination with the additionally claimed limitations, as they are claimed by the Applicant. The above limitation is the allowable subject matter of previously presented claim 22 as indicated in previous office action. None of the prior arts on record or cited arts teaches the allowable limitations nor would be obvious to modify without breaking the functionality of the devices. Claims 9 & 11 are allowed being dependent on claim 8. Claims 23-27 & 29 were allowed in previous office action. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to KHATIB A RAHMAN whose telephone number is (571)270-0494. The examiner can normally be reached on MON-FRI 8:00 am- 5:00 pm (Arizona). Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor Steven Loke, can be reached on (571) 272-1657. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of an application may be obtained from the Patent Application Information Retrieval (PAIR) system. Status information for published applications may be obtained from either Private PAIR or Public PAIR. Status information for unpublished applications is available through Private PAIR only. For more information about the PAIR system, see http://pair-direct.uspto.gov. Should you have questions on access to the Private PAIR system, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative or access to the automated information system, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /K.A.R/Examiner, Art Unit 2818 /STEVEN H LOKE/Supervisory Patent Examiner, Art Unit 2818
Read full office action

Prosecution Timeline

Dec 14, 2022
Application Filed
Dec 23, 2025
Non-Final Rejection mailed — §112
Feb 26, 2026
Response Filed
Jun 24, 2026
Final Rejection mailed — §112
Jul 21, 2026
Response after Non-Final Action
Sep 01, 2026
Non-Final Rejection mailed — §112 (current)

Precedent Cases

Applications granted by this same examiner with similar technology

Patent 12745393
SEMICONDUCTOR MEMORY DEVICE
4y 0m to grant Granted Sep 22, 2026
Patent 12740129
CONDUCTIVE OXYGEN BARRIER FOR COMPLEX OXIDES
2y 9m to grant Granted Sep 15, 2026
Patent 12720925
ELECTRONIC DEVICE AND MANUFACTURING METHOD THEREOF
3y 5m to grant Granted Aug 25, 2026
Patent 12720812
SEMICONDUCTOR DEVICE
3y 0m to grant Granted Aug 25, 2026
Patent 12720780
SCHOTTKY BARRIER DIODE (SBD) LEAKAGE CURRENT BLOCKING STRUCTURE
3y 3m to grant Granted Aug 25, 2026
Study what changed to get past this examiner. Based on 5 most recent grants.

Strategy Recommendation AI-generated — please review before filing

Get a prosecution strategy drawn from examiner precedents, rejection analysis, and claim mapping.
Typically takes 5-10 seconds — AI-generated, attorney review required before filing

Prosecution Projections

3-4
Expected OA Rounds
91%
Grant Probability
96%
With Interview (+5.0%)
2y 2m (~0m remaining)
Median Time to Grant
High
PTA Risk
Based on 474 resolved cases by this examiner. Grant probability derived from career allowance rate.

Sign in with your work email

Enter your email to receive a magic link. No password needed.

Personal email addresses (Gmail, Yahoo, etc.) are not accepted.

Free tier: 3 strategy analyses per month