Prosecution Insights
Last updated: July 17, 2026
Application No. 18/085,507

COOLING STRUCTURE FOR DMS MODULE

Final Rejection §103
Filed
Dec 20, 2022
Examiner
BARGERO, JOHN E
Art Unit
3762
Tech Center
3700 — Mechanical Engineering & Manufacturing
Assignee
Magna Electronics LLC
OA Round
2 (Final)
55%
Grant Probability
Moderate
3-4
OA Rounds
1m
Est. Remaining
86%
With Interview

Examiner Intelligence

Grants 55% of resolved cases
55%
Career Allowance Rate
324 granted / 585 resolved
-14.6% vs TC avg
Strong +30% interview lift
Without
With
+30.1%
Interview Lift
resolved cases with interview
Typical timeline
3y 8m
Avg Prosecution
43 currently pending
Career history
625
Total Applications
across all art units

Statute-Specific Performance

§101
0.1%
-39.9% vs TC avg
§103
94.7%
+54.7% vs TC avg
§102
3.0%
-37.0% vs TC avg
§112
1.3%
-38.7% vs TC avg
Black line = Tech Center average estimate • Based on career data from 585 resolved cases

Office Action

§103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 1-7, 9-11, and 13-15 are rejected under 35 U.S.C. 103 as being unpatentable over Nakamura (US 1,140,334) and Rains, Jr. et al. (US 9,719,012) Regarding claim 1, Nakamura (N) discloses a driver monitoring system module comprising: a housing (3, Figure 1); a first circuit board (30, Figure 2); and a second circuit board (10), wherein (i) the first circuit board is mounted at a first location within the housing (30, Figure 4), (ii) the second circuit board is mounted at a second location on an exterior surface of the housing (2, Figure 4), (iii) the first circuit board and the second circuit board are partially overlapped in a first direction (S, Figure 2) and separated by a predefined distance in a second direction (30,10, Figure 4). Nakamura (N) does not disclose that (iv) the exterior surface of the housing defines a passage between the first circuit board and the second circuit board that allows ambient air to pass between the first circuit board and the second circuit board to provide convective cooling. However, Rains (R) discloses semiconductor lamp and enclosure (Abstract) wherein (iv) the exterior surface of the housing (21, Figure 2B) defines a passage (35, i.e., venting) between the first circuit board (19) and the second circuit board (17) that allows ambient air to pass between the first circuit board and the second circuit board to provide convective cooling. It would have been obvious to one of ordinary skill in the art, prior to the effective filing date of this application to utilize venting holes to allow heated air to escape from the device, thus preventing overheating. Regarding claim 2, Nakamura (N), as modified, discloses the driver monitoring system module according to claim 1, wherein the first circuit board (N-30) comprises a camera module (N-32,23, [0037], Figure 2) and the second circuit board (N-10) comprises an infra-red light emitting diode module (N-12). Regarding claim 3, Nakamura (N), as modified, discloses the driver monitoring system module according to claim 2, wherein the camera module comprising an imaging sensor and a lens assembly (N-32,23, [0037], Figure 2). Regarding claim 4, Nakamura (N), as modified, discloses the driver monitoring system module according to claim 3, wherein the lens assembly (N-32,23, [0037], Figure 2) extends through the housing and the housing is configured to form an environmental seal with the lens assembly (N- [0028], Figure 2). Regarding claim 5, Nakamura (N), as modified, discloses the driver monitoring system module according to claim 3, wherein the infra-red light emitting diode module is separated from an optical axis of the lens assembly to achieve a predetermined pupil illumination (N-26,22, Figure 1). Regarding claim 6, Nakamura (N), as modified, discloses the driver monitoring system module according to claim 2, wherein the infra-red light emitting diode module comprises one or more infra-red light emitting diodes and driver circuitry (N-12 and [0019 & 0044], Figure 2). Regarding claim 7, Nakamura (N), as modified, discloses the driver monitoring system module according to claim 1, wherein the housing comprises an upper housing (N-2, Figure 2) and a lower housing (N-Figure 3), and the exterior surface of the upper housing defines the passage between the first circuit board and the second circuit board (N-30,10, Figure 4). Regarding claim 9, Nakamura (N), as modified, discloses the driver monitoring system module according to claim 1, further comprising a first connector (N- 41, [0022]) configured to connect said first circuit board to an electronic bus of a vehicle. Regarding claim 10, Nakamura (N), as modified, discloses the driver monitoring system module according to claim 9, further comprising a second connector (N- 42, [0023]) configured to connect said second circuit board to an electronic bus of the vehicle. Regarding claim 11, Nakamura (N) discloses a method of reducing heat transfer between an illuminator module and an imaging sensor chip of a driver monitoring system module comprising: forming a housing (3, Figure 1) wherein the first mounting location (30, Figure 4) is within the housing and the second mounting location (2, Figure 4) is on the exterior surface of the housing; mounting a first circuit board (30, Figure 2) comprising the imaging sensor chip and a lens assembly (32,23, [0037], Figure 2) in the first mounting location; and mounting a second circuit board (10) comprising a plurality of infra-red light emitting diodes (12) in the second mounting location, wherein portions of the first circuit board and the second circuit board are partially overlapped (S, Figure 2) and the overlapped portions are separated by the passage defined by the exterior surface of the housing (30,10, Figure 4), but does not disclose that an exterior surface that defines a passage that allows ambient air to pass between a first mounting and a second mounting location to provide convective cooling. However, Rains (R) discloses semiconductor lamp and enclosure (Abstract) comprising an exterior surface (21, Figure 2B) that defines a passage (35, i.e., venting) that allows ambient air to pass between a first mounting (19) and the second circuit board (17) that allows ambient air to pass between the first circuit board and the second circuit board (17) to provide convective cooling. It would have been obvious to one of ordinary skill in the art, prior to the effective filing date of this application to utilize venting holes to allow heated air to escape from the device, thus preventing overheating. Regarding claim 12, Nakamura (N), as modified, discloses the method according to claim 11, wherein the housing comprises an upper housing (N-2, Figure 2) and a lower housing (N-Figure 3), and the exterior surface of the upper housing defines the passage between the first circuit board and the second circuit board (N-30,10, Figure 4). Regarding claim 14, Nakamura (N), as modified, discloses the method according to claim 11, wherein the first mounting location is configured to separate the plurality of infra-red light emitting diodes from an optical axis of the lens assembly by a distance configured to achieve a predetermined pupil illumination criteria (N-26,22, Figure 1). Regarding claim 15, Nakamura (N), as modified, discloses the method according to claim 11, further comprising: connecting the first circuit board to a first connector (N- 41, [0022]) configured to connect the first circuit board to an electronic bus of a vehicle; and connecting the second circuit board to a second connector (N- 42, [0023]) configured to connect the second circuit board to the electronic bus of the vehicle. Claims 8 and 13 are rejected under 35 U.S.C. 103 as being unpatentable over Nakamura (US 1,140,334), Rains, Jr. et al. (US 9,719,012), and Shepard et al. (US 2015/0101838A1). Regarding claim 8, Nakamura (N), as modified, discloses the driver monitoring system module according to claim 1, but not that the exterior surface of the upper housing further defines a finned structure. However, Shepard (S) discloses a PCB housing (Abstract, 122) wherein the exterior surface of the upper housing further defines a finned structure (132, Figures 1-3). It would have been obvious to one of ordinary skill in the art, prior to the effective filing date of this application to incorporate a finned structure to the housing in order to increase heat transfer and cooling of the device. Regarding claim 13, Nakamura (N), as modified, discloses the method according to claim 11, but not the step of forming the exterior surface of the housing to define a finned structure configured to provide additional convective cooling of the housing. However, Shepard (S) discloses the method of forming a PCB housing (Abstract, 122) further comprising forming the exterior surface of the housing to define a finned structure (132, Figures 1-3) configured to provide additional convective cooling of the housing. It would have been obvious to one of ordinary skill in the art, prior to the effective filing date of this application to incorporate a finned structure to the housing in order to increase heat transfer and cooling of the device. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to JOHN E BARGERO whose telephone number is (571) 270-1770. The examiner can normally be reached Monday-Friday. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Steve McAllister can be reached at (571) 272-6785. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /JOHN E BARGERO/Examiner, Art Unit 3762 /STEVEN B MCALLISTER/Supervisory Patent Examiner, Art Unit 3762
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Prosecution Timeline

Dec 20, 2022
Application Filed
Nov 18, 2025
Non-Final Rejection mailed — §103
Feb 04, 2026
Applicant Interview (Telephonic)
Feb 05, 2026
Response Filed
Feb 06, 2026
Examiner Interview Summary
Jul 13, 2026
Final Rejection mailed — §103 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

3-4
Expected OA Rounds
55%
Grant Probability
86%
With Interview (+30.1%)
3y 8m (~1m remaining)
Median Time to Grant
Moderate
PTA Risk
Based on 585 resolved cases by this examiner. Grant probability derived from career allowance rate.

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