DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Continued Examination Under 37 CFR 1.114
1. A request for continued examination under 37 CFR 1.114 was filed in this application after a decision by the Patent Trial and Appeal Board, but before the filing of a Notice of Appeal to the Court of Appeals for the Federal Circuit or the commencement of a civil action. Since this application is eligible for continued examination under 37 CFR 1.114 and the fee set forth in 37 CFR 1.17(e) has been timely paid, the appeal has been withdrawn pursuant to 37 CFR 1.114 and prosecution in this application has been reopened pursuant to 37 CFR 1.114. Applicant’s submission filed on 12/10/2025 has been entered.
Claim Rejections - 35 USC § 103
2. In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
3. Claims 8 and 15 are rejected under 35 U.S.C. 103 as being unpatentable over Vyshetsky et al. (Pub. No. US2017/0308298) in view of Ravindran (US Patent No. US9,880,750)
As per claim 8, Vyshetsky discloses a method comprising:
transmitting a command directly (paragraph 28, read and write command to the set of queues directly via user) from a user application (fig.1, user application process 131) to a submission queue (fig.1, I/O submission queue ISQ1), the submission queue reserved for direct access by an initiator device via the user application. (paragraph 28, read and write to the second set of queues 132 directly via user mode access and thereby perform I/O operations on the NVMe device 200 while bypassing kernel processes)
Vyshetsky discloses all the limitations as the above but does not explicitly disclose the command bypassing a kernel space. However, Ravindran discloses this (paragraph 74, command is issued directly from user space to the SPU 520 to move data (again bypassing kernel context switches.)
It would have been obvious to one with ordinary skill in the art before the effective filling date of the claimed invention was made to consider the teachings of Ravindran with the teaching of Vyshetsky so as to make system more efficient to achieve higher performance and lower latency, thus enhance the system performance.
As per claim 15, Vyshetsky discloses a non-transitory computer readable storage medium storing instructions, which when executed, cause a processing device (fig.1, host 100) of a storage controller to: transmit a command directly (paragraph 28, read and write command to the set of queues directly via user) from a user application (fig.1, user application process 131) to a submission queue (fig.1, I/O submission queue ISQ1), the submission queue reserved for direct access by an initiator device via the user application. (paragraph 34, memory device driver creates more queues by reserving a second range of memory addresses mapped for use by the user application process in response to receiving the request for user mode access)
Vyshetsky discloses all the limitations as the above but does not explicitly disclose the command bypassing a kernel space. However, Ravindran discloses this (paragraph 74, command is issued directly from user space to the SPU 520 to move data (again bypassing kernel context switches.)
It would have been obvious to one with ordinary skill in the art before the effective filling date of the claimed invention was made to consider the teachings of Ravindran with the teaching of Vyshetsky so as to make system more efficient to achieve higher performance and lower latency, thus enhance the system performance.
4. Claims 1-7, 9-14, 16-20 are rejected under 35 U.S.C. 103 as being unpatentable over Vyshetsky et al. (Pub. No. US2017/0308298) in view of Ravindran (US Patent No. US9,880,750) and further in view of Chou et al. (Pub. No. US2015/0254088)
As per claim 1, Vyshetsky discloses a system comprising:
a storage controller (fig.2, NVMe controller 201) comprising a processing device (fig.1, host 100) to: send a Non-Volatile Memory Express (fig. 1, NVMe device 200) (paragraph 38, The communication device 340 allows for access to other computers (e.g., servers or clients) via a network (e.g., Ethernet) from a user application (fig.1, user application process 131) to a submission queue (fig.1, I/O submission queue ISQ1), the NVMe/FC command bypassing (paragraph 28, bypassing kernel processes in the block I/O layer) a kernel space (fig.1, kernel space 110), wherein the submission queue is reserved for direct access by an initiator device via the user application. (paragraph 34, memory device driver creates more queues by reserving a second range of memory addresses mapped for use by the user application process in response to receiving the request for user mode access)
Discloses all the limitation as the above but does not explicitly disclose send a non-Volatile memory express over Fibre channel (NVMe/FC) command. However, Chou discloses this. (paragraph 28, wherein the storage methods including providing NVMe over Ethernet as the protocol used implementing the network storage.)
It would have been obvious to one with ordinary skill in the art before the effective filling date of the claimed invention was made to consider the teachings of Chou with the teaching of Greeene so as to utilize NVMe over Ethernet protocols to implementing storage such as NVMe compliant commands to yield the predictable result so as to control efficiently, thus enhance the system performance.
In addition, Vyshetsky in view of Chou disclose all the limitations as the above but does not explicitly disclose the command bypassing a kernel space. However, Ravindran discloses this (paragraph 74, command is issued directly from user space to the SPU 520 to move data (again bypassing kernel context switches.)
It would have been obvious to one with ordinary skill in the art before the effective filling date of the claimed invention was made to consider the teachings of Ravindran with the teaching of Vyshetsky in view Chou so as to make system more efficient to achieve higher performance and lower latency, thus enhance the system performance.
As per claim 2, Vyshetsky discloses wherein the processing device is to instruct a Fibre Channel Host Bus Adapter (FC HBA) to route the NVMe/FC command to the submission queue. (paragraph 35, lines 6-10, write operation of an I/O command to the I/O submission queue in the first set of queues, and update the value of a submission tail doorbell register corresponding to the I/O submission queue in the first set of queues)
As per claim 3, Vyshetsky discloses wherein the NVMe/FC command is received by the FC HBA via a fiber-channel non-volatile memory express (FC NVMe) interface of a storage controller. (paragraph 4, lines 29-32, network functions may be offloaded into a network interface controller 118 (or NIC) or the network fabric switch, such as via an ethernet connection 120, in turn leading to a network (with various switches, routers and the like))
As per claim 4, Vyshetsky discloses wherein the processing device is further to: send a second NVMe/FC command that is to be routed through a kernel space to a second submission queue, the second submission queue being reserved for use by a kernel space (fig.1, kernel space 110) of a storage controller. (paragraph 34, memory device driver creates more queues by reserving a second range of memory addresses mapped for use by the user application process in response to receiving the request for user mode access)
As per claim 5, Vyshetsky discloses wherein the submissions queue and the second submission queue are to communicate concurrently with the initiator device. (paragraph 35, lines 10-14, the user application and the kernel mode process may perform, respectively and in parallel, the virtual memory write operation to the I/O submission queue in the second set of queues and the virtual memory write operation to the I/O submission queue in the first set of queues.)
As per claim 6, Vyshetsky discloses wherein the NVMe/FC command is to be routed through an NVMe/FC stack. (paragraph 80, lines 14-17, provides high performance via by-passing the software stacks used in conventional systems, while avoiding the need to translate from NVMe (as used by the OS stack 108) and the traffic tunneled over Ethernet to other devices.)
As per claim 7, Vyshetsky discloses wherein the processing device is further to: transmit a command to a kernel space device driver to allocate the submission queue for the direct access to user space. (paragraph 8, The memory device driver is configured to create a first set of one or more queues by at least reserving a first range of memory addresses in the kernel space, provide a location address and size of the first set of queues to a controller of the NVMe device)
As per claim 9, Vyshetsky discloses all the limitation as the above but does not explicitly disclose wherein the command corresponds to a Non-Volatile Memory Express over Fibre Channel (NVMe/FC) command. However, Chou discloses this. (paragraph 28, wherein the storage methods including providing NVMe over Ethernet as the protocol used implementing the network storage.)
It would have been obvious to one with ordinary skill in the art before the effective filling date of the claimed invention was made to consider the teachings of Chou with the teaching of Greeene so as to utilize NVMe over Ethernet protocols to implementing storage such as NVMe compliant commands to yield the predictable result so as to control efficiently, thus enhance the system performance.
As per claim 10, Vyshetsky discloses the method further comprising: instructing a Fibre Channel Host Bus Adapter (FC HBA) to route the NVMe/FC command to the submission queue. (paragraph 35, lines 6-10, write operation of an I/O command to the I/O submission queue in the first set of queues, and update the value of a submission tail doorbell register corresponding to the I/O submission queue in the first set of queues)
As per claim 11, Vyshetsky discloses wherein the NVMe/FC command is to be routed through an NVMe/FC stack in user space. (paragraph 80, lines 14-17, provides high performance via by-passing the software stacks used in conventional systems, while avoiding the need to translate from NVMe (as used by the OS stack 108) and the traffic tunneled over Ethernet to other devices.)
As per claim 12, Vyshetsky discloses wherein the NVMe/FC command is received by the FC HBA via a fiber-channel non-volatile memory express (FC NVMe) interface of a storage controller. (paragraph 4, lines 29-32, network functions may be offloaded into a network interface controller 118 (or NIC) or the network fabric switch, such as via an ethernet connection 120, in turn leading to a network (with various switches, routers and the like))
As per claim 13, Vyshetsky discloses the method further comprising: sending a second NVMe/FC command that is to be routed through a kernel space to a second submission queue, the second submission queue being reserved for use by a kernel space of a storage controller. (paragraph 34, memory device driver creates more queues by reserving a second range of memory addresses mapped for use by the user application process in response to receiving the request for user mode access)
As per claim 14, Vyshetsky discloses wherein the submissions queue and the second submission queue are to communicate concurrently with the initiator device. (paragraph 35, lines 10-14, he user application and the kernel mode process may perform, respectively and in parallel, the virtual memory write operation to the I/O submission queue in the second set of queues and the virtual memory write operation to the I/O submission queue in the first set of queues.)
As per claim 16, Vyshetsky discloses all the limitation as the above but does not explicitly disclose wherein the command corresponds to a Non-Volatile Memory Express over Fibre Channel (NVMe/FC) command. However, Chou discloses this. (paragraph 28, wherein the storage methods including providing NVMe over Ethernet as the protocol used implementing the network storage.)
It would have been obvious to one with ordinary skill in the art before the effective filling date of the claimed invention was made to consider the teachings of Chou with the teaching of Greeene so as to utilize NVMe over Ethernet protocols to implementing storage such as NVMe compliant commands to yield the predictable result so as to control efficiently, thus enhance the system performance.
As per claim 17, Vyshetsky discloses wherein the processing device is to instruct a Fibre Channel Host Bus Adapter (FC HBA) to route the NVMe/FC command to the submission queue. (paragraph 35, lines 6-10, write operation of an I/O command to the I/O submission queue in the first set of queues, and update the value of a submission tail doorbell register corresponding to the I/O submission queue in the first set of queues)
As per claim 18, Vyshetsky discloses wherein the NVMe/FC command is to be routed through an NVMe/FC stack. (paragraph 80, lines 14-17, provides high performance via by-passing the software stacks used in conventional systems, while avoiding the need to translate from NVMe (as used by the OS stack 108) and the traffic tunneled over Ethernet to other devices.)
As per claim 19, Vyshetsky discloses wherein the NVMe/FC command is received by the FC HBA via a fiber-channel non-volatile memory express (FC NVMe) interface of the storage controller. (paragraph 4, lines 29-32, network functions may be offloaded into a network interface controller 118 (or NIC) or the network fabric switch, such as via an ethernet connection 120, in turn leading to a network (with various switches, routers and the like))
As per claim 20, Vyshetsky discloses wherein the processing device is further to: send a second NVMe/FC command that is to be routed through a kernel space to a second submission queue, the second submission queue being reserved for use by a kernel space of a storage controller. (paragraph 34, memory device driver creates more queues by reserving a second range of memory addresses mapped for use by the user application process in response to receiving the request for user mode access)
5. The prior art made of record and not relied upon is considered pertinent to applicant' s disclosure.
Bandic et al. [Pub. No. US2016/0098227] discloses The Non-Volatile Memory express (NVMe) Specification defines a register interface, a command set, and memory structures including a single set of administrative command and completion queues.
Hahn et al. [Pub. No. US2015/0134857) discloses read/write requests with the appropriate queue based on usage, and the IOKit driver (or Storport driver in Windows) can route the corresponding NVMe commands into the appropriate submission queue.
Conclusion
6. Any inquiry concerning this communication or earlier communications from the examiner should be directed to KIM T HUYNH whose telephone number is (571)272-3635 or via e-mail addressed to [kim.huynh3@uspto.gov]. The examiner can normally be reached on M-F 7.00AM- 4:00PM. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Tsai Henry can be reached at (571)272-4176 or via e-mail addressed to [Henry.Tsai@USPTO.GOV].
The fax phone numbers for the organization where this application or proceeding is assigned are (571)273-8300 for regular communications and After Final communications. Any inquiry of a general nature or relating to the status of this application or proceeding should be directed to the receptionist whose telephone number is (571)272-2100.
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/K. T. H./
Examiner, Art Unit 2184
/HENRY TSAI/Supervisory Patent Examiner, Art Unit 2184