Prosecution Insights
Last updated: April 19, 2026
Application No. 18/089,398

Systems And Methods For Securing Input/Output Data

Non-Final OA §102§103§112
Filed
Dec 27, 2022
Examiner
DAVIS, ZACHARY A
Art Unit
2492
Tech Center
2400 — Computer Networks
Assignee
Intel Corporation
OA Round
1 (Non-Final)
54%
Grant Probability
Moderate
1-2
OA Rounds
4y 6m
To Grant
77%
With Interview

Examiner Intelligence

Grants 54% of resolved cases
54%
Career Allow Rate
269 granted / 499 resolved
-4.1% vs TC avg
Strong +23% interview lift
Without
With
+22.9%
Interview Lift
resolved cases with interview
Typical timeline
4y 6m
Avg Prosecution
58 currently pending
Career history
557
Total Applications
across all art units

Statute-Specific Performance

§101
15.0%
-25.0% vs TC avg
§103
26.5%
-13.5% vs TC avg
§102
15.9%
-24.1% vs TC avg
§112
39.0%
-1.0% vs TC avg
Black line = Tech Center average estimate • Based on career data from 499 resolved cases

Office Action

§102 §103 §112
DETAILED ACTION The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Drawings Figures 5 and 6 should be designated by a legend such as --Prior Art-- because only that which is old is illustrated. See MPEP § 608.02(g). Corrected drawings in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. The replacement sheet(s) should be labeled “Replacement Sheet” in the page header (as per 37 CFR 1.84(c)) so as not to obstruct any portion of the drawing figures. If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance. The drawings are objected to because they include informalities. In particular, in Figure 4, element 60, the label “M” is unclear with respect to what this represents and does not appear to correspond to the description in the specification. Corrected drawing sheets in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. The figure or figure number of an amended drawing should not be labeled as “amended.” If a drawing figure is to be canceled, the appropriate figure must be removed from the replacement sheet, and where necessary, the remaining figures must be renumbered and appropriate changes made to the brief description of the several views of the drawings for consistency. Additional replacement sheets may be necessary to show the renumbering of the remaining figures. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance. Specification The abstract of the disclosure is objected to because it includes informalities. In line 2 of the abstract, the terms “decrypting” and “encryption” are not in parallel structure. A corrected abstract of the disclosure is required and must be presented on a separate sheet, apart from any other text. See MPEP § 608.01(b). The disclosure is objected to because of the following informalities: The specification does not include a brief summary of the invention as per 37 CFR 1.73. See also MPEP § 608.01(d). If a summary was intentionally omitted, Applicant is requested to make a statement on the record confirming this omission. The specification includes minor grammatical and other errors. For example, in paragraphs 0017 and 0020, reference is made to various encryption and decryption algorithms for encrypting or decrypting bitstreams; however, the various algorithms mentioned are not stream ciphers and rather are largely block ciphers or public key algorithms. In paragraph 0029, line 3, it appears that “key” should be inserted after “wrapped encryption”. In paragraph 0032, the abbreviation JTAG-AVMM is used without being written out in full. Appropriate correction is required. The above is not intended as an exhaustive list of errors in the specification. Applicant’s cooperation is requested in correcting any other errors of which applicant may become aware in the specification. The use of the terms Blu-Ray and Verilog, for example, which are trade names or marks used in commerce, has been noted in this application. The terms should be accompanied by the generic terminology; furthermore the terms should be capitalized wherever they appear or, where appropriate, include a proper symbol indicating use in commerce such as ™, SM , or ® following the term. Although the use of trade names and marks used in commerce (i.e., trademarks, service marks, certification marks, and collective marks) is permissible in patent applications, the proprietary nature of the marks should be respected and every effort made to prevent their use in any manner which might adversely affect their validity as commercial marks. Claim Objections Claim 8 is objected to because of the following informalities: In Claim 8, line 2, it appears that “of” should be inserted after “outside” for consistency within the claims. Appropriate correction is required. A series of singular dependent claims is permissible in which a dependent claim refers to a preceding claim which, in turn, refers to another preceding claim. A claim which depends from a dependent claim should not be separated by any claim which does not also depend from said dependent claim. However, Claim 7 depends from Claim 2 but is separated from Claim 2 by Claims 3-6 which do not depend from Claim 2. Similarly, Claim 14 depends from Claim 9 but is separated from Claim 9 by Claims 10-13, and Claim 21 depends from Claim 16 but is separated from Claim 16 by Claims 17-20. It should be kept in mind that a dependent claim may refer to any preceding independent claim. In general, applicant's sequence will not be changed. See MPEP § 608.01(n). Claim Rejections - 35 USC § 112 The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph: The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention. Claims 1-21 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention. Claim 1 recites “to transmit a second bitstream” in line 3 and “to apply a first encryption algorithm… to the second bitstream” in lines 7-8. It is not clear whether the second bitstream is transmitted before or after being encrypted. Further, it is not clear whether the second bitstream has any relation to the first bitstream or what else is done with the first bitstream after decryption. The above ambiguities render the claim indefinite. Claim 2 recites “a selection circuit” in line 1 but does not provide any functionality of selecting anything, which makes it unclear what function the selection circuit performs. Claim 3 recites receiving “a decryption key… or an encryption key” in lines 3-4 and uses “or” between the keys in lines 5 and 6; however, the claim uses “and/or” between the keys in line 7, and this is not in clear parallel structure, and it is unclear whether it is required to generate both the wrapped encryption key and wrapped decryption key or if it is sufficient to only generate one of these wrapped keys based on the encryption of the decryption key or the encryption key. Claim 5 recites a “firewall circuit” in line 1 but this does not clearly provide the functionality traditionally associated with a firewall, namely filtering out certain traffic. When a term is used contrary to its ordinary meaning, such term must be clearly redefined in the written description as per MPEP § 2173.05(a); however, “firewall” does not appear to be clearly redefined in the present specification. Claim 7 recites that the decryption circuit is reconfigured “to apply a second decryption algorithm that is different than the first decryption algorithm to decrypt the first bitstream” in lines 2-4. However, because this appears to refer to the same first bitstream as in Claim 1, using a different decryption algorithm would no longer result in successful decryption. Claim 8 recites “transmitting a second bitstream” in line 6 and “applying a first encryption algorithm to the second bitstream” in line 7. It is not clear whether the second bitstream is transmitted before or after being encrypted. Further, it is not clear whether the second bitstream has any relation to the first bitstream or what else is done with the first bitstream after decryption. The above ambiguities render the claim indefinite. Claim 9 recites “a selection circuit” in line 1 but does not provide any functionality of selecting anything, which makes it unclear what function the selection circuit performs. Further, it is not clear whether configuring the decryption circuit and configuring the encryption circuit in lines 3-6 are intended to be steps of the claimed method. Claim 12 recites a “firewall circuit” in line 2 but this does not clearly provide the functionality traditionally associated with a firewall, namely filtering out certain traffic. When a term is used contrary to its ordinary meaning, such term must be clearly redefined in the written description as per MPEP § 2173.05(a); however, “firewall” does not appear to be clearly redefined in the present specification. Claim 14 recites that the decryption circuit is reconfigured “to apply a second decryption algorithm that is different than the first decryption algorithm to decrypt the first bitstream” in lines 2-3. However, because this appears to refer to the same first bitstream as in Claim 8, using a different decryption algorithm would no longer result in successful decryption. Claim 15 recites “to decrypt the first bitstream” in line 6 and “to encrypt the second bitstream” in line 9. It is not clear whether the second bitstream has any relation to the first bitstream, and further, it is not clear what is done with the first bitstream after decryption or with the second bitstream after encryption. The above ambiguities render the claim indefinite. Claim 16 recites “a selection circuit” in line 2 but does not provide any functionality of selecting anything, which makes it unclear what function the selection circuit performs. Further, it is not clear whether configuring “the decryption circuit to apply the first decryption algorithm to decrypt the first bitstream” in lines 4-5 or configuring “the encryption circuit to apply the first encryption algorithm to encrypt the second bitstream” in lines 6-7 are intended to be the same configuration steps as in Claim 15 or distinct steps of configuring. Claim 19 recites a “firewall circuit” in line 2 but this does not clearly provide the functionality traditionally associated with a firewall, namely filtering out certain traffic. When a term is used contrary to its ordinary meaning, such term must be clearly redefined in the written description as per MPEP § 2173.05(a); however, “firewall” does not appear to be clearly redefined in the present specification. Claim 21 recites that the decryption circuit is reconfigured “to apply a second decryption algorithm that is different than the first decryption algorithm to decrypt the first bitstream” in lines 3-5. However, because this appears to refer to the same first bitstream as in Claim 15, using a different decryption algorithm would no longer result in successful decryption. Claims not explicitly referred to above are rejected due to their dependence on a rejected base claim. Claim Rejections - 35 USC § 102 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claims 1, 2, 6-9, 13-16, 20, and 21 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Donlin et al, US Patent 7788502. In reference to Claim 8, Donlin discloses a method that includes receiving and decrypting a first bitstream using a decryption circuit configurable to select a first decryption algorithm to apply from a plurality of decryption algorithms (column 5, lines 5-7, decrypting encrypted bitstreams; column 18, lines 40-53, and column 19, lines 36-67, selecting algorithms and decrypting) and encrypting and transmitting a second bitstream using an encryption circuit configurable to select a first encryption algorithm to apply from a plurality of encryption algorithms (column 8, lines 57-63, and column 13, lines 5-21, encrypting bitstreams; column 18, lines 40-53, and column 19, lines 36-67, selecting algorithms). In reference to Claims 9 and 14, Donlin further discloses configuring the decryption and encryption circuits to apply the first decryption and encryption algorithms and reconfiguring the decryption and encryption circuits to apply different second decryption and encryption algorithms (column 18, lines 40-53, algorithm selected on the fly; column 19, line 36-column 20, line 20, line 24, different algorithms selected). In reference to Claim 13, Donlin further discloses a PLD, FPGA, ASIC, RAM, or GPU device (see column 1, lines 11-16, PLD, FPGA, and throughout). Claims 1, 2, 6, and 7 are directed to integrated circuit devices having functionality corresponding substantially to the methods of Claims 8, 9, 13, and 14, and are rejected by a similar rationale, mutatis mutandis. Claims 15, 16, 20, and 21 are directed to software implementations of the methods of Claims 8, 9, 13, and 14, and are rejected by a similar rationale. Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 3-5, 10-12, and 17-19 are rejected under 35 U.S.C. 103 as being unpatentable over Donlin in view of Newell, US Patent 9672385. In reference to Claim 10, Donlin discloses everything as detailed above with respect to Claim 8, and further discloses receiving a decryption or encryption key (column 9, lines 1-15); however, Donlin does not explicitly disclose wrapping the key. Newell discloses a method that includes receiving encryption or decryption keys and wrapping the received keys by encrypting the keys to generate wrapped encryption or decryption keys (column 8, line 59-column 9, line 13). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the method of Donlin to include the key wrapping of Newell, in order to prevent cloning (see Newell, column 4, lines 1-19). In reference to Claims 11 and 12, Donlin and Newell further disclose generating the wrapping key and preventing unauthorized access to the wrapped keys (Newell, column 7, lines 1-20, generating key; column 4, lines 20-50, protecting key). Claims 3-5 are directed to integrated circuit devices having functionality corresponding substantially to the methods of Claims 10-12, and are rejected by a similar rationale, mutatis mutandis. Claims 17-19 are directed to software implementations of the methods of Claims 10-12, and are rejected by a similar rationale. Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Takeda et al, US Patent 6163612, discloses an IC card used to apply stream ciphers and select an algorithm. Lyle, US Patent 7131004, discloses a method for encrypting and decrypting streams, selecting algorithms, and encrypting the keys. Trimberger, US Patent 7134025, discloses a method that includes encrypting keys before transferring to a PLD. Fang et al, US Patent 9055047, discloses a method for negotiating encryption information. Chen et al, US Patent 9094699, discloses a system in which an ASIC handles streams encrypted with different keys. Scarlata et al, US Patent 11386017, discloses a system that wraps data keys for encrypted bitstreams in an FPGA. Any inquiry concerning this communication or earlier communications from the examiner should be directed to Zachary A Davis whose telephone number is (571)272-3870. The examiner can normally be reached Monday-Friday, 9:00am-5:30pm, Eastern Time. Examiner interviews are available via telephone and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Rupal D Dharia can be reached at (571) 272-3880. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /Zachary A. Davis/Primary Examiner, Art Unit 2492
Read full office action

Prosecution Timeline

Dec 27, 2022
Application Filed
Feb 15, 2023
Response after Non-Final Action
Mar 21, 2026
Non-Final Rejection — §102, §103, §112 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
54%
Grant Probability
77%
With Interview (+22.9%)
4y 6m
Median Time to Grant
Low
PTA Risk
Based on 499 resolved cases by this examiner. Grant probability derived from career allow rate.

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