DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Priority
Acknowledgment is made of applicant's claim for foreign priority based on an application filed in Taiwan on 12/30/2021. It is noted, however, that applicant has not filed a certified copy of the TW110149574 application as required by 37 CFR 1.55. Note: a certified copy was submitted on 02/01/2023 with the application TW111208140, which is different from the application being claimed for foreign priority.
Drawings
The drawings are objected to under 37 CFR 1.83(a). The drawings must show every feature of the invention specified in the claims. Therefore, the limitation of claim 16, where the selection circuit configured to selectively provide the first, second, third mask values and the first and second masked values to the carry-lookahead generator must be shown or the feature(s) canceled from the claim(s). As illustrated in figure 1, the first, second, third mask values (e.g., rx,ry,rz) and the first and second masked values (e.g., x’, y’) are provided to the secured carry-lookahead adder 150, rather than the carry-lookahead generator (e.g., 340 in figures 3A or 3B). (Examiner suggests amending the claim 16 to recite “the carry-lookahead adder” in line 7, rather than “the carry-lookahead generator”. No new matter should be entered.
Corrected drawing sheets in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. The figure or figure number of an amended drawing should not be labeled as “amended.” If a drawing figure is to be canceled, the appropriate figure must be removed from the replacement sheet, and where necessary, the remaining figures must be renumbered and appropriate changes made to the brief description of the several views of the drawings for consistency. Additional replacement sheets may be necessary to show the renumbering of the remaining figures. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance.
Claim Interpretation
The following is a quotation of 35 U.S.C. 112(f):
(f) Element in Claim for a Combination. – An element in a claim for a combination may be expressed as a means or step for performing a specified function without the recital of structure, material, or acts in support thereof, and such claim shall be construed to cover the corresponding structure, material, or acts described in the specification and equivalents thereof.
The claims in this application are given their broadest reasonable interpretation using the plain meaning of the claim language in light of the specification as it would be understood by one of ordinary skill in the art. The broadest reasonable interpretation of a claim element (also commonly referred to as a claim limitation) is limited by the description in the specification when 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, is invoked.
As explained in MPEP § 2181, subsection I, claim limitations that meet the following three-prong test will be interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph:
(A) the claim limitation uses the term “means” or “step” or a term used as a substitute for “means” that is a generic placeholder (also called a nonce term or a non-structural term having no specific structural meaning) for performing the claimed function;
(B) the term “means” or “step” or the generic placeholder is modified by functional language, typically, but not always linked by the transition word “for” (e.g., “means for”) or another linking word or phrase, such as “configured to” or “so that”; and
(C) the term “means” or “step” or the generic placeholder is not modified by sufficient structure, material, or acts for performing the claimed function.
Use of the word “means” (or “step”) in a claim with functional language creates a rebuttable presumption that the claim limitation is to be treated in accordance with 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph. The presumption that the claim limitation is interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, is rebutted when the claim limitation recites sufficient structure, material, or acts to entirely perform the recited function.
Absence of the word “means” (or “step”) in a claim creates a rebuttable presumption that the claim limitation is not to be treated in accordance with 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph. The presumption that the claim limitation is not interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, is rebutted when the claim limitation recites function without reciting sufficient structure, material or acts to entirely perform the recited function.
Claim limitations in this application that use the word “means” (or “step”) are being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, except as otherwise indicated in an Office action. Conversely, claim limitations in this application that do not use the word “means” (or “step”) are not being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, except as otherwise indicated in an Office action.
This application includes one or more claim limitations that do not use the word “means,” but are nonetheless being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, because the claim limitation(s) uses a generic placeholder that is coupled with functional language without reciting sufficient structure to perform the recited function and the generic placeholder is not preceded by a structural modifier. Such claim limitation(s) is/are:
“a first mask unit" in claim 1. Figures 3A-3B illustrate the first mask unit 312/310 as a XOR gate.
“a second mask unit" in claim 1. Figures 3A-3B illustrate the second mask unit 314 as a XOR gate.
"a first mask unit" in claim 8. Figure 1 illustrates the XOR gate 124.
"a second mask unit" in claim 8. Figures 3A-3B illustrate the second mask unit 312/310 as a XOR gate.
"a third mask unit" in claim 8. Figures 3A-3B illustrate the third mask unit 314 as a XOR gate 355.
Because this/these claim limitation(s) is/are being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, it/they is/are being interpreted to cover the corresponding structure described in the specification as performing the claimed function, and equivalents thereof.
If applicant does not intend to have this/these limitation(s) interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, applicant may: (1) amend the claim limitation(s) to avoid it/them being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph (e.g., by reciting sufficient structure to perform the claimed function); or (2) present a sufficient showing that the claim limitation(s) recite(s) sufficient structure to perform the claimed function so as to avoid it/them being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph.
Claim Rejections - 35 USC § 101
35 U.S.C. 101 reads as follows:
Whoever invents or discovers any new and useful process, machine, manufacture, or composition of matter, or any new and useful improvement thereof, may obtain a patent therefor, subject to the conditions and requirements of this title.
Claims 18-20 are rejected under 35 U.S.C. 101 because the claimed invention is directed to an abstract idea without significantly more.
Claim 18 recites a method for performing carry-lookahead addition
Under Prong One of Step 2A of the USPTO current eligibility guidance (MPEP 2106), the claim limitations cover mathematical calculations, relationship, and/or formula, such as a method for performing carry-lookahead addition, comprising: obtaining a variable according to a first mask value and a second mask value (see at least [0025] describes equation 3 for obtaining variable Rxy by performing XOR operation on mask values rx and ry); performing a first mask operation on first input data corresponding to the first mask value with the variable, to obtain first masked data (see at least equation 6 [0026] describing performing XOR operation on Rxy and y’ to obtain y’’); obtain an intermediate generation value and a propagation value according to the first masked data and second input data corresponding to the second mask value (see at least equations 16 and 18 [0028] to perform XOR operation and AND operation to obtain propagation value P and intermediate generation value G); performing a second mask operation on the propagation value with a third mask value, to obtain second masked data (see at least equation 25 [0031] describes XOR operation on P’ and rz to obtain D3, see figure 3A); providing a generation value according to the propagation value, the intermediate generation value and the second mask value (see at least equation 23 [0029] describes combination of XOR and AND operations to generate a generation value G); obtain a carry output and a carry value according to a carry input, the generation value and the propagation value (see at least equation 26 [0032] describes the generation of C and Cout according to G,P,Cin, wherein [0044] describes further equations 31-34 to generate C and Cout); and obtaining a sum output according to the second masked data and the carry value (see at least equation 25 [0031] describes equation to generate Sout). Therefore, the claim includes limitations that fall within the “Mathematical Concepts” grouping of abstract ideas. Accordingly, the claim recites an abstract idea.
Under Prong Two of Step 2A, this judicial exception is not integrated into a practical application. The claim additionally recites a half adder, a carry-lookahead generator, and different XOR gates to perform first and second mask operations. However, the additional elements are recited at a high level of generality, i.e., as computer components for performing a computer functions of processing data. Such additional elements fail to provide a meaningful limitation on the judicial exception, and amount to no more than mere instructions to apply the exception using computer elements. Thus, the claim is directed to an abstract idea.
Under Step 2B, the claim does not include additional elements that are sufficient to amount to significantly more than the judicial exception. As discussed previously with respect to the step 2A prong two, the additional elements in the claim amount to no more mere instructions to apply the exception. Thus, the claim does not provide an inventive concept that is furnished by an element or combination of elements that is recited in the claim in addition to (beyond) the judicial exception similar to claims 1 and 8 or as illustrated in figure 3A to illustrates or recite particular structure that performs the claimed functions as a particular machine. Therefore; the additional elements recited fails to ensure the claim as a whole amount to significantly more than the judicial exception itself. Accordingly, the claim is not patent-eligible under 35 U.S.C 101.
Claim 19 recites performing a third mask operation on first data with the first mask value, to obtain the first input data; and performing a fourth mask operation on second data with the second mask value, to obtain the second input data. Such limitations cover mathematical calculations, relationship, and/or formula (see at least equations 1 and 2 [0024] describes performing XOR operations to generate x’ and y’). The claim does not recite additional element that would integrate the judicial exception into a practical application under step 2A prong two or ensure the claim as a whole amount to significantly more than the judicial exception itself under step 2B. Accordingly, the claim is not patent-eligible under 35 U.S.C. 101.
Claim 20 recites generating the first mask value, the second mask value and the third mask value, such limitation, under broadest reasonable interpretation, cover the performance of human mind, such as one of ordinary skill in the art can generate mask values based on randomly selecting values. Thus, the limitation falls within the “Mental Processes” grouping of abstract ideas. The claim further recites a random number generator, but such limitation is recited at a high level of generality, e.g., a computer component performing computer function. Thus, such additional element fails to provide a meaningful limitation on the judicial exception, and amounts to no more than mere instructions to apply the exception using computer element, which fails to integrate the judicial exception into a practical application under step 2A prong two or ensures the claim as a whole amount to significantly more than the judicial exception itself under step 2B. Accordingly, the claim is not patent-eligible under 35 U.S.C. 101.
Double Patenting
The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969).
A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on nonstatutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP § 2146 et seq. for applications not subject to examination under the first inventor to file provisions of the AIA . A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b).
The filing of a terminal disclaimer by itself is not a complete reply to a nonstatutory double patenting (NSDP) rejection. A complete reply requires that the terminal disclaimer be accompanied by a reply requesting reconsideration of the prior Office action. Even where the NSDP rejection is provisional the reply must be complete. See MPEP § 804, subsection I.B.1. For a reply to a non-final Office action, see 37 CFR 1.111(a). For a reply to final Office action, see 37 CFR 1.113(c). A request for reconsideration while not provided for in 37 CFR 1.113(c) may be filed after final for consideration. See MPEP §§ 706.07(e) and 714.13.
The USPTO Internet website contains terminal disclaimer forms which may be used. Please visit www.uspto.gov/patent/patents-forms. The actual filing date of the application in which the form is filed determines what form (e.g., PTO/SB/25, PTO/SB/26, PTO/AIA /25, or PTO/AIA /26) should be used. A web-based eTerminal Disclaimer may be filled out completely online using web-screens. An eTerminal Disclaimer that meets all requirements is auto-processed and approved immediately upon submission. For more information about eTerminal Disclaimers, refer to www.uspto.gov/patents/apply/applying-online/eterminal-disclaimer.
Claims 1-5 and 18 provisionally rejected on the ground of nonstatutory double patenting as being unpatentable over claims 2-6 of copending Application No. 19/011,927 (reference application). Although the claims at issue are not identical, they are not patentably distinct from each other because the examined claims are broader than the reference claims. Therefore, the examined claims are anticipated by the reference claims
This is a provisional nonstatutory double patenting rejection because the patentably indistinct claims have not in fact been patented.
At least one claim is compared in the following table:
Instant Application 18/089,762
Co-pending Application 19/011,927
1. A carry-lookahead adder, comprising:
2. The secure adder as claimed in claim 1, wherein the secure carry- lookahead adder further comprises:
a first exclusive-OR (XOR) gate configured to receive a first mask value and a second mask value, to provide a variable;
a first exclusive-OR (XOR) gate, configured to receive the first mask value and the second mask value, to provide a variable;
a first mask unit configured to perform a first mask operation on first input data corresponding to the first mask value with the variable, to obtain first masked data;
a second mask unit, configured to perform a third mask operation on the first masked data according to the variable, to obtain third masked data;
a half adder configured to receive the first masked data and second input data corresponding to the second mask value, to generate a propagation value and an intermediate generation value;
a half adder, configured to receive the third masked data and the second masked data, to generate a propagation value and an intermediate generation value;
a second mask unit configured to perform a second mask operation on the propagation value with a third mask value, to obtain second masked data
a third mask unit, configured to perform a fourth mask operation on the propagation value according to the third mask value, to obtain fourth masked data;
a logic circuit configured to provide a generation value according to the propagation value, the intermediate generation value and the second mask value;
a first logic circuit, configured to provide a generation value according to the propagation value, the intermediate generation value, and the second mask value;
a carry-lookahead generator configured to provide a carry output and a carry value according to a carry input, the generation value and the propagation value; and
a carry-lookahead generator, configured to provide a carry output and a carry value according to a carry input, the generation value, and the propagation value;
a second XOR gate configured to receive the second masked data and the carry value, to provide a sum output.
a second XOR gate, configured to receive the fourth masked data and the carry value, to provide a sum output.
Allowable Subject Matter
Claims 1-5 would be allowable if rewritten or amended to overcome the double patenting rejection set forth in this Office action.
Claims 6-7 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Claims 8-17 are allowed.
Claims 18-20 would be allowable if rewritten or amended to overcome the rejection under 35 U.S.C. 101 and double patenting as appropriate set forth in this Office action.
The following is a statement of reasons for the indication of allowable subject matter:
Regarding claims 1, 8, and 18, the prior art of records does not teach or suggest a combination of limitations, including a combination of XOR gates, a half adder, and a carry lookahead generator to perform the claimed functions of masking and addition to implement a carry lookahead adder.
Guilley – US 20210165633 teaches an exection of the cryptographic operation includes at least one arithmetic addition operation between a first operand and a second operand, each operand comprises a set of components, each component corresponding to a given bit position of the operand. Each elementary adder has a sum output corresponding to the bitwise addition and a carry output, the result of the arithmetic addition operation being derived from the sum outputs provided by each elementary adder. The device is configured to apply a mask to each operand component input of at least some of the elementary adders using a masking logical operation, the mask being a random number. Figure 2 illustrates masking unit configured to mask the input by performing XOR operation and fed the masked values to the adders, which maybe implemented as carry-look ahead adder [0030]. However, Guilley does not teach or suggest the carry look-ahead adder having a combination of XOR gates, a half adder, and a carry lookahead generator to perform the claimed functions of masking and addition as required in the independent claims.
Karroumi – NPL Addition with Blinded Operands (IDS filed on 12/28/2022) – teaches a masking countermeasure in cryptographic algorithm against Differential Power Analysis and similar attacks, wherein a masking technique involves applying an XOR operation and result in a blinded operation, such as s = (x+y) XOR rs as illustrated in algorithm 2. However, Karroumi does not teach or suggest the combination of XOR gates, a half adder, and a carry lookahead generator to perform the claimed functions of masking and addition to implement a carry lookahead adder.
Lu – US 6591286 teaches an implementation of a carry look-ahead adder as illustrated in figure 3 using AND gates and half adders. However, Lu does not teach or suggest a carry look-ahead adder having a combination of XOR gates, a half adder, and a carry lookahead generator to perform the claimed functions of masking and addition as recited in independent claims.
Karroumi – US 9544131 teaches a system and method for performing modular addition between two integer values x and y, wherein the method includes obtaining a first masked value x and a second masked value y, a first mask value rx and a second mask value ry, and outputting a masked result. However, Karroumi does not teach or suggest a carry look-ahead adder having a combination of XOR gates, a half adder, and a carry lookahead generator to perform the claimed functions of masking and addition as recited in independent claims.
Heiss – US 20150220307 teaches an operation based on two operands that are being masked, wherein the operation being a carry-lookahead operation. [0087-0105] provides example of arithmetic operation being performed on operands, where the operands are masked by performing XOR operation. However, Heiss does not teach or suggest a carry look-ahead adder having a combination of XOR gates, a half adder, and a carry lookahead generator to perform the claimed functions of masking and addition as recited in independent claims.
Therefore, the prior art of records does not teach or suggest the combination of limitations as required in the independent claims.
Conclusion
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/HUY DUONG/Examiner, Art Unit 2182 (571)272-2764