Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Amendment
Applicant’s amendment to claim 15 to correct typographical issues is acknowledged. The objection to claim 15 is withdrawn.
Applicant’s cancellation of claims 7 and 22 – 25 is acknowledged.
Applicant’s addition of claims 26 and 27 is acknowledged.
Claim Objections
Claim 21 is objected to because of the following informalities:
Claim 21 states “…the oxide layer…”. It appears that the claim is referring to the “bonding oxide layer” as introduced in claim 15. Claim 21 should be corrected to state “the bonding oxide layer” to be consistent with claim 15.
Appropriate correction is required.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claim(s) 1 – 6 and 8 – 10 is/are rejected under 35 U.S.C. 102(a)(2) as being anticipated by US 20140361341 A1 hereinafter Sriram.
For claim 1, Sriram teaches “A device comprising: a first layer, wherein the first layer includes a conductive layer (fig. 2 numeral 38) and a bonding oxide layer on and in direct physical contact with a top surface of the conductive layer (fig. 2 numeral 52; Par. [0047]); a second layer (fig. 2 numeral 48, 49a,56,44, 42), wherein the second layer is on top of the first layer, and wherein the second layer includes a semiconductor structure on top of the bonding oxide layer (fig. 2 numeral 48); and wherein a portion of the conductive layer is proximate to the semiconductor structure (fig. 2 shows the conductive layer 38 being near the semiconductor structure 48).”
For claim 2, Sriram teaches “The device of claim 1, wherein the conductive layer and the semiconductor structure are separated by a distance perpendicular to the bonding oxide layer that is less than 100 nm (Par. [0049] teaches the bonding oxide 52 that separates the structure 48 and the first layer 38 as being between 50 to 1500 angstroms, which is less than 100 nm).”
For claim 3, Sriram teaches “The device of claim 1, wherein the first layer includes a selected one or more of: GaN, Al, AlGaN, SiC, SiGe, a group III-V material, or Si (Par. [0039]).”
For claim 4, Sriram teaches “The device of claim 1, wherein the conductive layer is a selected one or more of: a metal layer or a conductive semiconductor region (Par. [0039]; fig. 2 numeral 40).”
For claim 5, Sriram teaches “The device of claim 4, wherein the conductive semiconductor region is a doped region of SiC, group III-V, Si, GaN, or AlGaN, or a 2D electron gas induced by a junction of AlGaN and GaN (Par. [0038 – 0039]).”
For claim 6, Sriram teaches “The device of claim 1, wherein the conductive layer is adjacent to the bonding oxide layer (fig. 2 shows the conductive layer 38 next to the bonding oxide layer 52).”
For claim 8, Sriram teaches “The device of claim 1, wherein the device is a transistor (Abstract; Par. [0034]).”
For claim 9, Sriram teaches “The device of claim 1, wherein the semiconductor structure is a portion of a transistor (fig. 2 shows the semiconductor structure 48 is a part of the transistor 30).”
For claim 10, Sriram teaches “The device of claim 9, wherein the portion of the conductive layer is a selected one or more of: a back gate structure or a field plate (Par. [0010]; Par. [0051 – 0052]).”
Claim(s) 26 is/are rejected under 35 U.S.C. 102(a)(2) as being anticipated by US 20220285434 A1 hereinafter Shen.
For claim 26, Shen teaches “A device comprising: a first layer, wherein the first layer includes a conductive layer (fig. 2D numeral 242) and a bonding oxide layer on top of the conductive layer (fig. 3A numeral 146; Par. [0045]); a second layer, wherein the second layer is on top of the first layer, and wherein the second layer includes a semiconductor structure on top of the bonding oxide layer (fig. 3A numeral 200; Par. [0045]); wherein a portion of the conductive layer is proximate to the semiconductor structure, wherein the portion of the conductive layer is a first portion of the conductive layer, and a second portion of the conductive layer, wherein the first portion of the conductive layer and the second portion of the conductive layer are electrically isolated from each other (fig. 3A and fig. 2D shows conductive layers 242 isolated from each other by the bonding oxide layer 146 and liner layer 254; Par. [0040] describes the conductive layers being isolated from other layers).”
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 13 – 14 is/are rejected under 35 U.S.C. 103 as being unpatentable over US 20140361341 A1 hereinafter Sriram.
For claim 13, Sriram teaches all of claim 1. Sriram does not explicitly state that the second layer includes silicon, and wherein the semiconductor structure includes silicon. However, Sriram does state the common use of silicon in transistor devices and in the structures in the transistors (Par. [0004 – 0009]). It would have been obvious to one of ordinary skill in the art before the effective filing date of the immediate invention that the semiconductor structure and second layer in Sriram can include silicon as silicon is used as a common material in Sriram and as silicon is a common used material in semiconductor devices and structures such as transistors and gates. It has been held to be within the general skill of a worker in the art to select a known material on the basis of its suitability for the intended use as a matter of obvious design choice. In re Leshin, 125 USPQ 416 (CCPA 1960).
For claim 14, Sriram teaches all of claim 1. Sriram does not explicitly state that the operation of the device, the portion of the conductive layer alters an electric field generated by the semiconductor structure. However, Sriram teaches all the structural limitations of the device and would inherently perform the function of altering the electric field generated by the semiconductor structure. A claim containing a recitation with respect to the manner in which a claimed apparatus is intended to be employed does not differentiate the claimed apparatus from a prior art apparatus if the prior art apparatus teaches all the structural limitations of the claim. See Ex parte Masham, 2 USPQ2d 1647 (Bd. Pat. App. & Inter. 1987).
Claim(s) 15 – 18, and 20 is/are rejected under 35 U.S.C. 103 as being unpatentable over US 20140361341 A1 hereinafter Sriram.
For claim 15, Sriram teaches a transistor (fig. 2 numeral 30) comprising: a first layer, wherein the first layer includes a conductive layer (fig. 2 numeral 38) above a layer that includes gallium (Ga) and nitrogen (N) (fig. 2 numeral 36, Par. [0038]), and a bonding oxide layer on and in direct physical contact with a top surface of the conductive layer (fig. 2 numeral 52); a second layer on the first layer, wherein the second layer includes a body and is on top of the bonding oxide layer (fig. 2 numeral 48); and wherein the body is proximate to a portion of the conductive layer (fig. 2 shows the body near a portion of the conductive layer 38).
Sriram does not explicitly state that the second layer includes silicon, and wherein the semiconductor structure includes silicon. However, Sriram does state the common use of silicon in transistor devices and in the structures in the transistors (Par. [0004 – 0009]). It would have been obvious to one of ordinary skill in the art before the effective filing date of the immediate invention that the semiconductor structure and second layer in Sriram can include silicon as silicon is used as a common material in Sriram and as silicon is a common used material in semiconductor devices and structures such as transistors and gates. It has been held to be within the general skill of a worker in the art to select a known material on the basis of its suitability for the intended use as a matter of obvious design choice. In re Leshin, 125 USPQ 416 (CCPA 1960).
Sriram does not explicitly state that the conductive layer forms a back gate structure for the body. However, Sriram teaches all of the structural limitations of the device and includes the conductive layer (fig. 2 numeral 38) being on the back side of the transistor including the gate (fig. 2 numeral 48). It would have been obvious to one of ordinary skill in the art before the effective filing date of the immediate invention that the conductive layer and body in Sriram forms a back gate structure for the body as the structure is Sriram is the same and would perform a similar function. Where the claimed and prior art products are identical or substantially identical in structure or composition, or are produced by identical or substantially identical processes, a prima facie case of either anticipation or obviousness has been established. In re Best, 562 F.2d 1252, 1255, 195 USPQ 430, 433 (CCPA 1977).
For claim 16, Sriram teaches all of claim 15. Sriram also teaches the conductive layer and the body are separated by a distance perpendicular to the bonding oxide layer that is less than 100 nm (Par. [0049] teaches the bonding oxide 52 that separates the structure 48 and the first layer 38 as being between 50 to 1500 angstroms, which is less than 100 nm).
For claim 17, Sriram teaches all of claim 15. Sriram also teaches the conductive layer is adjacent to the bonding oxide layer (fig. 2 shows the conductive layer 38 next to the bonding oxide layer 52).
For claim 18, Sriram teaches all of claim 15. Sriram also teaches the source contact extending through the bonding oxide layer and coupled with a portion of the conductive layer (fig. 2 numeral 44 and 42).
For claim 20, Sriram teaches all of claim 15, wherein the conductive layer is a 2D electron gas (2DEG) channel (Par. [0039 - 0041]).
Claim(s) 11 and 19 is/are rejected under 35 U.S.C. 103 as being unpatentable over US 20140361341 A1 hereinafter Sriram in further view of US 20180204916 A1 hereinafter Shimizu.
For claim 11, Sriram teaches all of claim 1. Sriram is silent regarding an electrical connection extending from the second layer through the bonding oxide layer and into the first layer, wherein the electrical connection is electrically coupled with the portion of the conductive layer.
Shimizu teaches a first layer including a conductive layer (Shimizu, fig. 1 numeral 16), a bonding oxide on top of the first layer (fig. 1 numeral 28), a second layer on top of the bonding oxide layer and extending through the bonding oxide layer into the first layer, creating an electrical connection between the second layer and the conductive layer (fig. 1 numeral 24 and 22).
It would be obvious to one of ordinary skill in the art before the effective filing date of the immediate invention to combine the electrical connection in Shimizu with the first layer and bonding oxide in Sriram in order to suppress current collapse in the device (Shimizu, Par. [0099]).
For claim 19, Sriram teaches all of claim 15. Sriram also teaches a gate (Sriram, fig. 2 numeral 46 and 48) between a source contact and a drain contact (fig. 2 numeral 42 and 44). Sriram is silent regarding the gate extending around the body and through the bonding oxide layer, and wherein the gate is electrically coupled with the portion of the conductive layer.
Shimizu teaches a first layer, wherein the first layer includes an electrically conductive layer that includes gallium and nitrogen (Shimizu, fig. 1 numeral 16; Par. [0051]), and a bonding oxide layer on top of the conductive layer (fig. 1 numeral 28; Par. [0045]); a second layer on the first layer, wherein the second layer includes a body wherein the body includes silicon and is on top of the bonding oxide layer (fig. 1 numeral 30; Par. [0045]); and wherein the body is proximate a portion of the conductive layer (fig. 1 shows the conductive layer 16 near the body 30); a gate (fig. 1 numeral 22 and 24) between a source contact and a drain contact (fig. 1 numeral 18 and 20), wherein the gate extends around the body and through the bonding oxide layer and the gate is electrically coupled with the portion of the conductive layer (fig. 1 shows gate 22 and 24 through and around the oxide 28 and in contact with the conductive layer 16).
It would be obvious to one of ordinary skill in the art before the effective filing date of the immediate invention to combine the electrical connection and gate in Shimizu with the first layer and bonding oxide in Sriram in order to suppress current collapse in the device (Shimizu, Par. [0099]).
Claim(s) 27 is/are rejected under 35 U.S.C. 103 as being unpatentable over US 20180204916 A1 hereinafter Shimizu.
For claim 27, Shimizu teaches a first layer, wherein the first layer includes an electrically conductive layer that includes gallium and nitrogen (fig. 1 numeral 16; Par. [0051]), and a bonding oxide layer on top of the conductive layer (fig. 1 numeral 28; Par. [0045]); a second layer on the first layer, wherein the second layer includes a body wherein the body includes silicon and is on top of the bonding oxide layer (fig. 1 numeral 30; Par. [0045]); and wherein the body is proximate a portion of the conductive layer (fig. 1 shows the conductive layer 16 near the body 30); a gate (fig. 1 numeral 22 and 24) between a source contact and a drain contact (fig. 1 numeral 18 and 20), wherein the gate extends around the body and through the bonding oxide layer and the gate is electrically coupled with the portion of the conductive layer (fig. 1 shows gate 22 and 24 through and around the oxide 28 and in contact with the conductive layer 16). Shimizu does not explicitly state that conductive layer forms a back gate structure for the body. However, claim language referring intended use and other types of functional language must result in a structural difference between the claimed invention and the prior art to patentably distinguish the claimed invention from the prior art. If the prior art structure is capable of performing the intended use, then it meets the claim. In re Casey, 152 USPQ 235 (CCPA 1967); In re Otto, 136 USPQ 458, 459 (CCPA 1963). Claim 27 appears to be stating the intended use of the conducive layer, that use being to act as a back gate structure for the body. As all the structural limitations appear to be taught by Shimizu, it would be obvious to one of ordinary skill in the art before the effective filing date of the immediate invention that the conductive layer in Shimizu may act as a back gate structure for the body of the device.
Allowable Subject Matter
Claims 12 and 21 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
For claim 12, Sriram, Shen, and Shimizu do not appear to teach the first and second portions of the conductive layer being isolated from each other.
For claim 21, Sriram, Shen, and Shimizu do not appear to teach an AlGaN layer between the oxide layer and the portion of the conductive layer, wherein the portion of the conductive layer includes GaN, and wherein the 2DEG channel is proximate to the AlGaN layer. Claim 21 is also objected to for a typographical error regarding the term oxide layer being used instead of bonding oxide layer.
Response to Arguments
Applicant’s arguments with respect to claim(s) 1 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument.
Conclusion
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
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/J.T.N./Examiner, Art Unit 2815
/MONICA D HARRISON/Primary Examiner, Art Unit 2815
