DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Amendment
Acknowledgement is made of the amendment filed on 2/12/2026 in which claims 1, 3, and 4 were amended. No claims were cancelled and claims 5 and 6 were added. The amendments overcome the claim objections. However, in regards to the specification objection, it appears that the paragraph numbers recited in the amendment are numbered incorrectly and the paragraph numbers were all erroneously incremented by 1, the examiner believes they should be [0014], [0020], etc. instead of [0015], [0021], etc.. Therefore, claims 1-6 are pending examination below.
Response to Arguments
Applicant’s arguments are not found to be persuasive.
Applicant argues that “Kondo turns on the switch 195 (claimed external FET) according to the control signal received from the processor. In contrast, the claimed disclosure receives a power-down control signal in response to turn-on of an external FET, i.e., a reverse process as compared to Kondo. Further, Kondo transmits a control signal to the switch 195 to disable (open) the switch 195, rather than outputting a power-down release signal to the control circuit in response to turn-off the external FET as claimed.”
The examiner disagrees. The turning on of the switch 195 of Kondo allows a signal, the claimed power-down control signal, to be sent in order to disable discharge resulting in the electrical isolation of the battery or a power down function as recited in Kondo ¶39 “transmit a control signal to the switch 195 to enable (close) the switch, thus connecting the first power line 171 to the current monitor terminal 190. By electrically connecting the current monitor terminal to the first power line 171, the signal on the current monitor terminal 190 increases, which is interpreted by the second protection control circuit 140 as an over-current event. When the second protection control circuit 140 detects the over-current event, it turns off the second discharge control device 160, thus electrically isolating the battery 120 (310) and preventing current from flowing from the fourth terminal”. Although there is mention of a control signal to actuate the switch 195 as the first step, this is not the only signal being sent and is not equated to the claimed power-down control signal but just an initial signal to actuate the switch. Kondo discloses that, even though there is an initial control signal sent to the switch 195, there is another signal (claimed power-down control signal) that the monitor terminal 190 sees which then causes the circuit to act. Also recited in ¶39 “After the switch 195 has been disabled (open), the second protection control circuit 140 may keep the discharge control device 160 in a turned-off condition (also referred to as a latch mode) until a charge operation is started (e.g., by charging the battery 120 with the charger 115)” which reasonably discloses that when the switch 195 is opened a signal is sent (claimed power-down release signal) to the control circuit. Then based on this “power-down release signal” the control circuit makes the decision when to reconnect the battery, where Kondo gives the example of a charging operation being started.
Specification
The disclosure is objected to because of the following informalities: in the amendment to the specification dated 2/12/2026 it appears that the paragraph numbers recited in the amendment are numbered incorrectly and the paragraph numbers were all erroneously incremented by 1, the examiner believes they should be [0014], [0020], etc. instead of [0015], [0021], etc..
Appropriate correction is required.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claims 1-6 are rejected under 35 U.S.C. 103 as being unpatentable over Shibata US 20200067326 in view of Kondo US 20220014034.
With regards to claim 1 Shibata discloses, a charge and discharge control circuit [Fig. 1 and Abstract “A battery protection circuit protects a rechargeable battery”] provided with
a power-down function [Abstract “A detection circuit detects a power source voltage between power source and ground terminals, and a control circuit pulls down a monitor terminal potential to a ground terminal potential by turning off the transistor and stopping battery discharge when the power source voltage lower than an overdischarge detection voltage is detected”], the charge and discharge control circuit comprising:
an external terminal voltage input port [Fig. 1 monitor terminal V- 18] connected to
an external terminal [negative terminal P- 6) via
an external resistor [resistor 14];
a detector [detection circuit 20] and
an external terminal voltage detector [monitor circuit 34] which are connected to the external terminal voltage input port [Fig. 1 discloses that the detectors are connected to the port]; and
a control circuit [control circuit 32], wherein the detector outputs
a power-down detection signal [¶26 “The monitor terminal 18 (V− terminal) is used to monitor a potential of the negative terminal 6, and is connected to the negative terminal 6. The monitor terminal 18 (V− terminal) is used by a control circuit 32 to monitor an existence of a connection of the charger 91 or the load 90 to the terminals 5 and 6”] to the control circuit and
a charger is connected to the external terminal [charger 91 connected to the external terminal P- 6].
Shibata fails to disclose in a case where the external terminal voltage input port receives a power-down control signal in response to turn-on of an external FET, and outputs a power-down release signal to the control circuit in response to turn-off the external FET.
However, Kondo discloses in a case where the external terminal voltage input port receives a power-down control signal in response to turn-on of an external FET [Fig 2 Switch 195 and ¶39 “For example, the processor 220 may detect (e.g., by way of the voltage detector 205) that the battery 120 has been electrically connected to the fuel gauge circuit 130 and, in response, transmit a control signal to the switch 195 to enable (close) the switch, thus connecting the first power line 171 to the current monitor terminal 190. By electrically connecting the current monitor terminal to the first power line 171, the signal on the current monitor terminal 190 increases, which is interpreted by the second protection control circuit 140 as an over-current event. When the second protection control circuit 140 detects the over-current event, it turns off the second discharge control device 160, thus electrically isolating the battery 120 (310) and preventing current from flowing from the fourth terminal if it comes in contact with another battery pack terminal during shipping” further ¶30 describes how the processor 230/220 has 230 which sends the detection of the power-down detection signal to 220], and
outputs a power-down release signal to the control circuit in response to turn-off the external FET [¶39 “After the switch 195 has been disabled (open), the second protection control circuit 140 may keep the discharge control device 160 in a turned-off condition (also referred to as a latch mode) until a charge operation is started (e.g., by charging the battery 120 with the charger 115)” and ¶34 “The switch 195 may comprise any suitable switch device, such as a transistor”].
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the protection circuits of Shibata and Kondo in order to utilize a switch/FET which isolates the battery in order to prevent current leakage and short circuits.
With regards to claim 2, the combination discloses, the charge and discharge control circuit according to claim 1, wherein the detector is composed of a Schmitt trigger circuit [Shibata ¶35 and 36 details the workings of the detection circuit 20 which comprises two resistors 21 and 22, a comparator 23, and a voltage reference Vref 24, where the detection circuit 20 functions as a Schmitt trigger using two different voltage thresholds, Vdet and Vrel, for detection and reset].
With regards to claim 3 Shibata discloses, a battery device comprising: a secondary cell [battery 70];
a first external terminal [positive terminal P+ 5] connected to
a first electrode of the secondary cell [battery 70];
a charge and discharge control FET [transistors 1 and 2] connected to
a second electrode of the secondary cell [battery 70];
a second external terminal [negative terminal P- 6] connected to the charge and discharge control FET [transistors 1 and 2];
a resistor [resistor 14] connected between the first external terminal [positive terminal P+ 5] and the second external terminal [negative terminal P- 6]; and the charge and discharge control circuit according to claim 1, comprising:
a positive electrode power supply terminal [VDD 15] connected to
a positive electrode of the secondary cell [battery 70];
a negative electrode power supply terminal [VSS 13] connected to
a negative electrode of the secondary cell [battery 70];
the external terminal voltage input port [monitor terminal V- 18] connected to
a connection point between the external FET and the resistor [resistor 14]; and
a charge control terminal and a discharge control terminal [Dout 12 and Cout 11] connected to the charge and discharge control FET [transistors 1 and 2].
Shibata fails to disclose the external FET and a resistor which are connected in series.
However, Kondo discloses the external FET and a resistor which are connected in series [Fig 2 resistor connected in series with switch 195].
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the battery protection circuits of Shibata and Kondo to connect the protection circuit as disclosed to actuate the switch/FET on/off which isolates the battery in order to prevent current leakage and short circuits. The series connection of known circuit elements which perform the same known function is considered an obvious combination and design choice with no unexpected results. Please see MPEP § 2144.04 (Design Choice).
With regards to claim 4 the combination discloses, the battery device according to claim 3, comprising a controller [Kondo Figs 1 and 2 processor 220 of circuit 130] connected between the first external terminal [first terminal 170] and the second external terminal [fourth terminal 185] and controlling the external FET [switch 195].
With regards to claim 5 the combination discloses, the charge and discharge control circuit according to claim 1, further comprising a positive electrode power supply terminal [Shibata fig 1 VDD 15 and Kondo fig 1 first terminal 170],
wherein the power-down control signal is a high-level voltage signal input from the positive electrode power supply terminal to the external terminal voltage input port in response to turn-on of the external FET [Kondo ¶39 above, where the signal would be a “high-level voltage signal” because the signal comes directly from the battery’s positive rail or power line 171].
With regards to claim 6 the combination discloses, the charge and discharge control circuit according to claim 1, further comprising a positive electrode power supply terminal [Shibata fig 1 VDD 15] and a negative electrode power supply terminal [VSS 13],
wherein the control circuit [control circuit 32], the detector [detection circuit 20], and the external terminal voltage detector [monitor circuit 34] are connected between the positive electrode power supply terminal and the negative electrode power supply terminal [fig 1], and further comprising:
a charge and discharge monitoring circuit connected between the positive electrode power supply terminal and the negative electrode power supply terminal [Kondo fig 2 charge/discharge mode detector 230]; and
a switch provided between the positive electrode power supply terminal and the charge and discharge monitoring circuit [Shibata fig 1 switch 25],
wherein the control circuit turns off the switch in response to the power-down detection signal [¶56 “In step S29, the control circuit 32 changes the pull-down of the potential of the monitor terminal 18 (V− terminal) to the potential the ground terminal 13 (VSS terminal) to the pull-up of the potential of the monitor terminal 18 (V− terminal) to the potential of the power source terminal 15 (VDD terminal) and controls the operation mode of the battery protection circuit 10 to make a transition to a charger monitor mode in which the existence of the connection of the charger 91 to the terminals 5 and 6 is monitored, and cuts off the power source of the detection circuit 20 by the switch 25 and controls an operation mode of the battery protection circuit 10”], and
the detector is configured to monitor the turn-off of the external FET and the connection of the charger to output the power-down release signal in a state where the switch is turned off [¶58 “In step S31, the control circuit 32 judges whether the connection of the charger 91 to the terminals 5 and 6 is detected based on the potential of the monitor terminal 18 (V− terminal), in the pull-up state s2. The control circuit 32 judges whether the connection of the charger 91 to the terminals 5 and 6 is detected based on the potential of the monitor terminal 18 (V− terminal), until the connection of the charger 91 to the terminals 5 and 6 is detected. When the connection of the charger 91 to the terminals 5 and 6 is detected and the judgment result in step S31 is YES, the control circuit 32 performs a process of step S33. More particularly, in step S33, the control circuit 32 cancels the power save mode” disclosing that in step S33 the circuit monitors the connection of the charger while the switch is turned off which cancels the power saving mode, followed by ¶59 “In step S33, the control circuit 32 turns on the switch 25, to cancel cutting off the power source of the detection circuit 20. As a result, the power save mode is canceled” and Kondo ¶39 “After the switch 195 has been disabled (open), the second protection control circuit 140 may keep the discharge control device 160 in a turned-off condition (also referred to as a latch mode) until a charge operation is started (e.g., by charging the battery 120 with the charger 115)”].
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Nathaniel Instone whose telephone number is (571)272-1563. The examiner can normally be reached M-F 8-4 EST.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Julian Huffman can be reached at 571-272-2147. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/NATHAN J INSTONE/ Examiner, Art Unit 2859
/JULIAN D HUFFMAN/ Supervisory Patent Examiner, Art Unit 2859
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