DETAILED ACTION
This action is responsive to the communication filed on 12/19/2025. Claims 1, 6, 8-9, 14, and 16-18 are pending and have been examined.
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Continued Examination Under 37 CFR 1.114
A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on 12/19/2025 has been entered.
Claim Rejections - 35 USC § 112
The following is a quotation of the first paragraph of 35 U.S.C. 112(a):
(a) IN GENERAL.—The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor or joint inventor of carrying out the invention.
The following is a quotation of the first paragraph of pre-AIA 35 U.S.C. 112:
The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor of carrying out his invention.
Claims 1, 6, 8-9, 14, and 16-18 are rejected under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-AIA ), first paragraph, as failing to comply with the written description requirement. The claims contain subject matter which was not described in the specification in such a way as to reasonably convey to one skilled in the relevant art that the inventor or a joint inventor, or for applications subject to pre-AIA 35 U.S.C. 112, the inventor(s), at the time the application was filed, had possession of the claimed invention.
With respect to independent claims 1, 9, and 17, the claims recite, in addition to other subject matters disclosed therein, conditions for performing a garbage collection and conditions for performing an erase command. For the erase command, the claims recite, upon determination that a command received is an erase command, erasing at least one first memory block indicated by the erase command and at least one second memory block not indicated by the erase command. Said erasure of the blocks is further recited as occurring simultaneously in response to performing another garbage collection, during which data stored in the at least one first memory block is neither read out or nor written to any memory block in the memory, and the at least one second memory block is to be erased after data stored in the at least one second memory block is read out and written to at least one third memory block in the memory.
However, the specification (specification: para. 56-59; 72-75) does not appear to disclose an additional garbage collection being performed for completing erasures pursuant to the erase command, and the specification also does not appear to provide for the manner of erasure in the above further recitation (i.e. simultaneous erasure of multiple blocks, reading out data in at least one second block being erased but not for at least one first block being erased) in association with the erase command. Rather, the specification appears to provide for said manner of erasure in association with erases performed by a garbage collection operation, corresponding to the garbage collection recited earlier in the claims (e.g. claim 1, lines 10-11).
The examiner recommends amending the independent claims 1, 9, and 17 to reflect the disclosures of the specification by providing that above discussed manner of erasure is indicative of erase operations by the garbage collection (e.g. in claim 1, lines 10-11) rather than the erase command as currently recited.
Claims 6, 8, 14, 16, and 18 are rejected for being dependent on a rejected claim.
Allowable Subject Matter
Claims 1, 9, and 17 are rejected pursuant to 35 U.S.C. §112(a) as discussed above, but would be allowable if rewritten as suggested to overcome the rejection pursuant to 35 U.S.C. §112(a).
With respect to claim 1, “… erasing at least one memory block in the memory before receiving a write command; adding the erased memory blocks into an idle block queue; and performing data writing on the memory blocks in the idle block queue after receiving the write command, wherein erasing the at least one memory block in the memory before receiving the write command further includes: determining whether any commands are received performing a garbage collection operation or a data migration operation on the memory upon determination that no commands are received: determining whether a command received is an erase command upon determination that the command is received, the erase command indicating at least one first memory block to be erased; and upon determination that the command received is the erase command, erasing the at least one first memory block and at least one second memory block that is not indicated by the erase command… adding the erased memory blocks into the idle block queue includes adding the erased at least one first memory block and the erased at least one second memory block into the idle block queue.”, in conjunction with the other limitations of the claim, are not disclosed by the prior art of record.
The closest prior arts of record are Pletka et al. (US 20200257621 A1), Lee et al. (US 20220004338 A1), Roohparvar (US 20090257284 A1), Lai et al. (US 20220100650 A1), Hong (US 20210132803 A1), Cheon et al. (US 20190317688 A1), and Choi et al. (US 20180144802 A1).
Pletka teaches erasure of blocks pursuant to erase commands and a queue for erased blocks. Lee teaches performing background operations in association with a controller’s idle time. Roohparvar teaches delaying execution of erase commands by holding erase commands received. Lai teaches superblock erasure through garbage collection. Hong teaches simultaneous erase of memory blocks through garbage collection. Cheon teaches a secure erase for moving and erasing files in multiple blocks. Choi teaches erasing multiple adjacent subblocks of a block responsive to an erase command addressed to the block.
However, the prior arts of record, neither individually nor in combination, teaches erasing at least one block prior to receipt of a write command and adding the erased blocks in an idle block queue, where, the erasing comprises determining whether any commands are being received, and, based on the determination, performing a garbage collection operation involving simultaneous erase of memory blocks involving migration of data in only some of the blocks being erased or a determination of the received command, where, responsive to the received command being determined to comprise an erase command, performing erasures of block pursuant to the erase command by erasing at least one first block that was indicated by the erase command while also erasing at least one second block that was not indicated by the erase command, wherein the erased at least one first block and the erased at least one second block are added to the idle block queue and used for data writing after receiving the write command.
Therefore, the prior arts of record, neither individually nor in combination disclose, in conjunction with the other limitations of the claim, the claim as a whole.
With respect to claim 9, “… erase at least one first memory block in the memory before receiving a write command; add the erased first memory blocks into an idle block queue; and perform data writing on the memory blocks in the idle block queue after receiving the write command, wherein the memory controller erases the at least one memory block in the memory before receiving the write command by: determining whether any commands are received; performing a garbage collection operation or a data migration operation on the memory upon determination that no commands are received; determining whether a command received is an erase command upon determination that the command is received, the erase command indicating at least one first memory block to be erased; and upon determination that the command received is the erase command, erasing the at least one first memory block and at least one second memory block that is not indicated by the erase command … and the memory controller adds the erased memory blocks into the idle block queue by adding the erased at least one first memory block and the erased at least one second memory block into the idle block queue.”, in conjunction with the other limitations of the claim, are not disclosed by the prior art of record.
The closest prior arts of record are Pletka et al. (US 20200257621 A1), Lee et al. (US 20220004338 A1), Roohparvar (US 20090257284 A1), Lai et al. (US 20220100650 A1), Hong (US 20210132803 A1), Cheon et al. (US 20190317688 A1), and Choi et al. (US 20180144802 A1).
Pletka teaches erasure of blocks pursuant to erase commands and a queue for erased blocks. Lee teaches performing background operations in association with a controller’s idle time. Roohparvar teaches delaying execution of erase commands by holding erase commands received. Lai teaches superblock erasure through garbage collection. Hong teaches simultaneous erase of memory blocks through garbage collection. Cheon teaches a secure erase for moving and erasing files in multiple blocks. Choi teaches erasing multiple adjacent subblocks of a block responsive to an erase command addressed to the block.
However, the prior arts of record, neither individually nor in combination, teaches erasing at least one block prior to receipt of a write command and adding the erased blocks in an idle block queue, where, the erasing comprises determining whether any commands are being received, and, based on the determination, performing a garbage collection operation involving simultaneous erase of memory blocks involving migration of data in only some of the blocks being erased or a determination of the received command, where, responsive to the received command being determined to comprise an erase command, performing erasures of block pursuant to the erase command by erasing at least one first block that was indicated by the erase command while also erasing at least one second block that was not indicated by the erase command, wherein the erased at least one first block and the erased at least one second block are added to the idle block queue and used for data writing after receiving the write command.
Therefore, the prior arts of record, neither individually nor in combination disclose, in conjunction with the other limitations of the claim, the claim as a whole.
With respect to claim 17, “… erase at least one first memory block in the memory before receiving a write command; add the erased first memory blocks into an idle block queue; and perform data writing on the memory blocks in the idle block queue after receiving the write command, wherein the memory controller erases the at least one memory block in the memory before receiving the write command by: determining whether any commands are received; performing a garbage collection operation or a data migration operation on the memory upon determination that no commands are received; determining whether a command received is an erase command upon determination that the command is received, the erase command indicating at least one first memory block to be erased; and upon determination that the command received is the erase command, erasing the at least one first memory block and at least one second memory block that is not indicated by the erase command … and the memory controller adds the erased memory blocks into the idle block queue by adding the erased at least one first memory block and the erased at least one second memory block into the idle block queue.”, in conjunction with the other limitations of the claim, are not disclosed by the prior art of record.
The closest prior arts of record are Pletka et al. (US 20200257621 A1), Lee et al. (US 20220004338 A1), Roohparvar (US 20090257284 A1), Lai et al. (US 20220100650 A1), Hong (US 20210132803 A1), Cheon et al. (US 20190317688 A1), and Choi et al. (US 20180144802 A1).
Pletka teaches erasure of blocks pursuant to erase commands and a queue for erased blocks. Lee teaches performing background operations in association with a controller’s idle time. Roohparvar teaches delaying execution of erase commands by holding erase commands received. Lai teaches superblock erasure through garbage collection. Hong teaches simultaneous erase of memory blocks through garbage collection. Cheon teaches a secure erase for moving and erasing files in multiple blocks. Choi teaches erasing multiple adjacent subblocks of a block responsive to an erase command addressed to the block.
However, the prior arts of record, neither individually nor in combination, teaches erasing at least one block prior to receipt of a write command and adding the erased blocks in an idle block queue, where, the erasing comprises determining whether any commands are being received, and, based on the determination, performing a garbage collection operation involving simultaneous erase of memory blocks involving migration of data in only some of the blocks being erased or a determination of the received command, where, responsive to the received command being determined to comprise an erase command, performing erasures of block pursuant to the erase command by erasing at least one first block that was indicated by the erase command while also erasing at least one second block that was not indicated by the erase command, wherein the erased at least one first block and the erased at least one second block are added to the idle block queue and used for data writing after receiving the write command.
Therefore, the prior arts of record, neither individually nor in combination disclose, in conjunction with the other limitations of the claim, the claim as a whole.
Response to Arguments
The claim objections and rejections pursuant to 35 U.S.C. 112(b) previously included in the most recent previous office action have been withdrawn.
Applicant’s arguments pertaining to the amending claims with respect to the rejection of claims 1, 9, 17, and claims have been fully considered. However, the amended claims have been determined as failing to comply with the written description requirement (please see the section pursuant to 35 U.S.C. §112 above) and suggestions has been provided for further amendments pursuant to the disclosures of the specification.
Conclusion
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/E.Y.K./Examiner, Art Unit 2135 /JARED I RUTZ/Supervisory Patent Examiner, Art Unit 2135
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