DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Arguments
Applicant’s amendments to the specification has been fully considered and resolve the specification objections. The specification objections have been withdrawn.
Applicant’s amendments to the claims 8 and 17 has been fully considered and resolve claim objections. The claim objections have been withdrawn.
Applicant’s amendments to the claims 8, 10, and 17 have been fully considered and resolve the 35 USC $112(b) rejections. The 35 USC $112(b) rejections have been withdrawn.
Applicant’s arguments dated 08/05/2026 with respect to claims 1 and 11 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument. Based on the new references Yu (US20220077117A1), Kuo-Chung (US20170062383A1), and Sankman (US20210305108A1) claims 1-18 are rejected.
Drawings
Applicant’s submission of the replacement sheet 3/10 of the drawing on 08/05/2026 is acknowledged. The drawings are objected to because, in FIG. 2D the reference numbers 218 and 233 are incorrectly positioned. The reference number 233 intended to identify copper contacts is pointing towards the dielectric layer 218, while the reference number 218 intended to identify the dielectric material is pointing towards the copper contacts 233. Corrected drawing sheets in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. The figure or figure number of an amended drawing should not be labeled as “amended.” If a drawing figure is to be canceled, the appropriate figure must be removed from the replacement sheet, and where necessary, the remaining figures must be renumbered and appropriate changes made to the brief description of the several views of the drawings for consistency. Additional replacement sheets may be necessary to show the renumbering of the remaining figures. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 2, 3, and 11-17 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Claim 2 recites the limitation "the layer of organic dielectric material " in line 1. There is insufficient antecedent basis for this limitation in the claim.
Claim 3 recites the limitation "the layer of organic dielectric material " in line 1. There is insufficient antecedent basis for this limitation in the claim.
Claim 11 recites the limitation "the layer of organic dielectric material " in line 15. There is insufficient antecedent basis for this limitation in the claim.
Claim 12 recites the limitation "the layer of organic dielectric material " in line 1. There is insufficient antecedent basis for this limitation in the claim.
Claim 17 recites the limitation "the third layer of dielectric material " in line 1. There is insufficient antecedent basis for this limitation in the claim.
Claims 8 and 17 recites “wherein the first and second layers of organic dielectric material sum to a first thickness between the first integrated circuit device and an underlying dielectric material of the substrate”. This limitation is unclear. Based on the paragraph [0019] and FIGS. 1 and 2D of the instant application, the Examiner interprets this limitation as “wherein a first thickness between the first integrated circuit device and an underlying dielectric material of the substrate is equal to a sum of a thickness of the first layer of organic dielectric material and a thickness of the second layer of organic dielectric material”.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-3 and 7-10 are rejected under 35 U.S.C. 103 as being unpatentable over Yu et al. (US20220077117A1; hereinafter Yu) in view of Kuo-Chung et al. (US20170062383A1; hereinafter Kuo-Chung).
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Yu: FIG. 22
Regarding Claim 1 (Currently amended), Yu discloses an apparatus (package includes a plurality of device dies bonded together, [0012]) comprising:
a plurality of interconnect layers within a substrate (interconnect structure 30 including metal lines 38 and vias 36 corresponding to device die 210’), FIG. 1, [0014], [0019];
a first layer of dielectric material (silicon based dielectric layer 234) over the plurality of interconnect layers (interconnect layers corresponding to die 210’), FIG. 22 reproduced above, [0021];
first copper pads (242) within the first layer of dielectric material (234), FIG. 22, [0022];
a first integrated circuit device (device die 110′) comprising second copper pads (142) copper-to-copper bonded with the first copper pads (bond pads 242 and 142 are bonded through copper-to-copper direct bonding, [0021]), FIG. 22, [0022]
and further comprising a second layer of dielectric material (silicon based dielectric layer 134), the second copper pads (142) within the second layer of dielectric material (134) and the second layer of dielectric material (134) in contact with the first layer of dielectric material (234), FIG. 22, [0021], [0022];
a third layer of dielectric material (dielectric layer including dielectric 150 and liner 148) over, and in contact with, the first layer of dielectric material (234), FIG. 22, [0024].
the third layer of dielectric material (dielectric layer including dielectric 150 and liner 148) encapsulating the first integrated circuit device (110’), and the third layer of dielectric material (150 and 148) extending across a width of the substrate (device die 210’) beyond the first integrated circuit device (110’), FIG. 22, [0024], [0026]; and
a second integrated circuit device (device die 310’) coupled (bonded through pads 342, 160 and TSVs126) with the first integrated circuit device (110’) and extending over the third layer of dielectric material (310’ extends over 150 and 148 as shown in FIG. 22), FIG. 22, [0036].
Yu discloses all the claim limitations of the claim 1 except for “the first layer including organic dielectric material and second layer including organic dielectric material.”
In a similar art, Kuo-Chung discloses a package structure [0024].
Kuo-Chung [0040] discloses a pre-formed dielectric layer, in which connector 502 is embedded, may bond to a dielectric layer on a top surface of RDL 104 through a polymer-polymer bond, and copper connector 502 is directly bonded to copper pad on RDL 104 through copper to copper bonding. Therefore, the combination of Yu and Kuo-Chung discloses the first layer of organic dielectric material (234) and the second layer of organic dielectric material (134).
Kuo-Chung discloses that a device as taught includes organic dielectric layers bonded through a polymer to polymer bond [0040]. Therefore, it would have been obvious to one having an ordinary skill in the art before the effective filing date of the claimed invention to modify Yu’s device by substituting the silicon based dielectric materials with organic dielectric materials in order to provide dielectric layers that may be patterned to expose the metal contacts as disclosed by Kuo-Chung [0028].
Regarding Claim 2 (Original), The combination of Yu and Kuo-Chung discloses the apparatus of claim 1.
Yu does not disclose “wherein the layer of organic dielectric material comprises a photo imageable dielectric.”
Kuo-Hung discloses: wherein the layer of organic dielectric material comprises a photo imageable dielectric (dielectric layer is formed of photo-sensitive material such as polybenzoxazole (PBO), polyimide, benzocyclobutene (BCB)), [0028].
Kuo-Chung discloses that a device as taught including a photo imageable dielectric facilitates patterning of the dielectric material [0028]. Therefore, it would have been obvious to one having an ordinary skill in the art before the effective filing date of the claimed invention to modify Yu’s device in order to facilitate patterning of the dielectric material as disclosed by Kuo-Chung [0028].
Regarding Claim 3 (Original), The combination of Yu and Kuo-Chung discloses the apparatus of claim 2.
Yu does not disclose “wherein the layer of organic dielectric material comprises a polyimide”
Kuo-Hung discloses: wherein the layer of organic dielectric material comprises a polyimide (dielectric layer is formed of photo-sensitive material such as polyimide), [0028].
Kuo-Chung discloses that a device as taught including a photo-sensitive material such as polyimide facilitates patterning of the dielectric material [0028]. Therefore, it would have been obvious to one having an ordinary skill in the art before the effective filing date of the claimed invention to modify Yu’s device in order to facilitate patterning of the dielectric material as disclosed by Kuo-Chung [0028].
Regarding Claim 7 (Currently amended), The combination of Yu and Kuo-Chung discloses the apparatus of claim 1.
Yu discloses: further comprising a plurality of copper pillars (through-vias 152 including a metallic material such as copper) within the third layer of dielectric material (150 and 148), the plurality of copper pillars coupled with the plurality of interconnect layers (152 coupled to pads 242 of the interconnect layers corresponding to die 210’), FIG. 22, [0028].
Regarding Claim 8 (Currently amended), The combination of Yu and Kuo-Chung discloses the apparatus of claim 1.
Yu discloses: wherein the first and second layers of organic dielectric material (134 and 234, Kuo-Chung [0040]) sum to a first thickness between the first integrated circuit device (110’) and an underlying dielectric material of the substrate (underlying dielectric material corresponding to die 210’), and wherein the first layer of organic dielectric material (134, Kuo-Chung [0040]) in contact with the third layer of dielectric material (150 and 148) has a second thickness less than the first thickness, FIGS. 4, 22, [0022], [0025]. FIGS. 4 & 22 show the first thickness which is the sum of the thicknesses of 134 and 234 is greater than the thickness of first dielectric layer 234 which contacts the third layer (150 and 148).
Regarding Claim 9 (Previously presented), The combination of Yu and Kuo-Chung discloses the apparatus of claim 1.
The combination of Yu and Kuo-Chung discloses: wherein the first integrated circuit device (Yu: 110’) comprises a device chosen from the group consisting of: high bandwidth memory (HBM), intelligent power device (IPD), photonic integrated circuit (PIC), and embedded passive components (EPC), (Kuo-Chung: dies comprising HBM (High Bandwidth Memory), [0020]).
Kuo-Chung discloses that a device as taught including a HBM device may provide high bandwidth data communication [0020]. Therefore, it would have been obvious to one having an ordinary skill in the art before the effective filing date of the claimed invention to modify the device to provide high bandwidth data communication as disclosed by Kuo-Chung [0020].
Regarding Claim 10 (Currently amended), The combination of Yu and Kuo-Chung discloses the apparatus of claim 1.
Yu discloses: wherein the third layer of dielectric material (150 and 148) comprises silicon oxide or a mold material (formed of molding compound, molding underfill, a resin, an epoxy, a polymer, and/or the like, [0026].
Claims 4-6 and 11-18 are rejected under 35 U.S.C. 103 as being unpatentable over Yu in view of Kuo-Chung, further in view of Sankman et al. (US20210305108A1; hereinafter Sankman).
Regarding Claim 4 (Currently amended), The combination of Yu and Kuo-Chung discloses the apparatus of claim 1.
The combination of Yu and Kuo-Chung does not disclose “wherein the first integrated circuit device (bridge die 28) comprises a bridge device”
In a similar art, Sankman discloses a semiconductor package using a bridge, FIG. 2, [0015].
Sankman discloses: wherein the first integrated circuit device comprises a bridge device (bridge die 28 can also be known as an interconnect bridge) that communicatively couples the second integrated circuit device (CPU die 16) with a third integrated circuit device (memory die 14) that is adjacent to the second integrated circuit device (16) and coupled to the first integrated circuit device (28), FIG. 2, [0021].
Sankman discloses that a device as taught including a high density interconnect bridge die enhances performance [0001], [0017]. Therefore, it would have been obvious to one having an ordinary skill in the art before the effective filing date of the claimed invention to modify Yu’ and Kuo-Chung’s device in order to enhance performance as disclosed by Sankman [0001], [0017].
Regarding Claim 5 (Original), The combination of Yu, Kuo-Chung, and Sankman discloses the apparatus of claim 4.
The combination of Yu and Kuo-Chung does not explicitly disclose “wherein the second integrated circuit device comprises a processor and the third integrated circuit device comprises a memory device.”
Sankman discloses: wherein the second integrated circuit device comprises a processor (CPU die 16) and the third integrated circuit device comprises a memory device (memory die 14), [0021].
Sankman discloses that a device as taught including a high density interconnect bridge die connected to a processor and a memory enhances performance [0001], [0021]. Therefore, it would have been obvious to one having an ordinary skill in the art before the effective filing date of the claimed invention to modify Yu’ and Kuo-Chung’s device in order to enhance performance as disclosed by Sankman [0001], [0021].
Regarding Claim 6 (Currently amended), The combination of Yu and Kuo-Chung discloses the apparatus of claim 1.
The combination of Yu and Kuo-Chung does not disclose “wherein the substrate comprises a glass core coupled with the plurality of interconnect layers, and wherein the substrate comprises conductive vias extending through the glass core.”
Sankman discloses: wherein the substrate (12) comprises a glass core (72) coupled with the plurality of interconnect layers (redistribution layers), and wherein the substrate (12) comprises conductive vias (the through core vias 100) extending through the glass core (72), FIG. 2, [0018], [0030].
Sankman discloses that a device as taught including a substrate comprising glass core reduces mismatch in the coefficient of thermal expansion of various components of package [0018]. Therefore, it would have been obvious to one having an ordinary skill in the art before the effective filing date of the claimed invention to modify Yu’ and Kuo-Chung’s device in order to reduce mismatch in the coefficient of thermal expansion as disclosed by Sankman [0018].
Regarding Claim 11 (Currently amended), Yu discloses
an integrated circuit device package (package includes a plurality of device dies bonded together, [0012]);
the integrated circuit device package comprising:
a plurality of interconnect layers within a substrate (interconnect structure 30 including metal lines 38 and vias 36 corresponding to die 210’) that includes conductive through-vias (through vias 226), FIGS. 1 & 22, [0014], [0019];
a first layer of dielectric material (silicon based dielectric layer 234) over the plurality of interconnect layers (interconnect structure 30 including metal lines 38 and vias 36 corresponding to device die 210’), FIG. 22, [0021];
first copper pads (242) within the first layer of dielectric material (234), FIG. 22, [0022];
a first integrated circuit device (device dies 110′) comprising second copper pads (142) copper-to-copper bonded with the first copper pads (bond pads 242 and 142 are bonded through copper-to-copper direct bonding, [0021]), FIG. 22, [0022].
and further comprising a second layer of dielectric material (silicon based dielectric layer 134), the second copper pads (142) within the second layer of dielectric material (134) and the second layer of dielectric material (134) in contact with the first layer of dielectric material (234), FIG. 22, [0021], [0022];
dielectric material (dielectric layer including dielectric 150 and liner 148) over, and in contact with, the layer of organic dielectric material (234), FIG. 22, [0024].
the dielectric material (dielectric layer including dielectric 150 and liner 148) encapsulating the first integrated circuit device (110’), and the dielectric material (150 and 148) extending across a width of the substrate (220) beyond the first integrated circuit device (110’), FIG. 22, [0026]; and
Yu [0026] discloses instead of forming dielectric layers 148 and 150, device die 110′ is encapsulated by an encapsulant, which may be formed of molding compound, molding underfill, a resin, an epoxy, a polymer, and/or the like. Therefore, the third layer encapsulates the first integrated circuit 110’ and extends across the width of the substrate 220 beyond the 110’.
a second integrated circuit device (device die 310’) over, and coupled with a side of the first integrated circuit device (310’ is over 110’ and coupled through TSV126) opposite the second copper pads (142), and extending over the dielectric material (150 and 148), FIG. 22, [0036], [0060];
a third integrated circuit device (510’) adjacent to the second integrated circuit device (310’), over, and coupled with, the side of the first integrated circuit device (510’ is coupled with 110’ through copper pads 160, RDLs 158 and TSVs 126, 326) opposite the second copper pads (142), the third integrated circuit device (510’) also extending over the dielectric material (150 and 148), FIG. 22, [0060].
Yu does not disclose “the first layer including organic dielectric material and second layer including organic dielectric material; A system comprising: a host board; a power supply to provide power to the integrated circuit device package through the host board.”
Kuo-Chung [0040] discloses a pre-formed dielectric layer, in which connector 502 is embedded, may bond to a dielectric layer on a top surface of RDL 104 through a polymer-polymer bond, and copper connector 502 is directly bonded to copper pad on RDL 104 through copper to copper bonding. Therefore, the combination of Yu and Kuo-Chung discloses first layer of organic dielectric material (234) and the second layer of organic dielectric material (134).
Kuo-Chung discloses that a device as taught includes organic dielectric layers bonded through a polymer to polymer bond [0040]. Therefore, it would have been obvious to one having an ordinary skill in the art before the effective filing date of the claimed invention to modify Yu’s device by substituting the silicon based dielectric materials with organic dielectric materials in order to provide dielectric layers that may be patterned to expose the metal contacts as disclosed by Kuo-Chung [0028].
Sankman discloses: a system (package assembly 600, FIG. 6, [0035]) comprising: a host board (printed circuit board (PCB), [0019]);
a power supply to provide power to the integrated circuit device package through the host board (host board, PCB receives power and delivers power to the package substrate 12 through the interposer 90), [0016], [0019].
Sankman discloses that a device as taught including a host board and power supply facilitates power delivery to the integrated circuit device package [0016], [0019]. Therefore, it would have been obvious to one having an ordinary skill in the art before the effective filing date of the claimed invention to modify Yu’ and Kuo-Chung’s device in order to facilitate power delivery to the integrated circuit device package as disclosed by Sankman [0016], [0019].
Regarding Claim 12 (Currently amended), The combination of Yu, Kuo-Chung, and Sankman discloses the system of claim 11.
Yu does not disclose “wherein the layer of organic dielectric material comprises a photosensitive polyimide”
Kuo-Chung discloses: wherein the layer of organic dielectric material comprises a photosensitive polyimide (photo-sensitive material such as polyimide), [0028].
Kuo-Chung discloses that a device as taught including a photo-sensitive material such as polyimide facilitates patterning of the dielectric material [0028]. Therefore, it would have been obvious to one having an ordinary skill in the art before the effective filing date of the claimed invention to modify Yu and Kuo-Chung’s device in order to facilitate patterning of the dielectric material as disclosed by Kuo-Chung [0028].
Regarding Claim 13 (Currently amended), The combination of Yu, Kuo-Chung, and Sankman discloses the system of claim 11.
The combination of Yu and Kuo-Chung does not disclose “wherein the first integrated circuit device comprises a bridge device that communicatively couples the second integrated circuit device with the third integrated circuit device.”
Sankman discloses: wherein the first integrated circuit device comprises a bridge device (bridge die 28 can also be known as an interconnect bridge) that communicatively couples the second integrated circuit device (CPU die 16) with the third integrated circuit device (memory die 14), FIG. 2, [0021].
Sankman discloses that a device as taught including a high density interconnect bridge die enhances performance [0001], [0017]. Therefore, it would have been obvious to one having an ordinary skill in the art before the effective filing date of the claimed invention to modify Yu’ and Kuo-Chung’s device in order to enhance performance as disclosed by Sankman [0001], [0017].
Regarding Claim 14 (Original), The combination of Yu, Kuo-Chung, and Sankman discloses the system of claim 13.
The combination of Yu and Kuo-Chung does not explicitly disclose “wherein the second integrated circuit device comprises a processor and the third integrated circuit device comprises a memory device.”
Sankman discloses: wherein the second integrated circuit device comprises a processor (CPU die 16) and the third integrated circuit device comprises a memory device (memory die 14), [0021].
Sankman discloses that a device as taught including a high density interconnect bridge die connected to a processor and a memory enhances performance [0001], [0021]. Therefore, it would have been obvious to one having an ordinary skill in the art before the effective filing date of the claimed invention to modify the device in order to enhance performance as disclosed by Sankman [0001], [0021].
Regarding Claim 15 (Currently amended), The combination of Yu, Kuo-Chung, and Sankman discloses the system of claim 11.
The combination of Yu and Kuo-Chung does not disclose “wherein the substrate further comprises a glass core coupled with the plurality of interconnect layers.”
Sankman discloses: wherein the substrate (12) further comprises a glass core (72) coupled with the plurality of interconnect layers (redistribution layers), FIG. 2, [0018], [0030].
Sankman discloses that a device as taught including a substrate comprising glass core reduces mismatch in the coefficient of thermal expansion of various components of package [0018]. Therefore, it would have been obvious to one having an ordinary skill in the art before the effective filing date of the claimed invention to modify Yu’ and Kuo-Chung’s device in order to reduce mismatch in the coefficient of thermal expansion as disclosed by Sankman [0018].
Regarding Claim 16 (Original), The combination of Yu, Kuo-Chung, and Sankman discloses the system of claim 11.
Yu discloses: further comprising a plurality of copper pillars (through-vias 152 including a metallic material such as copper) within the dielectric material (150 and 148), the plurality of copper pillars coupled with the plurality of interconnect layers (152 coupled to pads 242 of the interconnect layers corresponding to die 210’), FIG. 22, [0028].
Regarding Claim 17 (Currently amended), The combination of Yu, Kuo-Chung, and Sankman discloses the system of claim 11.
Yu discloses: wherein the first and second layers of organic dielectric material (134 and 234, Kuo-Chung [0040]) sum to a first thickness between the first integrated circuit device (110’) and an underlying dielectric material of the substrate (underlying dielectric material corresponding to die 210’), and wherein the first layer of organic dielectric material (134, Kuo-Chung [0040]) in contact with the third layer of dielectric material (150 and 148) has a second thickness less than the first thickness, FIGS. 4, 22, [0022], [0025]. FIGS. 4 & 22 show the first thickness which is the sum of the thicknesses of 134 and 234 is greater than the thickness of first dielectric layer 234 which contacts the third layer (150 and 148).
Regarding Claim 18 (Original), The combination of Yu, Kuo-Chung, and Sankman discloses the system of claim 11.
Yu discloses: wherein the dielectric material (150 and 148) comprises silicon oxide (150 is formed of silicon oxide), [0025].
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the
examiner should be directed to Krishna J Palaniswamy whose telephone number
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supervisor, Brent Fairbanks can be reached on 408-918-7532. The fax phone number
for the organization where this application or proceeding is assigned is 571-483-7639.
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/Krishna J. Palaniswamy/
Examiner, Art Unit 2899
/Brent A. Fairbanks/Supervisory Patent Examiner, Art Unit 2899