Prosecution Insights
Last updated: October 27, 2026
Application No. 18/091,028

ULTRATHIN LAMINATED GLASS AND GLASS STIFFENERS FOR CORELESS PACKAGES

Final Rejection §102§103
Filed
Dec 29, 2022
Examiner
SAMPLE, DAVID R
Art Unit
1784
Tech Center
1700 — Chemical & Materials Engineering
Assignee
Intel Corporation
OA Round
2 (Final)
80%
Grant Probability
Favorable
3-4
OA Rounds
0m
Est. Remaining
90%
With Interview

Examiner Intelligence

Grants 80% — above average
80%
Career Allowance Rate
532 granted / 666 resolved
+14.9% vs TC avg
Moderate +10% lift
Without
With
+10.2%
Interview Lift
resolved cases with interview
Typical timeline
2y 9m
Avg Prosecution
26 currently pending
Career history
694
Total Applications
across all art units

Statute-Specific Performance

§101
1.0%
-39.0% vs TC avg
§103
41.4%
+1.4% vs TC avg
§102
23.9%
-16.1% vs TC avg
§112
20.9%
-19.1% vs TC avg
Black line = Tech Center average estimate • Based on career data from 666 resolved cases

Office Action

§102 §103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Introduction Any rejections and/or objections, made in the previous Office Action, and not repeated below, are hereby withdrawn. The anticipation rejection over Nakatani et al. (US 2014/0124777 A1) has been overcome by the amendment to claim 1. The anticipation and obviousness rejections over Kong et al. (US 2021/0078296 A1) have been overcome by the amendment to claim 1. The text of those sections of Title 35, U.S. Code not included in this action can be found in a prior Office action. Claim Rejections - 35 USC § 102 Claims 1, 5, 10 and 11 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Imayoshi (US 2020/0275548). Imayoshi discloses a wiring board (i.e., package) comprising a glass substrate (10), insulating resin layers (6)(13) (corresponding to a buildup film) on the upper surface of the substrate, insulating resin layers (6)(13) on the lower surface (corresponding to the claimed adhesive layer), and a solder resist (16). See Figure 1 and paragraph [0112]. The wiring board includes wiring pattern (3)(4a)(18)(15b)(corresponding to the claimed electrically conductive interconnect) through substrate (10) and the insulating layers (6)(13) on the upper portion of the board. Id. PNG media_image1.png 470 812 media_image1.png Greyscale The insulating resin layers on the bottom surface are “vertically between and in contact with the solder resist layer and first layer.” Id. Imayoshi does not describe layers (6)(13) on the lower portion as being an “adhesive layer.” However, collectively these layers serves to attach the solder resist to the glass substrate, and are therefore considered to be an “adhesive layer.” As to claim 5, Figure 4 shows layers (10)(first layer) and upper layers (6)(13) as having substantially the same width. As to claim 10, Imayoshi shows interconnects 12a and 12b as having tapered walls in Figure 1. As to claim 11, Imayoshi teaches the wiring board is for use in a mobile device in paragraph [0003]. Claim Rejections - 35 USC § 103 Claims 2, 6 and 7 are rejected under 35 U.S.C. 103 as being unpatentable over Imayoshi (US 2020/0275548) as applied to claim 1 above. Imayoshi anticipates claim 1 for the reasons recited above. As to claim 2, Imayoshi does not disclose a “coreless” wiring board. However, Imayoshi teaches the thickness of the substrate may be 50 to 1000 µm. See paragraph [0053]. This range overlaps the range employed in the definition of coreless in paragraph [0021] of the instant specification: A coreless package substrate 100 is a package substrate that does not have a traditional core layer, such as an organic core layer, a glass core layer, or the like. More generally, the coreless package substrate 100 may be a package substrate that does not include a reinforcement layer that is approximately 100µm or greater. While glass sheets 110 are included in the package substrate 100, the glass sheets 110 are not considered to be cores since they have thicknesses that are less than approximately 100µm. Base upon this definition, and the teachings of Imayoshi, it would have been obvious to one of ordinary skill in the art at the time of filing to have formed coreless or core-containing wiring boards. The rationale for doing so is that overlapping ranges have been held to establish prima facie obviousness. See MPEP 2144.05. As to claim 6, Imayoshi teaches the thickness of the glass layer (i.e., first layer) is 50 to 1000 µm. See paragraph [0053]. Imayoshi further teaches layers (6) and (13) on the top portion of the substrate (corresponding to the second layer) have a thickness of 25 µm and 35 µm, respectively. See paragraphs [0104] and [0108]. Thus, the total thickness of the upper layers (6) and (13) is 60 µm, and Imayoshi discloses a lower limit for the substrate of 50 µm. Thus, it would have been obvious to have formed a glass that is thinner than the second layer. As to claim 7, Imayoshi teaches the thickness of the glass layer (i.e., first layer) is 50 to 1000 µm. See paragraph [0053]. This range overlaps the range of claim 7, and overlapping ranges have been held to establish prima facie obviousness. See MPEP 2144.05. Claims 8 and 9 are rejected under 35 U.S.C. 103 as being unpatentable over Imayoshi (US 2020/0275548) as applied to claim 1 above, and further in view of Kong et al. (US 2021/0078296 A1)(Kong). Imayoshi anticipates claim 1 for the reasons recited above. Imayoshi fails to disclose a third layer comprising a glass as recited in claim 8. However, it was known to one of ordinary skill in the art to have duplicated and stacked wiring packages. In this regard, Kong discloses duplicating glass substrates (containing wiring interconnects therethrough) and stacking them in forming wired articles. See Figure 6 and paragraph [0035]. Therefore, it would have been obvious to one of ordinary skill in the art at the time of filing to have duplicated the layer structure of Imayoshi as suggested by Kong. The rationale for doing so is that it has been held to have been obvious to duplicate parts in a structure. See MPEP 2144.04 IV.B. Response to Arguments Applicant’s arguments have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument. Conclusion Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to David Sample whose telephone number is (571)272-1376. The examiner can normally be reached Monday to Friday 7AM to 3:30 PM. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Humera Sheikh can be reached at (571)272-0604. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /David Sample/Primary Examiner, Art Unit 1784
Read full office action

Prosecution Timeline

Dec 29, 2022
Application Filed
Apr 10, 2023
Response after Non-Final Action
Apr 14, 2023
Response after Non-Final Action
Apr 08, 2026
Non-Final Rejection mailed — §102, §103
Jul 08, 2026
Response Filed
Sep 30, 2026
Final Rejection mailed — §102, §103 (current)

Precedent Cases

Applications granted by this same examiner with similar technology

Patent 12759268
LAMINATED GLAZING HAVING HOLOGRAPHIC FILM LAMINATED THEREIN
4y 7m to grant Granted Oct 13, 2026
Patent 12741903
COVER GLASS WITH AN ANOMALOUS STRESS PROFILE, PROCESS FOR PRODUCTION THEREOF AND USE THEREOF
3y 9m to grant Granted Sep 22, 2026
Patent 12742049
PHOTOCATALYTIC FILM AND DISPLAY DEVICE
3y 2m to grant Granted Sep 22, 2026
Patent 12724463
WINDOW AND DISPLAY DEVICE INCLUDING THE SAME
2y 11m to grant Granted Sep 01, 2026
Patent 12715768
ScAlN LAMINATE AND MANUFACTURING METHOD THEREOF
2y 9m to grant Granted Aug 25, 2026
Study what changed to get past this examiner. Based on 5 most recent grants.

Strategy Recommendation AI-generated — please review before filing

Get a prosecution strategy drawn from examiner precedents, rejection analysis, and claim mapping.
Typically takes 5-10 seconds — AI-generated, attorney review required before filing

Prosecution Projections

3-4
Expected OA Rounds
80%
Grant Probability
90%
With Interview (+10.2%)
2y 9m (~0m remaining)
Median Time to Grant
Moderate
PTA Risk
Based on 666 resolved cases by this examiner. Grant probability derived from career allowance rate.

Sign in with your work email

Enter your email to receive a magic link. No password needed.

Personal email addresses (Gmail, Yahoo, etc.) are not accepted.

Free tier: 3 strategy analyses per month