DETAILED ACTION
The current Office Action is in response to the papers submitted 01/17/2025. Claims 1 - 22 are pending.
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Specification
The disclosure is objected to because of the following informalities:
Paragraphs 0060 – 0061 disclose the remapper as item 550 in figure 5. Item 550 is labeled as Moderator Blocks. Item 560 in figure 6 is labeled as Remapper. It appears the identification of 550 as being the remapper in the specification should be 560.
Paragraph 0060 identifies one or more moderator blocks with the number 540. Paragraph 0062 then uses number 540 to identify an interleaver. It appears the number for the moderator blocks in paragraph 0060 should be 550 according to figure 5.
Appropriate correction is required.
Drawings
The drawings are objected to because links 504 and 506 are identified as CCI Links. There is no mention in the drawings or specification of what the CCI is meant to mean. Corrected drawing sheets in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. The figure or figure number of an amended drawing should not be labeled as “amended.” If a drawing figure is to be canceled, the appropriate figure must be removed from the replacement sheet, and where necessary, the remaining figures must be renumbered and appropriate changes made to the brief description of the several views of the drawings for consistency. Additional replacement sheets may be necessary to show the renumbering of the remaining figures. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance.
The drawings are objected to as failing to comply with 37 CFR 1.84(p)(5) because they include the following reference character(s) not mentioned in the description: 550 in figure 5 is not mentioned in the specification. Corrected drawing sheets in compliance with 37 CFR 1.121(d), or amendment to the specification to add the reference character(s) in the description in compliance with 37 CFR 1.121(b) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance.
Claim Rejections - 35 USC § 112
The following is a quotation of the first paragraph of 35 U.S.C. 112(a):
(a) IN GENERAL.—The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor or joint inventor of carrying out the invention.
The following is a quotation of the first paragraph of pre-AIA 35 U.S.C. 112:
The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor of carrying out his invention.
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 1 - 22 are rejected under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-AIA ), first paragraph, as failing to comply with the enablement requirement. The claim(s) contains subject matter which was not described in the specification in such a way as to enable one skilled in the art to which it pertains, or with which it is most nearly connected, to make and/or use the invention.
Claims 1, 11, and 19 disclose a memory of a first type having a plurality of memory channel, a memory of a second type having a plurality of link, and to homogenously interleave the plurality of memory channels with the plurality of link. The specification defines a memory as holding place for data in paragraph 0047, a channel as a model for interprocess communication and synchronization via message passing and then discloses a memory channel can be interchanged with memory or DDR memory in paragraph 0048, a link as any combination of hardware and/or software that provides a mechanism for data communication in paragraph 0049, and interleave as the interspersing of data and for an interleave to be “homogenous” a range of addresses for two or more memories can be mapped to logical destinations that are included in a same interleave in paragraph 0052. Item 502 in figure 5 points to what appears to be a data path between items 550 and 520 and is labeled as “12 DDR Memory Channels” though. Item 562 in figure 5 is identified as homogenous interleave in paragraph 0060. This fails certain tests of the In Re Wands, 858 F.2d 731,737, 8USPQ2d 1400, 1404 tests of undue experimentation as listed and described below.
(A) Breadth Of The Claims:
The claims disclose the act of homogenously interleaving memory channels with links. The definition of the memory channel make the use of a memory channel unclear. A memory channel can be interchanged with DDR memory according to paragraph 0048. This means then the claimed memory of a first type has a plurality of DDR memories. The term channel is also defined as a model in paragraph 0048. This makes the concept of interleaving a model unclear. The interspersing of data in an interleave does not appear to be the same as a mapping between physical and logical address as defined in paragraph 0052. Interspersing of data is an action where a mapping is not an action, an action might be based on a mapping but the mapping itself is not an action.
(D) The Level Of One Of Ordinary Skill:
One of ordinary skill in the art would not readily know what the memory channels, links, and homogenously interleave are based on the definitions in the specification, the drawings, and the use of the terms in the claims. A memory channel is defined in the specification as a memory or DDR memory but is shown in figure 5 as being a data path by item 502 since it is depicted as a line with arrows pointing to 550 and 520. In the art one of ordinary skill would understand 502 to be a communication path where data is passed between 520 and 550 and not a memory itself such as DDR memory as defined in specification. This then would make the connection between 520 and 550 not enabled since simply having memory between 550 and 520 alone does not allow data communication as indicates by the double arrow line 502.
562 in figure 5 is identified as a homogenous interleave in the specification. Paragraph 0052 defines an interleave as an act of interspersing data and that a homogenous interleave is a mapping between addresses. A mapping itself is not interspersing of data. 562 alone does not intersperse data. 562 appears to be a grouping of storage locations. There is no indication of how memory channels, considered a DDR memories according to the specification, can be interleaved with links when interleaving is considered interspersing data. This makes the limitation of homogenously interleave items not enabled by one of ordinary skill since it is unclear what the limitation means.
The links are defined in paragraph 0049 as being software that provides a mechanism for data communications. Software is not a mechanism that provides for data communications. Data communications requires a data path to transfer data. The data path can be a wired or wireless path but is not software alone. A person of ordinary skill would not understand how to use software alone as the mechanism for data communication.
The term channel is referred to as a model for interprocess communication via message passing. This indicates a channel is not a physical construct that actually allows for the passing of data. A model is a conceptual idea of a device or idea. A model is not a real device that provides the functions of the conceptual idea. One of ordinary skill in the art would not understand how to use a model for item 502 to allow for the passage of data as indicated by the line with two arrows that item 502 points to.
A homogenous interleave is defined as a mapping between multiple memories to logical destinations that are included in a same interleave. An interleave is defined as the act of interspersing data as indicated previously. There is no clear direction provided how addresses can be mapped to logical destinations in an act of interspersing data. A mapping of addresses in the art if general mapped to other addresses not to a process of transferring data which is what interspersing of data is.
(F) The Amount Of Direction Provided By The Inventor:
The inventor has failed to provide sufficient direction to explain what exactly the links, memory channels, and homogenously interleaving are meant to be and used. The specification defines the memory channels as being memory itself. This makes the representation of memory channels 502 in figure 5 unclear since item 502 appears to be a communication path since it is a line with two arrows. This is how a communication path is depicted in the art generally. Memories are usually depicted as square or rectangular items that communications are connected to.
A channel is defined as being a model for interprocess communication and synchronization via message passing. This shows the channel is not the actual device that provides for the passing of data but is actually a model representation of what the actual device is that provides for the passing of data. There is a lack of direction how a model can be depicted as being a real device such as item 502 in figure 5 that actually transmits data between multiple devices.
The links are disclosed in the specification as being software. There is no direction provided by the inventor how software alone can be a mechanism for data communication. Software might direct how communication is performed but a communication path is what actually provides the mechanism for the data communication.
Item 562 is identified as a homogenous interleave in the specification and appears as a grouping of memory devices or locations in figure 5. The specification though defines an interleave as an action of interspersing data. The act of interspersing data is not the same as a grouping of memory devices or locations. The group 562 does not appear to be a map also. There is no linking or association of one item to another item in the grouping 562. There is a linking arrow linking 562 and 564 to each other it appears in figure 5. However, this is not labeled or indicated as the homogeneous interleave, only item 562 is identified as a homogenous interleave. There is no direction provided by the applicant where the mapping is in the homogenous interleave or homogenously interleave process.
(H) The Quantity Of Experimentation Needed To Make Or Use The Invention Based On The Content Of The Disclosure:
Due to the multiple issues listed above it would require an undo amount of experimentation to make and use the invention as claimed. It is unclear what the memory channels, links, a homogenously interleave process is, and how memory channels and links can be homogenously interleaved.
All remaining claims are rejected for being dependent on a rejected base claim.
Claim 1 – 22 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Claims 1, 11, and 19 disclose memory channels, links, homogenously interleave memory channels with links. As indicated above, the specification fails to sufficiently describe what memory channels and links are, what does it mean to have something interleaved, what is homogenously interleaving, and how memory channels and links can be interleaved. The specification discloses conflicting definitions for the terms in the claims and how they are used in the claims and shown in the drawings. This makes the limitations of memory channels, links, homogenously interleave memory channels with links indefinite since it is unclear what the terms are exactly and how they are used.
Claims 1, 11, and 19 disclose the limitations “remapping circuitry configured…” and “one or more memory controller configured…”. The claims disclose what the configuration is able to achieve but fail to disclose what the claimed configuration is exactly. There is no indication what specific set up the remapping circuity and memory controller are configured with exactly. Claiming a configuration to perform an operation indicates the specific configuration is what provides for the claimed operation. The scope of the specific configuration that provides for the homogenously interleaving and second interleave is undefined and thus indefinite.
All remaining claims are rejected for being dependent on a rejected base claim and/or containing similar limitations rejected above.
Examiner’s Note
Due to the numerous inconsistencies identified above between the current claims and original specification and drawings a proper scope of the claims cannot be determined at this time. The lack of any prior art rejections is not to be taken as any indication of patentability; it is a result of the indefiniteness of the scope of the invention. Specifically, it is unclear what memory channels and links are, what does it mean to have something interleaved, what is homogenously interleaving, and how memory channels and links can be interleaved. The Applicant is asked to make sure any future amendments to the claims put the claims in better form with regard to what is specifically disclosed in the original specification and drawings.
Response to Arguments
Applicant's arguments filed 12/23/2024 have been fully considered but they are not persuasive.
Applicant’s arguments with respect to claim(s) 1 - 22 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to CHRISTOPHER D BIRKHIMER whose telephone number is (571)270-1178. The examiner can normally be reached 8-5 Hoteling.
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/Christopher D Birkhimer/Primary Examiner, Art Unit 2136