Prosecution Insights
Last updated: April 19, 2026
Application No. 18/091,443

DYNAMIC CONTROL OF WORK SCHEDULING USING A SET OF PARALLEL PROCESSORS

Non-Final OA §103§112
Filed
Dec 30, 2022
Examiner
ZHAO, BING
Art Unit
2151
Tech Center
2100 — Computer Architecture & Software
Assignee
Advanced Micro Devices, Inc.
OA Round
3 (Non-Final)
90%
Grant Probability
Favorable
3-4
OA Rounds
3y 0m
To Grant
99%
With Interview

Examiner Intelligence

Grants 90% — above average
90%
Career Allow Rate
420 granted / 468 resolved
+34.7% vs TC avg
Strong +46% interview lift
Without
With
+46.5%
Interview Lift
resolved cases with interview
Typical timeline
3y 0m
Avg Prosecution
16 currently pending
Career history
484
Total Applications
across all art units

Statute-Specific Performance

§101
13.9%
-26.1% vs TC avg
§103
39.0%
-1.0% vs TC avg
§102
6.8%
-33.2% vs TC avg
§112
32.4%
-7.6% vs TC avg
Black line = Tech Center average estimate • Based on career data from 468 resolved cases

Office Action

§103 §112
DETAILED ACTION The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA and is in response to the amendments filed on 01/22/2026. Claims 1, 2, 4-11, 13-17, 19 and 20 are pending, claims 3, 12 and 18 have been cancelled by applicant. In the interest of facilitating compact prosecution the examiner contacted applicant with regard to some allowable subject matter for claims 1, 2 and 4-8. The applicant declined examiner’s suggestions. As such, prosecution will continue. Continued Examination Under 37 CFR 1.114 A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on 01/22/2026 has been entered. Claim Rejections - 35 USC § 112 The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph: The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention. Claims 1, 2, 4-11, 13-17, 19 and 20 are rejected under 35 U.S.C. 112(b) as being indefinite for failing to particularly point out and distinctly claim the subject matter which applicant regards as the invention. The following claim languages are not clear and indefinite: As per claim 1, 9 and 16 it is not clear if the “first” and “second” “block of data” are related to one another (e.g. the second block is a block of a version of the generated first block of data); or they are completely different type of data. The dependent claims do not cure the 112(b) issues of their respective parent claims. Therefore, they are rejected for the same reasons as those presented for their respective parent claims. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 1, 5, 7 and 8 are rejected under 103 as being unpatentable over Gupta et al (U.S. Pub. 2017/0004163) in view of Nemlekar (U.S. Pat. 11175946). Nemlekar reference has been previously presented. As per claim 1 Gupta teaches the invention as claimed including a method, comprising: scheduling a first set of parallel processors to concurrently generate respective versions of a first block of data (Fig. 2, [0028] system of Fig. 2 contains 4 computing nodes, during a current cycle two map nodes produces intermediate Map Data (IMD) that are not communicated to the reducers); and concurrently with the scheduling, communicating a second block of data from a first parallel processor of the first set of parallel processors to a second parallel processor of the first set of parallel processors ([0028], [0036] during the current cycle the map nodes produce and communicate intermediate Reduce Data (IRD) to reducers of system of Fig. 2 with two map and two reducer nodes) while the second parallel processor reduces the second block of data with a local version of the second block of data ([0031], [0032], [0034] reducer nodes reduces IRD and intermediate Local Reduce Data). Gupta does not explicitly teach that the communicate is done concurrently with the scheduling. However Nemlekar teaches that the communicate is done concurrently with the scheduling (col 6 lines 4-27 during time periods T2-T5, submatrix outputs are communicated by different CU subsets, while at the same time different matrix multiplication operations are scheduled for execution on the different CU subsets). It would have been obvious to one with ordinary skill in the prior to the effective filling date of the invention to combine the teachings of Nemlekar and Gupta because both are directed towards parallel processing of computations. One with ordinary skill in the art would be motivated to incorporate the teachings of Nemlekar into that of Gupta because Nemlekar further improves performance of parallel processing of computations (col 1 lines 8-26). As per claim 5 Nemlekar teaches further comprising: receiving an indication of data generation ordering requirements in metadata of a producer kernel comprising a plurality of workgroups to generate blocks of data (col 2 lines 61-67, col 3 lines 57-60 RNN kernel defines what sequence of operations to perform and under what criteria to use for selecting CUs). As per claim 7 Nemlekar teaches further comprising: embedding information regarding the data generation ordering requirements of the producer kernel as a command in a kernel packet (col 2 lines 61-67, col 3 lines 57-60 RNN kernel defines what sequence of operations to perform and under what criteria to use for selecting CUs). As per claim 8 Nemlekar teaches further comprising: reading the command from the kernel packet; and calculating which workgroup or sequence of workgroups of the producer kernel to launch (col 4 lines 18-48, col 2 lines 61-67 scheduler reads operations and criteria of RNN kernel in order to determine what sequence of operations to launch on different CUs). Claims 2 is rejected under 103 as being unpatentable over Gupta et al (U.S. Pub. 2017/0004163) in view of Nemlekar (U.S. Pat. 11175946) and in further view of Tyrlik et al (U.S. Pub. 2023/0305844). Nemlekar and Tyrlik references have been previously presented. As per claim 2 Nemlekar teaches wherein the scheduling comprises: requesting a first kernel from a packet, the first kernel having output block-to-workgroup mappings; and that the first kernel comprising a plurality of workgroups having an output block-to- workgroup mapping in which a first workgroup in a sequence of workgroups is responsible for generating the initial block of data (col 2 lines 31-40, 61-67, col 3 line 56 – col 4 line 58 RNN kernel contains operations that output results from different submatrices, the operations are assigned to different CUs; the RNN kernel is received by a scheduler as a fused kernel command: col 1 lines 55-59). Gupta as modified by Nemlekar does not explicitly teach that the requesting of the first kernel entails selecting the first kernel from a packet comprising a plurality of implementations of kernels; and that the mappings are staggered. However, Tyrlik teaches that the requesting of the first kernel entails selecting the first kernel from a packet comprising a plurality of implementations of kernels; and that the mappings are staggered ([0072]). It would have been obvious to one with ordinary skill in the prior to the effective filling date of the invention to combine the teachings of Gupta as modified by Nemlekar and Tyrlik because both are directed towards parallel processing of matrix computations. One with ordinary skill in the art would be motivated to incorporate the teachings of Tyrlik into that of Gupta as modified by Nemlekar because Tyrlik further improves efficiency of parallel processing of matrix computations ([0010], [0011]). Claims 6 is rejected under 103 as being unpatentable over Gupta et al (U.S. Pub. 2017/0004163) in view of Nemlekar (U.S. Pat. 11175946) and in further view of Sen et al (U.S. Pub. 2016/0335143). Nemlekar and Sen references have been previously presented. As per claim 6 Gupta as modified by Nemlekar does not explicitly teach further comprising: specifying during launch of the producer kernel that data generated by the producer kernel is to be generated in an order based on another kernel to be launched prior to, concurrently with, or subsequent to the producer kernel. However, Sen teaches that further comprising: specifying during launch of the producer kernel that data generated by the producer kernel is to be generated in an order based on another kernel to be launched prior to, concurrently with, or subsequent to the producer kernel (pg. 4 claim 1 a particular sequence of mini-kernel execution is determined for a kernel based on prior execution of at least a portion of the kernel). It would have been obvious to one with ordinary skill in the prior to the effective filling date of the invention to combine the teachings of Gupta as modified by Nemlekar and Sen because both are directed towards parallel processing of kernel computations on CUs of GPUs. One with ordinary skill in the art would be motivated to incorporate the teachings of Sen into that of Gupta as modified by Nemlekar because Tyrlik further improves efficiency and performance of parallel processing of kernel computations on CUs of GPUs ([0011], [0012]). Allowable Subject Matter Claims 4, 9-11, 13-17, 19 and 20 would be allowable if rewritten to overcome the rejection(s) under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), 2nd paragraph, set forth in this Office action and to include all of the limitations of the base claim and any intervening claims. Response to Arguments Applicant’s arguments with respect to claim(s) 1, 2 and 5-8 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to BING ZHAO whose telephone number is (571)270-1745. The examiner can normally be reached on 9am - 5:30pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, James Trujillo can be reached on (571) 272-3677. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000 /BING ZHAO/Primary Examiner, Art Unit 2151
Read full office action

Prosecution Timeline

Dec 30, 2022
Application Filed
Jul 11, 2025
Non-Final Rejection — §103, §112
Oct 13, 2025
Response Filed
Oct 23, 2025
Final Rejection — §103, §112
Dec 11, 2025
Applicant Interview (Telephonic)
Dec 11, 2025
Examiner Interview Summary
Dec 29, 2025
Response after Non-Final Action
Jan 22, 2026
Request for Continued Examination
Jan 29, 2026
Response after Non-Final Action
Feb 20, 2026
Examiner Interview (Telephonic)
Feb 23, 2026
Non-Final Rejection — §103, §112 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

3-4
Expected OA Rounds
90%
Grant Probability
99%
With Interview (+46.5%)
3y 0m
Median Time to Grant
High
PTA Risk
Based on 468 resolved cases by this examiner. Grant probability derived from career allow rate.

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