DETAILED ACTION
Notice of Pre-AIA or AIA Status
1. The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
2. Claims 1-20 are pending.
Priority
3. Acknowledgment is made of applicant’s claim for foreign priority under 35 U.S.C. 119 (a)-(d).
Receipt is acknowledged of certified copies or papers required by 37 CFR 1.55.
Information Disclosure Statement
4. The information disclosure statement (IDS) submitted on 05/01/2023, 06/13/2023, 06/28/2023, 08/20/2023, 01/16/2025, 01/17/2025 and 01/18/2025 is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the Examiner.
Claim Rejections - 35 USC § 102
5. In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
6. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
7. Claims 1, 9, 14-16 and 20 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Chowdhary et al. (US Pub. No. 2021/0201191 A1 hereinafter “Chowdhary”).
Referring to claim 1, Chowdhary discloses an apparatus (Chowdhary – Fig. 4 shows an electronic device 102.) comprising:
one or more registers to store configuration data (Chowdhary – Fig.5 & par. [0097] disclose the configuration registers 177 store the configuration data 110 for the sensor unit 104.); and
a sensor having sensor event detection logic circuity to detect an event based at least in part on one or more sensor signals and the stored configuration data (Chowdhary – Par. [0015-0020] discloses the sensor unit 104 generates sensor signals related to a context or activity of the electronic device 102. The sensor unit 104 generates feature data from the sensor signals by processing the sensor signals. The sensor unit 104 classifies an action or context of the electronic device 104 based on the feature data and configured machine learning model. Fig.5 & par. [0088] disclose the sensor unit 104 is a motion sensor unit. Accordingly, the sensor unit 104 of FIG. 5 includes an accelerometer 170 and a gyroscope 172. Par. [0083] discloses the classifier 112 is an activity recognition classifier and a particular activity is detected. See Fig. 8, Steps 802-806.),
wherein the sensor event detection logic circuitry is to generate a signal to cause interrupt generator logic circuitry of the sensor to generate an interrupt (Chowdhary – Fig. 5 & par. [0099] disclose the interrupt generator 188 generates interrupts based on the classification data.).
Referring to claim 9, Chowdhary discloses the apparatus of claim 1, wherein a configuration register bank comprises the one or more registers (Chowdhary – Fig.5 & par. [0097] disclose the configuration registers 177 store the configuration data 110 for the sensor unit 104.).
Referring to claim 14, Chowdhary discloses the apparatus of claim 1, wherein a digital portion of the sensor comprises the one or more registers (Chowdhary – Fig.5 & par. [0097] disclose the configuration registers 177 store the configuration data 110 for the sensor unit 104.), the sensor event detection logic circuitry (Chowdhary – Par. [0015-0020] discloses the sensor unit 104 generates sensor signals related to a context or activity of the electronic device 102. The sensor unit 104 generates feature data from the sensor signals by processing the sensor signals. The sensor unit 104 classifies an action or context of the electronic device 104 based on the feature data and configured machine learning model. Fig.5 & par. [0088] disclose the sensor unit 104 is a motion sensor unit. Accordingly, the sensor unit 104 of FIG. 5 includes an accelerometer 170 and a gyroscope 172. Par. [0083] discloses the classifier 112 is an activity recognition classifier and a particular activity is detected. See Fig. 8, Steps 802-806.), and the interrupt generator logic circuitry Chowdhary – Fig. 5 & par. [0099] disclose the interrupt generator 188 generates interrupts based on the classification data.).
Referring to claim 15, Chowdhary discloses the apparatus of claim 1, wherein the stored configuration data is to cause the detection logic circuitry to detect the event based at least on one of: a single event, pattern recognition, graph pattern detection, and a time-based event (Chowdhary – See par. [0082-0083]).
Referring to claim 16, note the rejections of claim 1 above. The Instant Claim recites substantially same limitations as the above-rejected and is therefore rejected under same prior-art teachings.
Referring to claim 20, note the rejections of claim 15 above. The Instant Claim recites substantially same limitations as the above-rejected and is therefore rejected under same prior-art teachings.
Claim Rejections - 35 USC § 103
8. In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
9. Claims 2-5, 17 are rejected under 35 U.S.C. 103 as being unpatentable over Chowdhary in view of Seemann et al. (US Pub. No. 2023/0103738 A1 hereinafter “Seemann”).
Referring to claim 2, Chowdhary discloses the apparatus of claim 1, however, fails to explicitly disclose wherein the sensor comprises a fabric controller to transmit the generated interrupt to a fabric.
Seemann discloses wherein the sensor comprises a fabric controller to transmit the generated interrupt to a fabric (Seemann – Fig. 1 & par. [0014] disclose the sensor 108 may function as a transmitter which transmits a packet such as an Ethernet packet 116 from the sensor 108 over an Ethernet network 106 to the Ethernet controller 104 and host processor 102 which collectively functions as a receiver to receive the Ethernet packet 116. The packet 116 comprises of fragments consisting of interrupts to be received by the host processor 102.).
It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to include Seemann’s teachings with Chowdhary’s techniques for the benefit of reducing a number of interrupts to the host processor (Seemann – Par. [0010]).
Referring to claim 3, Chowdhary and Seemann disclose the apparatus of claim 2, wherein the fabric is to transmit the generated interrupt to a micro-controller (Seemann – Fig. 1 & par. [0014] disclose the sensor 108 may function as a transmitter which transmits a packet such as an Ethernet packet 116 from the sensor 108 over an Ethernet network 106 to the Ethernet controller 104 and host processor 102 which collectively functions as a receiver to receive the Ethernet packet 116. The packet 116 comprises of fragments consisting of interrupts to be received by the host processor 102.).
Referring to claim 4, Chowdhary and Seemann disclose the apparatus of claim 3, wherein the micro-controller comprises one of: a processor, a processor core, a Central Processing Unit (CPU), a power management controller, and a Field Programable Gate Array (FPGA) (Seemann – Fig. 1 shows the host processor 102.).
Referring to claim 5, Chowdhary and Seemann disclose the apparatus of claim 3, wherein the micro-controller is to receive stored sensor event data from one or more data registers of the sensor (Chowdhary – Par. [0098] discloses The data registers 184 provide their various data to the bus 186. The data stored by the data registers 184 includes the digitized sensor signals, filtered digital sensor signals, feature values generated by the arithmetic logic unit 178, feature sets stored by the feature registers 180, and classification data provided by the data registers 184. The bus 186 provides all of these data to the sensor manager 158. The sensor manager 158 can then further process the data, such as by generating labels. The sensor manager 158 can then output the sensor data to the sensor configuration system 106.) in response to a request to be generated by the micro-controller and directed to the sensor (Chowdhary – See the steps in Fig. 9) in response to receipt of the generated interrupt at the micro-controller (Seemann – Fig. 1 & par. [0014] disclose the sensor 108 may function as a transmitter which transmits a packet such as an Ethernet packet 116 from the sensor 108 over an Ethernet network 106 to the Ethernet controller 104 and host processor 102 which collectively functions as a receiver to receive the Ethernet packet 116. The packet 116 comprises of fragments consisting of interrupts to be received by the host processor 102.).
Referring to claim 17, note the rejections of claim 2 above. The Instant Claim recites substantially same limitations as the above-rejected and is therefore rejected under same prior-art teachings.
10. Claims 8, 13, 19 are rejected under 35 U.S.C. 103 as being unpatentable over Chowdhary in view of Bresser et al. (US Pub. No. 2022/0034941 A1 hereinafter “Bresser”).
Referring to claim 8, Chowdhary discloses the apparatus of claim 1, however, fails to explicitly disclose wherein the sensor is to generate the one or more sensor signals in response to one or more detected physical characteristics of a device under test.
Bresser discloses the sensor is to generate the one or more sensor signals in response to one or more detected physical characteristics of a device under test (Bresser – Claim 41 discloses the multiple measurement probes comprises a temperature sensor for measuring the temperature of a device under test and wherein the value of the measured analog signal refers to the temperature of the device under test.).
It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to include Bresser’s teachings with Chowdhary’s techniques for providing an improved measurement for devices under test under varying environmental conditions (Bresser – Par. [0006]).
Referring to claim 13, Chowdhary discloses the apparatus of claim 1, however, fails to explicitly disclose wherein the sensor comprises an analog portion to sense at least one physical characteristic of a device under test.
Bresser discloses the sensor comprises an analog portion to sense at least one physical characteristic of a device under test (Bresser – Claim 41 discloses the multiple measurement probes comprises a temperature sensor for measuring the temperature of a device under test and wherein the value of the measured analog signal refers to the temperature of the device under test.).
It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to include Bresser’s teachings with Chowdhary’s techniques for providing an improved measurement for devices under test under varying environmental conditions (Bresser – Par. [0006]).
Referring to claim 19, note the rejections of claim 8 above. The Instant Claim recites substantially same limitations as the above-rejected and is therefore rejected under same prior-art teachings.
11. Claim 10 is rejected under 35 U.S.C. 103 as being unpatentable over Chowdhary in view of Perner et al. (US Pub. No. 2009/0049267 A1 hereinafter “Perner”).
Referring to claim 10, Chowdhary discloses the apparatus of claim 1, however, fails to explicitly disclose wherein the one or more registers are read and/or write protected.
Perner discloses wherein the one or more registers are read and/or write protected (Perner – Par. [0027] discloses some of the configuration registers 26-i within the configuration register bank 26 are write protected.).
It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to include Perner’s teachings with Chowdhary’s techniques for providing a need to read out memory module specific information data from the memory module (Perner – Par. [0003]).
12. Claim 11 is rejected under 35 U.S.C. 103 as being unpatentable over Chowdhary in view of Seemann, and further in view of Leo et al. (US Pub. No. 2020/0072806 A1 hereinafter “Leo”).
Referring to claim 11, Chowdhary discloses the apparatus of claim 1, however, fails to explicitly disclose wherein the sensor is to cause transmission of the generated interrupt over a fabric, wherein the fabric comprises one of: an On-Chip Fabric (OSF), an Intel@ OSF (IOSF), a Peripheral Component Interconnect express (PCIe) interface, an Advanced eXtensible Interface (AXI), and an Advanced Peripheral Bus (APB).
Seemann discloses the sensor is to cause transmission of the generated interrupt over a fabric (Seemann – Fig. 1 & par. [0014] disclose the sensor 108 may function as a transmitter which transmits a packet such as an Ethernet packet 116 from the sensor 108 over an Ethernet network 106 to the Ethernet controller 104 and host processor 102 which collectively functions as a receiver to receive the Ethernet packet 116. The packet 116 comprises of fragments consisting of interrupts to be received by the host processor 102.).
It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to include Seemann’s teachings with Chowdhary’s techniques for the benefit of reducing a number of interrupts to the host processor (Seemann – Par. [0010]).
Chowdhary and Seemann fail to explicitly disclose wherein the fabric comprises one of: an On-Chip Fabric (OSF), an Intel@ OSF (IOSF), a Peripheral Component Interconnect express (PCIe) interface, an Advanced eXtensible Interface (AXI), and an Advanced Peripheral Bus (APB).
Leo discloses the fabric comprises one of: an On-Chip Fabric (OSF), an Intel@ OSF (IOSF), a Peripheral Component Interconnect express (PCIe) interface, an Advanced eXtensible Interface (AXI), and an Advanced Peripheral Bus (APB) (Leo – Fig. 2A & par. [0038] disclose interface 275 can be an APB (‘Advanced Peripheral Bus’) interface.).
It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to include Leo’s teachings with Chowdhary and Seemann’s techniques for an integrated environmental sensor device providing information as a system that includes a non-integrated sensor device communicatively coupled to an external application processor, while additionally providing one or more benefits such as reduced power consumption, reduced silicon area, reduced ASIC complexity, and increased flexibility (Leo – Par. [0023]).
13. Claim 12 is rejected under 35 U.S.C. 103 as being unpatentable over Chowdhary in view of Leo.
Referring to claim 12, Chowdhary discloses the apparatus of claim 1, however, fails to explicitly disclose wherein the apparatus is a System on Chip (SoC).
Leo discloses wherein the apparatus is a System on Chip (SoC) (Leo – Par. [0023] discloses an integrated sensor device (such as a system-on-chip or “SoC” device).).
It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to include Leo’s teachings with Chowdhary’s techniques for an integrated environmental sensor device providing information as a system that includes a non-integrated sensor device communicatively coupled to an external application processor, while additionally providing one or more benefits such as reduced power consumption, reduced silicon area, reduced ASIC complexity, and increased flexibility (Leo – Par. [0023]).
Allowable Subject Matter
14. Claims 6, 7 and 18 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is a statement of reasons for the indication of allowable subject matter:
The examiner finds that the prior art of record taken alone or in combination fails to teach and/or fairly suggest “the control information comprises a plurality of items of trap-masked-exception control information each associated with a respective one of a plurality of predetermined trap target exception levels, and the exception control circuitry is configured to control whether, in at least one scenario where the given exception occurs when the masking control information is in the masked state and the current exception level is less privileged than a given one of the plurality of predetermined trap target exception levels, the given exception is trapped to the given one of the plurality of predetermined trap target exception levels, depending on whether a corresponding item of trap-masked-exception control information associated with that given one of the plurality of predetermined trap target exception levels is in the trapped state.”, in combination with other recited limitations in dependent claim 2.
The examiner finds that the prior art of record taken alone or in combination fails to teach and/or fairly suggest “wherein the micro-controller is to reprogram an infield scan controller based at least on the generated interrupt.”, in combination with other recited limitations in dependent claim 6.
The examiner finds that the prior art of record taken alone or in combination fails to teach and/or fairly suggest “in which the control information comprises at least one further item of trap control information settable by software to one of a trapped state and an untrapped state; the exception control circuitry is configured to control whether to trap exceptions of at least the maskable class to a particular exception level, depending on whether the further item of trap control information is in the trapped state; and the at least one further item of trap control information takes precedence over the trap-masked-exception control information, so that in a case when the further item of trap control information is in the trapped state, the exception control circuitry is configured to trap the exception to the particular exception level based on the further item of trap control information regardless of whether the trap-masked-exception control information is in the trapped state.”, in combination with other recited limitations in dependent claim 9.
The examiner finds that the prior art of record taken alone or in combination fails to teach and/or fairly suggest “in which the maskable class of exceptions comprises asynchronous error exceptions indicative of a deviation from correct service.”, in combination with other recited limitations in dependent claim 10.
The examiner finds that the prior art of record taken alone or in combination fails to teach and/or fairly suggest “in which the non-maskable class of exceptions comprises synchronous external abort exceptions indicative of a deviation from correct service.”, in combination with other recited limitations in dependent claim 12.
The examiner finds that the prior art of record taken alone or in combination fails to teach and/or fairly suggest “one or more instructions that when executed on the processor configure the processor to perform one or more operations to cause a micro-controller to reprogram an infield scan controller based at least on the generated interrupt.”, in combination with other recited limitations in dependent claim 18.
Dependent claim 7 would be allowable based on their dependencies of dependent claim 6.
Conclusion
The examiner requests, in response to this office action, support be shown for language added to any original claims on amendment and any new claims. That is, indicate support for newly added claim language by specifically pointing to page(s) and line number(s) in the specification and/or drawing figure(s). This will assist the examiner in prosecuting the application. When responding to this office action, applicant is advised to clearly point out the patentable novelty which he or she thinks the claims present, in view of the state of art disclosed by the references cited or the objections made. He or she must also show how the amendments avoid such references or objections. See 37 C.F.R.I .Ill(c).
In amending in reply to a rejection of claims in an application or patent under reexamination, the applicant or patent owner must clearly point out the patentable novelty which he or she thinks the claims present in view the state of the art disclosed by the references cited or the objections made. The applicant or patent owner must also show how the amendments avoid such references or objections.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to DAYTON LEWIS-TAYLOR whose telephone number is (571) 2707754. The examiner can normally be reached on Monday through Thursday, 8AM TO 4PM, EASTERN TIME.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Idriss Alrobaye, can be reached on (571) 270-1023. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/Dayton Lewis-Taylor/
Examiner, Art Unit 2181
Prosecution Insights