DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Election/Restrictions
Applicant’s election without traverse of Species I, FIGs. 1-5 and claims 1-20 in the reply filed on11/24/2025 is acknowledged. Applicant states that FIG. 5 is an additional details associated with FIGs. 1-4. Therefore, applicant asserts that Species I should include FIG. 5. In the spirit of compact prosecution, Species I is now FIGs. 1-5, Species II is FIGs. 6-11B, Species III is FIGs. 12-15 and Species IV is FIGs. 16-18. Claims 16-19 are directed to Species II. Therefore, claims 16-19 are withdrawn. In this Office action, claims 1-15 and 20 are fully examined, and claims 16-19 are withdrawn.
Information Disclosure Statement
The information disclosure statement (IDS) submitted on 09/10/2024 is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner.
Drawings
The drawings are objected to under 37 CFR 1.83(a). The drawings must show every feature of the invention specified in the claims. Therefore, the “circuit is directly coupled between a first node of the secondary winding and a second node of the secondary winding” as recited in claim 2, the different limitations of claim 4, the “a vertical capacitor and a vertical field effect transistor” of claim 6, the “the primary winding resides within a first plane; wherein the second winding resides within a second plane, the second plane substantially parallel to the first plane” as recited in claim 8, the “a reference voltage node disposed in a circuit layer in which the primary winding resides; and wherein the circuit is disposed between the reference voltage node and the secondary winding” as claimed in claim 14 and similar limitations in claim 15 and the “electrical coupling of the circuit between a first node of the secondary winding and a second node of the secondary winding” of claim 20 must be shown or the feature(s) canceled from the claim(s). No new matter should be entered.
Corrected drawing sheets in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. The figure or figure number of an amended drawing should not be labeled as “amended.” If a drawing figure is to be canceled, the appropriate figure must be removed from the replacement sheet, and where necessary, the remaining figures must be renumbered and appropriate changes made to the brief description of the several views of the drawings for consistency. Additional replacement sheets may be necessary to show the renumbering of the remaining figures. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance.
The drawings are objected to as failing to comply with 37 CFR 1.84(p)(5) because they do not include the following reference sign(s) mentioned in the description: N51, N52, etc. Corrected drawing sheets in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim 20 is rejected under 35 U.S.C. 102(a)(1)as being anticipated by Somerville et al. (U.S. Patent No. 5,598,327).
With respect to claim 20, Somerville et al., hereinafter referred to as “Somerville,” teaches a method (FIGs. 2-5, FIGs. 3 and 4 are provided below for convenience) comprising:
fabricating an intermediary layer 11 between a primary winding 12-5 and a secondary winding 13 of a multi-layer transformer assembly to include a circuit 57 and or 58 operative to control flow of current through the secondary winding; and
providing electrical coupling (wire connection to the circuit) of the circuit between a first node I of the secondary winding and a second node J of the secondary winding (col. 4, lines 39-44, 55-58, col. 5, lines 4-8 and 34-45).
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Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claims 1-15 are rejected under 35 U.S.C. 103 as being unpatentable over Somerville in view of Fe et al. (U.S. PG. Pub. No. 2018/0226182 A1).
With respect to claim 1, Somerville teaches a multi-layer transformer assembly (FIGs. 2-5) comprising:
a primary winding 12-5;
a secondary winding 13 magnetically coupled to the primary winding;
an intermediary layer 111 disposed between the primary winding and the secondary winding; and
a circuit 57 and or 58 disposed on the intermediary layer, the circuit electrically coupled to the secondary winding (col. 4, lines 39-44, 55-58 and col. 5, lines 4-8).
Somerville does not expressly teach
a circuit disposed in the intermediary layer, the circuit electrically coupled to the secondary winding.
Fe et al., hereinafter referred to as “Fe,” teaches a multi-layer transformer assembly (FIGs. 10A-10D, Figure 10A is provided below for convenience) comprising:
a circuit (SR, CAP and or “switch…embedded in a PCB structure” para. [0044]) disposed in the intermediary layer (layer as shown in Figures 10A and or 10D), the circuit electrically coupled to the secondary winding (secondary winding(s) as shown in Figure 6, not expressly shown in Figures 10A or 10D) (para. [0044]).
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It would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to have the circuit in the intermediary layer as taught by Fe to the multi-layer transformer assembly of Somerville to protect the circuit or to reduce size.
With respect to claim 2, Somerville in view of Fe teaches the multi-layer transformer assembly as in claim 1, wherein the circuit is directly coupled between a first node I of the secondary winding and a second node J of the secondary winding (Somerville, col. 5, lines 34-45, Fe, para. [0035]).
With respect to claim 3, Somerville in view of Fe multi-layer transformer assembly as in claim 1, wherein the circuit is operative to control a flow of current through the secondary winding (Somerville, col. 5, lines 34-45, Fe, para. [0035]).
With respect to claim 4, Somerville in view of Fe multi-layer transformer assembly as in claim 1, wherein the circuit includes a capacitor CR and a switch (“switch”) disposed in series;
wherein the capacitor is coupled between a first node of the circuit and a second node of the circuit;
wherein the switch is coupled between the second node of the circuit and a third node of the circuit;
wherein the first node of the circuit is directly coupled to a first node of the secondary winding; and
wherein the third node of the circuit is directly coupled to a second node of the secondary winding (Fe, para. [0035]). The switch and capacitor as shown in FIG. 2 of the present invention is the same as the switch and capacitor drawn in Figure 6 of Fe. Therefore, Fe teaches the limitations claimed invention.
With respect to claim 5, Somerville in view of Fe multi-layer transformer assembly as in claim 4, wherein the circuit includes a first facing (lower face) and a second facing (upper face);
wherein the first node of the circuit and the third node of the circuit are disposed on the first facing of the circuit; and
wherein the second node of the circuit is disposed on the second facing of the circuit, the second facing opposite the first facing (Fe, paras. [0035] and [0044]). The switch and capacitor as shown in FIG. 2 of the present invention is the same as the switch and capacitor drawn in Figure 6 of Fe. Therefore, Fe teaches the limitations claimed invention.
With respect to claim 6, Somerville in view of Fe multi-layer transformer assembly as in claim 1, wherein the circuit includes a vertical capacitor and a vertical field effect transistor (Fe, para. [0035]). The switch and capacitor as shown in FIG. 2 of the present invention is the same as the switch and capacitor drawn in Figure 6 of Fe. Therefore, Fe teaches the limitations claimed invention.
With respect to claim 7, Somerville in view of Fe multi-layer transformer assembly as in claim 6, wherein a first node (an end) of the vertical capacitor is directly coupled to a first node (a terminal of the switch) of the switch via an electrically conductive path (conductor);
wherein a second node (another end) of the vertical capacitor is directly coupled to a first node (end) of the secondary winding; and
wherein a second node of the vertical switch is directly coupled to the second node of the secondary winding (Fe, para. [0035]). The switch and capacitor as shown in FIG. 2 of the present invention is the same as the switch and capacitor drawn in Figure 6 of Fe. Therefore, Fe teaches the limitations claimed invention.
With respect to claim 8, Somerville in view of Fe multi-layer transformer assembly as in claim 7, wherein the primary winding resides within a first plane (bottom plane);
wherein the second winding resides within a second plane (top plane), the second plane substantially parallel to the first plane;
wherein the intermediary layer resides between the first plane and the second plane (Somerville, col. 4,lines 39-44 and 54-58).
With respect to claim 9, Somerville in view of Fe multi-layer transformer assembly as in claim 1, wherein the circuit includes a capacitor and a switch; and
wherein a combination of the secondary winding, the switch, and the capacitor are connected in series (Fe, para. [0035]). The switch and capacitor as shown in FIG. 2 of the present invention is the same as the switch and capacitor drawn in Figure 6 of Fe. Therefore, Fe teaches the limitations claimed invention.
With respect to claim 10, Somerville in view of Fe multi-layer transformer assembly as in claim 9, wherein the combination of the secondary winding, the switch, and the capacitor form a series circuit loop (Fe, para. [0035]). The switch and capacitor as shown in FIG. 2 of the present invention is the same as the switch and capacitor drawn in Figure 6 of Fe. Therefore, Fe teaches the limitations claimed invention.
With respect to claim 11, Somerville in view of Fe multi-layer transformer assembly as in claim 1, wherein the intermediary layer includes a substrate (“circuit board 11” col. 4, lines 17-18);
wherein the primary winding is affixed to a first surface (bottom surface) of the substrate; and
wherein the secondary winding is affixed to a second surface (top surface) of the substrate (Somerville, col. 4,lines 39-44 and 54-58).
With respect to claim 12, Somerville in view of Fe multi-layer transformer assembly as in claim 1 further comprising:
a core 18 and or 20 of magnetic permeable material passing through the intermediary layer;
wherein the primary winding is wrapped around the core; and
wherein the secondary winding is wrapped around the core (Somerville, col. 4, lines 18-24).
With respect to claim 13, Somerville in view of Fe multi-layer transformer assembly as in claim 1, wherein the intermediary layer includes a substrate (substrate as shown in Figure 10A of Fe), the circuit disposed in an inlay (“embedded”) of the substrate (Fe, para. [0044]).
With respect to claim 14, best understood in view of 35 USC 112(b) rejection, Somerville in view of Fe multi-layer transformer assembly as in claim 1 further comprising:
a reference voltage node disposed in a circuit layer in which the primary winding resides; and
wherein the circuit is disposed between the reference voltage node and the secondary winding (Fe, para. [0035]). The circuit schematic in FIG. 2 of the present invention is similar, if not the same as, to the circuit schematic shown in Figure 6 of Fe. Therefore, Fe would have disclose the claimed invention.
With respect to claim 15, Somerville in view of Fe multi-layer transformer assembly as in claim 1 further comprising:
a reference voltage node disposed in a circuit layer in which the primary winding resides, the reference node not electrically connected to the primary winding;
wherein the circuit includes a first circuit component, a first surface node of the first circuit component electrically coupled directly to the reference voltage node, a second surface node of the first circuit component electrically coupled directly to the secondary winding(Fe, para. [0035]). The circuit schematic in FIG. 2 of the present invention is similar, if not the same as, to the circuit schematic shown in Figure 6 of Fe. Therefore, Fe would have disclose the claimed invention.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. A list of pertinent prior art is attached in form PTO-892.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to MANGTIN LIAN whose telephone number is (571)270-5729. The examiner can normally be reached Monday-Friday 0800-1700.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Shawki S. Ismail can be reached at 571-272-3985. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/MANG TIN BIK LIAN/ Primary Examiner, Art Unit 2837