DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
This action is in response to the amendment filed on Feb. 2nd, 2026. The amendments are linked to the original application filed on Jan. 4th, 2023.
Response to Amendment
The Examiner thanks the applicant for the remarks, edits and arguments.
Regarding Claim Objections - Specification
Applicant Remarks:
The applicant states that amendments have been made to the specification to comply with the objections brought by the examiner in the non-final rejection. The applicant asks for the withdrawal of the objection to the specification.
Examiner Response:
The examiner has noted and considered the amendments made to the specification. The examiner believes the issues have been corrected and no other objections have been noted to the specification at this time. Therefore, the examiner has withdrawn the objection to the specification.
Regarding Claim Rejections – 35 U.S.C. 101
Applicant Remarks:
The applicant has made amendments to the claims and believes the current amended claims comply with 35 U.S.C. 101. The applicant believes the claims dose not recite abstract ideas and the even if the claims did recite abstract concepts the claims recite additional features and elements would integrate the judicial exceptions into a practical application under Step 2A, prong 2. Finally, the applicant believes that further evaluation of the claims with the Alice/Mayo test would dhow that the independent claims recite features that amounts to significantly more that the judicial exceptions under Step 2B. The applicant provides supporting arguments as to why the claims would pass the Alice/Mayo test at each step.
The applicant argues that the amended claims do not recite abstract ideas under Step 2A, Prong one. The applicant believes the claims recite processes that require a computer to perform and cannot be performed in the human mind alone. The applicant provides Example 37 from the Subject Matter Eligibility Examples and states that this example is can be applied the current amended claims. The applicant points to the limitations of claim 1 and believes that the limitations recite the use of real components to perform the steps, which would not be directed to an abstract idea.
Next, regarding Step 2A, Prong 2, the applicant points to Example 3 in the Subject Matter Eligibility Examples. The applicant believes that this example is applicable to the current amended independent claims. The applicant argues that the method for “zero-Padding” disclosed in claim 1 recites features that are integrated into a practical application by improving memory storage and computations of a computing system. The applicant further points to PTAB cases and believes that the claims are directed to improving memory usage to process CNN operations and therefore the additional elements in the provides sufficient support to integrate any abstract ideas into a practical application. The applicant has provided supporting limitations of claim 1 and states that these limitations further reinforce a process that discloses the improvement stated above.
Next, the applicant argues that the even reviewing the additional elements of claim 1, the claims would still recite a practical application and a technical improvement as stated above. For these reasons, and the supporting evidence listed in the remarks, the applicant believes that the current claims comply with 35 U.S.C. 101 and requests the rejection under 35 U.S.C. 101 be withdrawn.
Examiner Response:
The applicant has made amendments to the claims and believes they comply with 35 U.S.C. 101. The applicant argues that the claims do not recite abstract ideas and even if they did the applicant argues that the claims recite limitations and features that would integrate into a practical application. Finally, the applicant argues that the claims recite significantly more than abstract concepts and therefore request the withdrawal of the rejection under 35 U.S.C. 101.
First the applicant believes the claims do not recite abstract ideas and recites Example 37 of the posted Subject Matter Eligibility examples. The applicant states that the limitations, “accessing, from an external memory by the neural processor, an input tensor” and “generating a set of edge values based on a location of the partition in the internal buffer, wherein the set of edge values indicate an output row edge for the partition.” Cannot be performed in a human mind and recite the use of concrete components that are required to perform the claimed actions. Examiner would like to point to MPEP 2106.04(a)(2)(III)(C) which states, “Claims can recite a mental process even if they are claimed as being performed on a computer.”. The claim limitation, “accessing, from an external memory by the neural processor, an input tensor;” would not be considered an abstract idea because, as stated by the applicant, requires a computer to execute the function of accessing memory. However, the examiner would like to note that this limitation does recite well understood, routine and conventional concepts of storing and retrieving information from memory, see MPEP 2106.05(d)(II)(iv). This limitation would be evaluated at a later step of the Alice/Mayo test. Regarding limitation, “generating a set of edge values based on a location of the partition in the internal buffer, wherein the set of edge values indicate an output row edge for the partition.” The examiner believes that this process can be performed by a human with the assistance of a generic computer as a tool. A human is able to generate values of any kind and store them in a computer. These generated numbers can be based on an evaluation or observation of images or computer data by a human. Further the MPEP 2106.04(a)(2)(III)(C) states, “In evaluating whether a claim that requires a computer recites a mental process, examiners should carefully consider the broadest reasonable interpretation of the claim in light of the specification. For instance, examiners should review the specification to determine if the claimed invention is described as a concept that is performed in the human mind and applicant is merely claiming that concept performed 1) on a generic computer, or 2) in a computer environment, or 3) is merely using a computer as a tool to perform the concept. In these situations, the claim is considered to recite a mental process.”. Using the broadest reasonable interpretation the examiner believes that the independent claims recite claim limitations that recite abstract ideas which use a generic computer as a tool to perform the abstract ideas. Further evaluation of the claims using the Alice/Mayo test is required.
Next, the applicant states that the remaining elements recite a method that provides an improvement to computing systems and recites a practical application. The applicant cites multiple limitations they believe recites the technical improvement. The examiner would like to point to the MPEP 2106.04(d)(1) which states, “In short, first the specification should be evaluated to determine if the disclosure provides sufficient details such that one of ordinary skill in the art would recognize the claimed invention as providing an improvement. … Second, if the specification sets forth an improvement in technology, the claim must be evaluated to ensure that the claim itself reflects the disclosed improvement. That is, the claim includes the components or steps of the invention that provide the improvement described in the specification. The claim itself does not need to explicitly recite the improvement described in the specification (e.g., "thereby increasing the bandwidth of the channel")”. The examiner would like to note that the claims are required to recite the technical improvements stated in the specification in some capacity. The claims are not required to recite improvements explicitly. After reviewing the claims in the examiner believes that a person of ordinary skill in the art would not be able to disclose the technical improvements from the claims. The claims, as written, recites abstract concepts and other concepts which would be considered well understood, routine and/or conventual. Further limitations of the claims recite instructions to perform the abstract ideas. For example, the limitation, “efficient zero-padding” only recites a process and does not disclose an improvement to computers or technology. Next the applicant recites, “instead of padding around the input tensor, generating an updated zero-padding pattern representing a zero-padding pattern for a next cycle in the row of the kernel by: generating a shifted set of values based on shifting the initial set of values in the padded register; and performing an XOR operation on the set of edge values and the shifted set of values.”. The examiner believes these elements do not disclose an improvement to a computer or technology. The process of Zero padding is a common process in CNN’s and the use of the XOR function is a process that is used in binary CNN’s. The examiner would like to note that the novelty of the claimed invention is not in question, the specification does disclose sufficient improvements to computers and technology, however, the examiner believes the claims fail to disclose those improvements so that a person of ordinary skill in the art would recognize those improvements.
Next, the applicant recites a case, DDR Holdings, LLC v. Hotels.com, which states, “claimed solution is necessarily rooted in computer technology in order to overcome a problem specifically arising in the realm of computer networks.” Which is similar to the claimed invention. The examiner would again like to restate that the per MPEP 2106.04(d)(1) in evaluating claims for technical improvements, the claims themselves must disclose the claimed improvements in some capacity. The examiner believes that the solutions proposed in the specification are designed to solve problems in computing. However, as stated above, the examiner believes the claims, as written, fail to disclose the claimed improvement to such a level that a person of ordinary skill in the art would recognize the improvements. The claims recite processes that are well understood, routine and/or conventional. These limitations are evaluated in Steps 2A, Prong 2 and Step 2B, see 101 rejection below.
Finally, after each amendment the examiner must reapply the Alice/Mayo test to ensure the claims comply with 35 U.S.C. 101. After reviewing the amended claims and the applicants remarks the examiner believes the current amended claims do not comply with 35 U.S.C. 101. Reviewing the independent claims the examiner believes, for the reasons above, the claims still recite patent ineligible subject matter and does not pass the Alice/Mayo test. Therefore, the examiner has upheld the rejection under 35 USC 101, see 101 rejection below.
Regarding Claim Rejections – 35 U.S.C. 102
Applicant Remarks:
The applicant states that they have made amendments to the claims and during the interview the examiner stated that the primary art Young would fail to disclose each and every element of the amended claims. Further the applicant provides evidence in Young that would prove that Young is unable to teach the amendments made to claim 1. Further the applicant argues that Young is unable to teach each and every element of the independent claims, you would also fail to disclose all of the elements of the dependent claims under the 102 rejection as well. For these reasons, and the arguments listed in the remarks submitted, the applicant requests the rejection under 35 U.S.C. 102 be withdrawn.
Examiner Response:
After each amendment the claims and remarks are considered by the examiner. After reading the remarks from the applicant the examiner believes the arguments to be persuasive. Further evaluation of Young was performed and Young was unable to anticipate each and every element of the amended claims in accordance with 35 U.S.C. 102. Further search is completed after each amendment is submitted. The examiner performed a complete search and no single art was able to anticipate the claimed subject matter in accordance with 35 U.S.C. 102. Therefore, the examiner has withdrawn the rejection under 35 U.S.C. 102.
Regarding Claim Rejections – 35 U.S.C. 103
Applicant Remarks:
As stated above, the applicant believes that the art Young fails to disclose or anticipate each and every element of the amended claims. Therefore, because of claim dependency, the arts used to disclose the dependent claims would also need to cure the deficiencies of Young in the independent claims. The applicant believes that the other prior arts used for the 103 rejection taken alone or in combination with Young would fail to teach or disclose the deficiencies of Young n the independent claim and would not be able to disclose each and every element of the dependent claims. For the reasons stated above, and the reasons stated in the submitted remarks, the applicant asks for the rejection under 35 U.S.C. 103 be withdrawn.
Examiner Response:
The applicant and examiner have agreed that Young fails to anticipate each and every element of the amended claims in accordance with 35 U.S.C. 102. However, as stated above, after each amendment a complete search is performed to ensure that the claimed subject matter complies with 35 U.S.C. 103. After completing this search, the examiner was able to locate prior art, prior to the effective filing date of this application, that is able to, in combination of Young, Liu and Ren, disclose the claimed subject matter. The new proposed art, Tang et al, discloses a process that tests different image partitioning and handling of input tensors in a CNN. The examiner believes that the combination of these arts would lead one of ordinary skill in the art to disclose the claimed subject matter prior to the effective filing date of this applicant. Therefore, the examiner will uphold the current 35 U.S.C. 103 rejection with newly discovered prior art, see 103 rejection below.
Claim Rejections - 35 USC § 101
35 U.S.C. 101 reads as follows:
Whoever invents or discovers any new and useful process, machine, manufacture, or composition of matter, or any new and useful improvement thereof, may obtain a patent therefor, subject to the conditions and requirements of this title.
Claims 1-20 are rejected under 35 U.S.C 101 because the claimed invention is directed to an abstract idea without significantly more. The analysis of the claims will follow the 2019 Revised Patent Subject Matter Eligibility Guidance, 84 Fed. Reg. 50 (“2019 PEG”).
Claim 1
Step 1 – Is the claim to a process, machine, manufacture or composition of matter?
Claim 1 recites, “A method for efficient zero-padding in convolution performed by a neural processor, the method comprising:” therefore it is directed to the statutory category of a process.
Step 2A Prong 1 – Does the claim recite an abstract idea, law of nature, or natural phenomenon?
The claim recites, inter alia:
“dividing, by a rasterizer of the neural processor, the input tensor into a plurality of partitions;” Under its broadest reasonable interpretation in light of the specification, this limitation encompasses the mental process of evaluating and observing data, which is an evaluation or observation that is practically capable of being performed in the human mind with the assistance of pen and paper. A human is able to use a generic computer to divide an image from left to right and top to bottom. The limitation is merely applying an abstract idea on generic computer system. See MPEP 2106.04(a)(2)(III)(c).
“for each row of a kernel for performing convolution on the input tensor:” Under its broadest reasonable interpretation in light of the specification, this limitation encompasses mathematical concept of utilizing a mathematical formula to perform calculations. A human is able to perform the computations using known functions to perform functions such as matrix multiplication. This claim discloses a math operation and therefore is ineligible.
“for a compute cycle in the row of the kernel: performing, by the neural processor, computations associated with the convolution based in part on the zero-padding pattern,” Under its broadest reasonable interpretation in light of the specification, this limitation encompasses mathematical concept of utilizing a mathematical formula to perform calculations. A human is able to perform the computations using known functions to perform functions such as matrix multiplication. This claim discloses a math operation and therefore is ineligible.
“performing an XOR operation on the set of edge values and the shifted set of values, and” Under its broadest reasonable interpretation in light of the specification, this limitation encompasses mathematical concept of utilizing a mathematical formula to perform calculations. A human is able to perform the computations using known functions to perform functions such as binary or bitwise operations. This claim discloses a math operation and therefore is ineligible.
Step 2A Prong 2 – Does the claim recite additional elements that integrate the judicial exception into a practical application?
The claim recites the additional elements, “accessing, from an external memory by the neural processor, an input tensor;” is an insignificant extra-solution activity required for any uses of the mental processes (see MPEP § 2106.05(g)) As such, the claim is ineligible.
“storing a partition of the plurality of partitions in an internal buffer of the neural processor;” is an insignificant extra-solution activity required for any uses of the mental processes (see MPEP § 2106.05(g)) As such, the claim is ineligible.
“generating a set of edge values based on a location of the partition in the internal buffer,” amounts to generic computer components used as a tool to perform an existing process. Thus, the additional element amounts to no more than a recitation of the words "apply it" (or an equivalent) or are more than mere instructions to implement an abstract idea or other exception on a computer (see MPEP § 2106.05(f)).
“wherein the set of edge values indicates an output row edge for the partition;” amounts to generic computer components used as a tool to perform an existing process. Thus, the additional element amounts to no more than a recitation of the words "apply it" (or an equivalent) or are more than mere instructions to implement an abstract idea or other exception on a computer (see MPEP § 2106.05(f)).
“populating an edge register with the set of edge values;” amounts to generic computer components used as a tool to perform an existing process. Thus, the additional element amounts to no more than a recitation of the words "apply it" (or an equivalent) or are more than mere instructions to implement an abstract idea or other exception on a computer (see MPEP § 2106.05(f)).
“populating a padded register with an initial set of values indicating a zero-padding pattern based on a size of the kernel;” amounts to generic computer components used as a tool to perform an existing process. Thus, the additional element amounts to no more than a recitation of the words "apply it" (or an equivalent) or are more than mere instructions to implement an abstract idea or other exception on a computer (see MPEP § 2106.05(f)).
“instead of padding around the input tensor, generating an updated zero- padding pattern representing a zero-padding pattern for a next cycle in the row of the kernel by:” amounts to generic computer components used as a tool to perform an existing process. Thus, the additional element amounts to no more than a recitation of the words "apply it" (or an equivalent) or are more than mere instructions to implement an abstract idea or other exception on a computer (see MPEP § 2106.05(f)).
“generating a shifted set of values based on shifting the initial set of values in the padded register; and” amounts to generic computer components used as a tool to perform an existing process. Thus, the additional element amounts to no more than a recitation of the words "apply it" (or an equivalent) or are more than mere instructions to implement an abstract idea or other exception on a computer (see MPEP § 2106.05(f)).
“updating the initial set of values in the padded register with the updated zero- padding pattern.” amounts to generic computer components used as a tool to perform an existing process. Thus, the additional element amounts to no more than a recitation of the words "apply it" (or an equivalent) or are more than mere instructions to implement an abstract idea or other exception on a computer (see MPEP § 2106.05(f)).
Step 2B – Does the claim recite additional elements that amount to significantly more than the judicial exception?
Finally, the claim taken as a whole does not contain an inventive concept which provides significantly more than the abstract idea. The additional elements, “accessing, from an external memory by the neural processor, an input tensor;” is an insignificant extra-solution activity required for any uses of abstract ideas (see MPEP § 2106.05(g)), and is a well-understood, routine, conventional activity (see MPEP § 2106.05(d)(iv); “Storing and retrieving information in memory”.
“storing a partition of the plurality of partitions in an internal buffer of the neural processor;” is an insignificant extra-solution activity required for any uses of abstract ideas (see MPEP § 2106.05(g)), and is a well-understood, routine, conventional activity (see MPEP § 2106.05(d)(iv); “Storing and retrieving information in memory”.
“generating a set of edge values based on a location of the partition in the internal buffer,” amounts to generic computer components used as a tool to perform an existing process. Thus, the additional element amounts to no more than a recitation of the words "apply it" (or an equivalent) or are more than mere instructions to implement an abstract idea or other exception on a computer (see MPEP § 2106.05(f)).
“wherein the set of edge values indicates an output row edge for the partition;” amounts to generic computer components used as a tool to perform an existing process. Thus, the additional element amounts to no more than a recitation of the words "apply it" (or an equivalent) or are more than mere instructions to implement an abstract idea or other exception on a computer (see MPEP § 2106.05(f)).
“populating an edge register with the set of edge values;” amounts to generic computer components used as a tool to perform an existing process. Thus, the additional element amounts to no more than a recitation of the words "apply it" (or an equivalent) or are more than mere instructions to implement an abstract idea or other exception on a computer (see MPEP § 2106.05(f)).
“populating a padded register with an initial set of values indicating a zero-padding pattern based on a size of the kernel;” amounts to generic computer components used as a tool to perform an existing process. Thus, the additional element amounts to no more than a recitation of the words "apply it" (or an equivalent) or are more than mere instructions to implement an abstract idea or other exception on a computer (see MPEP § 2106.05(f)).
“instead of padding around the input tensor, generating an updated zero- padding pattern representing a zero-padding pattern for a next cycle in the row of the kernel by:” amounts to generic computer components used as a tool to perform an existing process. Thus, the additional element amounts to no more than a recitation of the words "apply it" (or an equivalent) or are more than mere instructions to implement an abstract idea or other exception on a computer (see MPEP § 2106.05(f)).
“generating a shifted set of values based on shifting the initial set of values in the padded register; and” amounts to generic computer components used as a tool to perform an existing process. Thus, the additional element amounts to no more than a recitation of the words "apply it" (or an equivalent) or are more than mere instructions to implement an abstract idea or other exception on a computer (see MPEP § 2106.05(f)).
“updating the initial set of values in the padded register with the updated zero- padding pattern.” amounts to generic computer components used as a tool to perform an existing process. Thus, the additional element amounts to no more than a recitation of the words "apply it" (or an equivalent) or are more than mere instructions to implement an abstract idea or other exception on a computer (see MPEP § 2106.05(f)).
Taken alone or in combination, the additional elements of the claim do not provide an inventive concept and thus the claim is subject-matter ineligible.
Claim 2
Step 1 – Is the claim to a process, machine, manufacture or composition of matter?
A process, as above.
Step 2A Prong 1 – Does the claim recite an abstract idea, law of nature, or natural phenomenon?
The claim recites the abstract ideas of the preceding claims from which it depends.
Step 2A Prong 2 – Does the claim recite additional elements that integrate the judicial exception into a practical application?
The claim recites the additional elements, “wherein generating the updated zero- padding pattern is based in part on out-of-bound input elements or a position of the output row edge.” amounts to generic computer components used as a tool to perform an existing process. Thus, the additional element amounts to no more than a recitation of the words "apply it" (or an equivalent) or are more than mere instructions to implement an abstract idea or other exception on a computer (see MPEP § 2106.05(f)).
Step 2B – Does the claim recite additional elements that amount to significantly more than the judicial exception?
Finally, the claim taken as a whole does not contain an inventive concept which provides significantly more than the abstract idea. The additional elements, “wherein generating the updated zero- padding pattern is based in part on out-of-bound input elements or a position of the output row edge.” amounts to generic computer components used as a tool to perform an existing process. Thus, the additional element amounts to no more than a recitation of the words "apply it" (or an equivalent) or are more than mere instructions to implement an abstract idea or other exception on a computer (see MPEP § 2106.05(f)).
Taken alone or in combination, the additional elements of the claim do not provide an inventive concept and thus the claim is subject-matter ineligible.
Claim 3
Step 1 – Is the claim to a process, machine, manufacture or composition of matter?
A process, as above.
Step 2A Prong 1 – Does the claim recite an abstract idea, law of nature, or natural phenomenon?
The claim recites the abstract ideas of the preceding claims from which it depends.
Step 2A Prong 2 – Does the claim recite additional elements that integrate the judicial exception into a practical application?
The claim recites the additional elements, “wherein the set of edge values indicate the position of the output row edge.” amounts to generic computer components used as a tool to perform an existing process. Thus, the additional element amounts to no more than a recitation of the words "apply it" (or an equivalent) or are more than mere instructions to implement an abstract idea or other exception on a computer (see MPEP § 2106.05(f)).
Step 2B – Does the claim recite additional elements that amount to significantly more than the judicial exception?
Finally, the claim taken as a whole does not contain an inventive concept which provides significantly more than the abstract idea. The additional elements, “wherein the set of edge values indicate the position of the output row edge.” amounts to generic computer components used as a tool to perform an existing process. Thus, the additional element amounts to no more than a recitation of the words "apply it" (or an equivalent) or are more than mere instructions to implement an abstract idea or other exception on a computer (see MPEP § 2106.05(f)).
Taken alone or in combination, the additional elements of the claim do not provide an inventive concept and thus the claim is subject-matter ineligible.
Claim 4
Step 1 – Is the claim to a process, machine, manufacture or composition of matter?
A process, as above.
Step 2A Prong 1 – Does the claim recite an abstract idea, law of nature, or natural phenomenon?
The claim recites, inter alia:
“performing an XOR operation between the shifted set of updated values and the set of edge values.” Under its broadest reasonable interpretation in light of the specification, this limitation encompasses mathematical concept of utilizing a mathematical formula to perform calculations. A human is able to perform the computations using known functions to perform functions such as binary or bitwise operations. This claim discloses a math operation and therefore is ineligible.
Step 2A Prong 2 – Does the claim recite additional elements that integrate the judicial exception into a practical application?
The claim recites the additional elements, “wherein the updated zero-padding pattern is a first updated zero-padding pattern, and wherein generating the updated zero-padding pattern representing the zero-padding pattern for the next cycle comprises:” amounts to generic computer components used as a tool to perform an existing process. Thus, the additional element amounts to no more than a recitation of the words "apply it" (or an equivalent) or are more than mere instructions to implement an abstract idea or other exception on a computer (see MPEP § 2106.05(f)).
“generating a shifted set of updated values based on shifting the first updated zero-padding pattern in the padded register; and” amounts to generic computer components used as a tool to perform an existing process. Thus, the additional element amounts to no more than a recitation of the words "apply it" (or an equivalent) or are more than mere instructions to implement an abstract idea or other exception on a computer (see MPEP § 2106.05(f)).
Step 2B – Does the claim recite additional elements that amount to significantly more than the judicial exception?
Finally, the claim taken as a whole does not contain an inventive concept which provides significantly more than the abstract idea. The additional elements, “wherein the updated zero-padding pattern is a first updated zero-padding pattern, and wherein generating the updated zero-padding pattern representing the zero-padding pattern for the next cycle comprises:” amounts to generic computer components used as a tool to perform an existing process. Thus, the additional element amounts to no more than a recitation of the words "apply it" (or an equivalent) or are more than mere instructions to implement an abstract idea or other exception on a computer (see MPEP § 2106.05(f)).
“generating a shifted set of updated values based on shifting the first updated zero-padding pattern in the padded register; and” amounts to generic computer components used as a tool to perform an existing process. Thus, the additional element amounts to no more than a recitation of the words "apply it" (or an equivalent) or are more than mere instructions to implement an abstract idea or other exception on a computer (see MPEP § 2106.05(f)).
Taken alone or in combination, the additional elements of the claim do not provide an inventive concept and thus the claim is subject-matter ineligible.
Claim 5
Step 1 – Is the claim to a process, machine, manufacture or composition of matter?
A process, as above.
Step 2A Prong 1 – Does the claim recite an abstract idea, law of nature, or natural phenomenon?
The claim recites, inter alia:
“wherein generating the updated zero-padding pattern comprises: determining that a kernel row or column is out of bound;” Under its broadest reasonable interpretation in light of the specification, this limitation encompasses the mental process of evaluating and observing data, which is an evaluation or observation that is practically capable of being performed in the human mind with the assistance of pen and paper. A human is able to evaluate data and observe if values are out of bounds. The limitation is merely applying an abstract idea on generic computer system. See MPEP 2106.04(a)(2)(III)(c).
“identifying the out-of-bound input elements based on the out-of-bound kernel row or column; and” Under its broadest reasonable interpretation in light of the specification, this limitation encompasses the mental process of evaluating and observing data, which is an evaluation or observation that is practically capable of being performed in the human mind with the assistance of pen and paper. A human is able to evaluate data and observe if values are out of bounds. The limitation is merely applying an abstract idea on generic computer system. See MPEP 2106.04(a)(2)(III)(c).
Step 2A Prong 2 – Does the claim recite additional elements that integrate the judicial exception into a practical application?
The claim recites the additional elements, “including the out-of-bound input elements in the updated zero-padding pattern.” amounts to generic computer components used as a tool to perform an existing process. Thus, the additional element amounts to no more than a recitation of the words "apply it" (or an equivalent) or are more than mere instructions to implement an abstract idea or other exception on a computer (see MPEP § 2106.05(f)).
Step 2B – Does the claim recite additional elements that amount to significantly more than the judicial exception?
Finally, the claim taken as a whole does not contain an inventive concept which provides significantly more than the abstract idea. The additional elements, “including the out-of-bound input elements in the updated zero-padding pattern.” amounts to generic computer components used as a tool to perform an existing process. Thus, the additional element amounts to no more than a recitation of the words "apply it" (or an equivalent) or are more than mere instructions to implement an abstract idea or other exception on a computer (see MPEP § 2106.05(f)).
Taken alone or in combination, the additional elements of the claim do not provide an inventive concept and thus the claim is subject-matter ineligible.
Claim 6
Step 1 – Is the claim to a process, machine, manufacture or composition of matter?
A process, as above.
Step 2A Prong 1 – Does the claim recite an abstract idea, law of nature, or natural phenomenon?
The claim recites, inter alia:
“wherein generating the updated zero-padding pattern comprises: determining whether the output row edge is at a leftmost position;” Under its broadest reasonable interpretation in light of the specification, this limitation encompasses the mental process of evaluating and observing data, which is an evaluation or observation that is practically capable of being performed in the human mind with the assistance of pen and paper. A human is able to evaluate a value and apply judgement as to the location of the values. The limitation is merely applying an abstract idea on generic computer system. See MPEP 2106.04(a)(2)(III)(c).
“responsive to determining that the output row edge is at the leftmost position, for each compute cycle: determining whether a kernel element positioned at a row corresponding to a row number and a column corresponding to a column number satisfies a condition of that the column number is no greater than a floor of a half of a width of the kernel; and” Under its broadest reasonable interpretation in light of the specification, this limitation encompasses the mental process of evaluating and observing data, which is an evaluation or observation that is practically capable of being performed in the human mind with the assistance of pen and paper. A human is able to evaluate a value and apply judgement as to the location of the values. The limitation is merely applying an abstract idea on generic computer system. See MPEP 2106.04(a)(2)(III)(c).
“responsive to determining that the kernel element satisfies the condition, identifying one or more input elements next to the output row edge; and” Under its broadest reasonable interpretation in light of the specification, this limitation encompasses the mental process of evaluating and observing data, which is an evaluation or observation that is practically capable of being performed in the human mind with the assistance of pen and paper. A human is able to evaluate a value and apply judgement as to the location of the values. The limitation is merely applying an abstract idea on generic computer system. See MPEP 2106.04(a)(2)(III)(c).
“including the one or more input elements in the updated zero-padding pattern.” Under its broadest reasonable interpretation in light of the specification, this limitation encompasses the mental process of evaluating and observing data, which is an evaluation or observation that is practically capable of being performed in the human mind with the assistance of pen and paper. A human is able to evaluate a value and apply judgement as to the location of the values. The limitation is merely applying an abstract idea on generic computer system. See MPEP 2106.04(a)(2)(III)(c).
Step 2A Prong 2 – Does the claim recite additional elements that integrate the judicial exception into a practical application?
This claim does not recite any additional limitations which integrate the abstract idea into a practical application.
Step 2B – Does the claim recite additional elements that amount to significantly more than the judicial exception?
Finally, the claim taken as a whole does not contain an inventive concept which provides significantly more than the abstract idea and thus the claim is subject-matter ineligible.
Claim 7
Step 1 – Is the claim to a process, machine, manufacture or composition of matter?
A process, as above.
Step 2A Prong 1 – Does the claim recite an abstract idea, law of nature, or natural phenomenon?
The claim recites, inter alia:
“wherein generating the updated zero-padding pattern comprises: determining whether the output row edge is at a rightmost position;” Under its broadest reasonable interpretation in light of the specification, this limitation encompasses the mental process of evaluating and observing data, which is an evaluation or observation that is practically capable of being performed in the human mind with the assistance of pen and paper. A human is able to evaluate a value and apply judgement as to the location of the values. The limitation is merely applying an abstract idea on generic computer system. See MPEP 2106.04(a)(2)(III)(c).
“responsive to determining that the output row edge is at the rightmost position, for each compute cycle: determining whether a kernel element positioned at a row corresponding to a row number and a column corresponding to a column number satisfies a condition of that the column number is no less than a ceiling of a half of a width of the kernel;” Under its broadest reasonable interpretation in light of the specification, this limitation encompasses the mental process of evaluating and observing data, which is an evaluation or observation that is practically capable of being performed in the human mind with the assistance of pen and paper. A human is able to evaluate a value and apply judgement as to the location of the values. The limitation is merely applying an abstract idea on generic computer system. See MPEP 2106.04(a)(2)(III)(c).
“responsive to determining that the kernel element satisfies the condition, identifying one or more input elements next to the output row edge; and” Under its broadest reasonable interpretation in light of the specification, this limitation encompasses the mental process of evaluating and observing data, which is an evaluation or observation that is practically capable of being performed in the human mind with the assistance of pen and paper. A human is able to evaluate a value and apply judgement as to the location of the values. The limitation is merely applying an abstract idea on generic computer system. See MPEP 2106.04(a)(2)(III)(c).
“including the one or more input elements in the updated zero-padding pattern.” Under its broadest reasonable interpretation in light of the specification, this limitation encompasses the mental process of evaluating and observing data, which is an evaluation or observation that is practically capable of being performed in the human mind with the assistance of pen and paper. A human is able to evaluate a value and apply judgement as to the location of the values. The limitation is merely applying an abstract idea on generic computer system. See MPEP 2106.04(a)(2)(III)(c).
Step 2A Prong 2 – Does the claim recite additional elements that integrate the judicial exception into a practical application?
This claim does not recite any additional limitations which integrate the abstract idea into a practical application.
Step 2B – Does the claim recite additional elements that amount to significantly more than the judicial exception?
Finally, the claim taken as a whole does not contain an inventive concept which provides significantly more than the abstract idea and thus the claim is subject-matter ineligible.
Claim 8
Step 1 – Is the claim to a process, machine, manufacture or composition of matter?
A process, as above.
Step 2A Prong 1 – Does the claim recite an abstract idea, law of nature, or natural phenomenon?
The claim recites, inter alia:
“determining a kernel element positioned at a row corresponding to a row number and a column corresponding to a column number satisfies a condition of that the column number is no greater than a floor of a half of a height of the kernel or no less than a ceiling of a half of a height of the kernel;” Under its broadest reasonable interpretation in light of the specification, this limitation encompasses the mental process of evaluating and observing data, which is an evaluation or observation that is practically capable of being performed in the human mind with the assistance of pen and paper. A human is able to evaluate a value and determine if it is within given metrics. The limitation is merely applying an abstract idea on generic computer system. See MPEP 2106.04(a)(2)(III)(c).
“identifying one or more input elements next to the output row edge; and” Under its broadest reasonable interpretation in light of the specification, this limitation encompasses the mental process of evaluating and observing data, which is an evaluation or observation that is practically capable of being performed in the human mind with the assistance of pen and paper. A human is able to evaluate data and determine locations of data. The limitation is merely applying an abstract idea on generic computer system. See MPEP 2106.04(a)(2)(III)(c).
“including the one or more input elements in the updated zero-padding pattern.” Under its broadest reasonable interpretation in light of the specification, this limitation encompasses the mental process of evaluating and observing data, which is an evaluation or observation that is practically capable of being performed in the human mind with the assistance of pen and paper. A human can update an equation with given values. The limitation is merely applying an abstract idea on generic computer system. See MPEP 2106.04(a)(2)(III)(c).
Step 2A Prong 2 – Does the claim recite additional elements that integrate the judicial exception into a practical application?
The claim recites the additional elements, “wherein generating the updated zero-padding pattern comprises: responsive to determining that the output row is in a middle position, for each compute cycle,” amounts to generic computer components used as a tool to perform an existing process. Thus, the additional element amounts to no more than a recitation of the words "apply it" (or an equivalent) or are more than mere instructions to implement an abstract idea or other exception on a computer (see MPEP § 2106.05(f)).
Step 2B – Does the claim recite additional elements that amount to significantly more than the judicial exception?
Finally, the claim taken as a whole does not contain an inventive concept which provides significantly more than the abstract idea. The additional elements, “wherein generating the updated zero-padding pattern comprises: responsive to determining that the output row is in a middle position, for each compute cycle,” amounts to generic computer components used as a tool to perform an existing process. Thus, the additional element amounts to no more than a recitation of the words "apply it" (or an equivalent) or are more than mere instructions to implement an abstract idea or other exception on a computer (see MPEP § 2106.05(f)).
Taken alone or in combination, the additional elements of the claim do not provide an inventive concept and thus the claim is subject-matter ineligible.
Claim 9
Step 1 – Is the claim to a process, machine, manufacture or composition of matter?
A process, as above.
Step 2A Prong 1 – Does the claim recite an abstract idea, law of nature, or natural phenomenon?
The claim recites the abstract ideas of the preceding claims from which it depends.
Step 2A Prong 2 – Does the claim recite additional elements that integrate the judicial exception into a practical application?
The claim recites the additional elements, “wherein each value in the initial set of values corresponds to a compute circuit configured to perform computation associated with the convolution, and performing computations associated with convolution comprises:” amounts to generic computer components used as a tool to perform an existing process. Thus, the additional element amounts to no more than a recitation of the words "apply it" (or an equivalent) or are more than mere instructions to implement an abstract idea or other exception on a computer (see MPEP § 2106.05(f)).
“keeping a result of a compute circuit corresponding to an active value in the initial set of values; and” amounts to generic computer components used as a tool to perform an existing process. Thus, the additional element amounts to no more than a recitation of the words "apply it" (or an equivalent) or are more than mere instructions to implement an abstract idea or other exception on a computer (see MPEP § 2106.05(f)).
“ignoring a result of a compute circuit corresponding to an inactive value in the initial set of values.” amounts to generic computer components used as a tool to perform an existing process. Thus, the additional element amounts to no more than a recitation of the words "apply it" (or an equivalent) or are more than mere instructions to implement an abstract idea or other exception on a computer (see MPEP § 2106.05(f)).
Step 2B – Does the claim recite additional elements that amount to significantly more than the judicial exception?
Finally, the claim taken as a whole does not contain an inventive concept which provides significantly more than the abstract idea. The additional elements, “wherein each value in the initial set of values corresponds to a compute circuit configured to perform computation associated with the convolution, and performing computations associated with convolution comprises:” amounts to generic computer components used as a tool to perform an existing process. Thus, the additional element amounts to no more than a recitation of the words "apply it" (or an equivalent) or are more than mere instructions to implement an abstract idea or other exception on a computer (see MPEP § 2106.05(f)).
“keeping a result of a compute circuit corresponding to an active value in the initial set of values; and” amounts to generic computer components used as a tool to perform an existing process. Thus, the additional element amounts to no more than a recitation of the words "apply it" (or an equivalent) or are more than mere instructions to implement an abstract idea or other exception on a computer (see MPEP § 2106.05(f)).
“ignoring a result of a compute circuit corresponding to an inactive value in the initial set of values.” amounts to generic computer components used as a tool to perform an existing process. Thus, the additional element amounts to no more than a recitation of the words "apply it" (or an equivalent) or are more than mere instructions to implement an abstract idea or other exception on a computer (see MPEP § 2106.05(f)).
Taken alone or in combination, the additional elements of the claim do not provide an inventive concept and thus the claim is subject-matter ineligible.
Claim 10
Step 1 – Is the claim to a process, machine, manufacture or composition of matter?
Claim 10 recites, “A non-transitory storage medium storing instruction thereon, the instructions when executed by a neural processor cause causing the neural processor to:” therefore it is directed to the statutory category of a machine.
Step 2A Prong 1 – Does the claim recite an abstract idea, law of nature, or natural phenomenon?
The claim recites, inter alia:
“divide, by a rasterizer of the neural processor, the input tensor into a plurality of partitions;” Under its broadest reasonable interpretation in light of the specification, this limitation encompasses the mental process of evaluating and observing data, which is an evaluation or observation that is practically capable of being performed in the human mind with the assistance of pen and paper. A human is able to use a generic computer to divide an image from left to right and top to bottom. The limitation is merely applying an abstract idea on generic computer system. See MPEP 2106.04(a)(2)(III)(c).
“for each row of a kernel for performing convolution on the input tensor:” Under its broadest reasonable interpretation in light of the specification, this limitation encompasses mathematical concept of utilizing a mathematical formula to perform calculations. A human is able to perform the computations using known functions to perform functions such as matrix multiplication. This claim discloses a math operation and therefore is ineligible.
“for a compute cycle in the row of the kernel perform computations associated with the convolution based in part on the zero-padding pattern,” Under its broadest reasonable interpretation in light of the specification, this limitation encompasses mathematical concept of utilizing a mathematical formula to perform calculations. A human is able to perform the computations using known functions to perform functions such as matrix multiplication. This claim discloses a math operation and therefore is ineligible.
“perform an XOR operation on the set of edge values and the shifted set of values, and” Under its broadest reasonable interpretation in light of the specification, this limitation encompasses mathematical concept of utilizing a mathematical formula to perform calculations. A human is able to perform the computations using known functions to perform functions such as binary or bitwise operations. This claim discloses a math operation and therefore is ineligible.
Step 2A Prong 2 – Does the claim recite additional elements that integrate the judicial exception into a practical application?
The claim recites the additional elements, “access, from an external memory by the neural processor, an input tensor;” is an insignificant extra-solution activity required for any uses of the mental processes (see MPEP § 2106.05(g)) As such, the claim is ineligible.
“store a partition of the plurality of partitions in an internal buffer of the neural processor;” is an insignificant extra-solution activity required for any uses of the mental processes (see MPEP § 2106.05(g)) As such, the claim is ineligible.
“generate a set of edge values based on a location of the partition in the internal buffer,” amounts to generic computer components used as a tool to perform an existing process. Thus, the additional element amounts to no more than a recitation of the words "apply it" (or an equivalent) or are more than mere instructions to implement an abstract idea or other exception on a computer (see MPEP § 2106.05(f)).
“wherein the set of edge values indicates an output row edge for the partition;” amounts to generic computer components used as a tool to perform an existing process. Thus, the additional element amounts to no more than a recitation of the words "apply it" (or an equivalent) or are more than mere instructions to implement an abstract idea or other exception on a computer (see MPEP § 2106.05(f)).
“populate an edge register with the set of edge values;” amounts to generic computer components used as a tool to perform an existing process. Thus, the additional element amounts to no more than a recitation of the words "apply it" (or an equivalent) or are more than mere instructions to implement an abstract idea or other exception on a computer (see MPEP § 2106.05(f)).
“populate a padded register with an initial set of values indicating a zero-padding pattern based on a size of the kernel;” amounts to generic computer components used as a tool to perform an existing process. Thus, the additional element amounts to no more than a recitation of the words "apply it" (or an equivalent) or are more than mere instructions to implement an abstract idea or other exception on a computer (see MPEP § 2106.05(f)).
“instead of padding around the input tensor, generate an updated zero-padding pattern representing a zero-padding pattern for a next cycle in the row of the kernel by:” amounts to generic computer components used as a tool to perform an existing process. Thus, the additional element amounts to no more than a recitation of the words "apply it" (or an equivalent) or are more than mere instructions to implement an abstract idea or other exception on a computer (see MPEP § 2106.05(f)).
“generate a shifted set of values based on shifting the initial set of values in the padded register; and” amounts to generic computer components used as a tool to perform an existing process. Thus, the additional element amounts to no more than a recitation of the words "apply it" (or an equivalent) or are more than mere instructions to implement an abstract idea or other exception on a computer (see MPEP § 2106.05(f)).
“update the initial set of values in the padded register with the updated zero- padding pattern.” amounts to generic computer components used as a tool to perform an existing process. Thus, the additional element amounts to no more than a recitation of the words "apply it" (or an equivalent) or are more than mere instructions to implement an abstract idea or other exception on a computer (see MPEP § 2106.05(f)).
Step 2B – Does the claim recite additional elements that amount to significantly more than the judicial exception?
Finally, the claim taken as a whole does not contain an inventive concept which provides significantly more than the abstract idea. The additional elements, “access, from an external memory by the neural processor, an input tensor;” is an insignificant extra-solution activity required for any uses of abstract ideas (see MPEP § 2106.05(g)), and is a well-understood, routine, conventional activity (see MPEP § 2106.05(d)(iv); “Storing and retrieving information in memory”.
“store a partition of the plurality of partitions in an internal buffer of the neural processor;” is an insignificant extra-solution activity required for any uses of abstract ideas (see MPEP § 2106.05(g)), and is a well-understood, routine, conventional activity (see MPEP § 2106.05(d)(iv); “Storing and retrieving information in memory”.
“generate a set of edge values based on a location of the partition in the internal buffer,” amounts to generic computer components used as a tool to perform an existing process. Thus, the additional element amounts to no more than a recitation of the words "apply it" (or an equivalent) or are more than mere instructions to implement an abstract idea or other exception on a computer (see MPEP § 2106.05(f)).
“wherein the set of edge values indicates an output row edge for the partition;” amounts to generic computer components used as a tool to perform an existing process. Thus, the additional element amounts to no more than a recitation of the words "apply it" (or an equivalent) or are more than mere instructions to implement an abstract idea or other exception on a computer (see MPEP § 2106.05(f)).
“populate an edge register with the set of edge values;” amounts to generic computer components used as a tool to perform an existing process. Thus, the additional element amounts to no more than a recitation of the words "apply it" (or an equivalent) or are more than mere instructions to implement an abstract idea or other exception on a computer (see MPEP § 2106.05(f)).
“populate a padded register with an initial set of values indicating a zero-padding pattern based on a size of the kernel;” amounts to generic computer components used as a tool to perform an existing process. Thus, the additional element amounts to no more than a recitation of the words "apply it" (or an equivalent) or are more than mere instructions to implement an abstract idea or other exception on a computer (see MPEP § 2106.05(f)).
“instead of padding around the input tensor, generate an updated zero-padding pattern representing a zero-padding pattern for a next cycle in the row of the kernel by:” amounts to generic computer components used as a tool to perform an existing process. Thus, the additional element amounts to no more than a recitation of the words "apply it" (or an equivalent) or are more than mere instructions to implement an abstract idea or other exception on a computer (see MPEP § 2106.05(f)).
“generate a shifted set of values based on shifting the initial set of values in the padded register; and” amounts to generic computer components used as a tool to perform an existing process. Thus, the additional element amounts to no more than a recitation of the words "apply it" (or an equivalent) or are more than mere instructions to implement an abstract idea or other exception on a computer (see MPEP § 2106.05(f)).
“update the initial set of values in the padded register with the updated zero- padding pattern.” amounts to generic computer components used as a tool to perform an existing process. Thus, the additional element amounts to no more than a recitation of the words "apply it" (or an equivalent) or are more than mere instructions to implement an abstract idea or other exception on a computer (see MPEP § 2106.05(f)).
Taken alone or in combination, the additional elements of the claim do not provide an inventive concept and thus the claim is subject-matter ineligible.
Claim 11
Step 1 – Is the claim to a process, machine, manufacture or composition of matter?
A machine, as above.
Step 2A Prong 1 – Does the claim recite an abstract idea, law of nature, or natural phenomenon?
The claim recites the abstract ideas of the preceding claims from which it depends.
Step 2A Prong 2 – Does the claim recite additional elements that integrate the judicial exception into a practical application?
The claim recites the additional elements, “wherein generating the updated zero-padding pattern is based in part on out-of-bound input elements or a position of the output row edge.” amounts to generic computer components used as a tool to perform an existing process. Thus, the additional element amounts to no more than a recitation of the words "apply it" (or an equivalent) or are more than mere instructions to implement an abstract idea or other exception on a computer (see MPEP § 2106.05(f)).
Step 2B – Does the claim recite additional elements that amount to significantly more than the judicial exception?
Finally, the claim taken as a whole does not contain an inventive concept which provides significantly more than the abstract idea. The additional elements, “wherein generating the updated zero-padding pattern is based in part on out-of-bound input elements or a position of the output row edge.” amounts to generic computer components used as a tool to perform an existing process. Thus, the additional element amounts to no more than a recitation of the words "apply it" (or an equivalent) or are more than mere instructions to implement an abstract idea or other exception on a computer (see MPEP § 2106.05(f)).
Taken alone or in combination, the additional elements of the claim do not provide an inventive concept and thus the claim is subject-matter ineligible.
Claim 12
Step 1 – Is the claim to a process, machine, manufacture or composition of matter?
A machine, as above.
Step 2A Prong 1 – Does the claim recite an abstract idea, law of nature, or natural phenomenon?
The claim recites the abstract ideas of the preceding claims from which it depends.
Step 2A Prong 2 – Does the claim recite additional elements that integrate the judicial exception into a practical application?
The claim recites the additional elements, “wherein the set of edge values indicates the position of the output row edge.” amounts to generic computer components used as a tool to perform an existing process. Thus, the additional element amounts to no more than a recitation of the words "apply it" (or an equivalent) or are more than mere instructions to implement an abstract idea or other exception on a computer (see MPEP § 2106.05(f)).
Step 2B – Does the claim recite additional elements that amount to significantly more than the judicial exception?
Finally, the claim taken as a whole does not contain an inventive concept which provides significantly more than the abstract idea. The additional elements, “wherein the set of edge values indicates the position of the output row edge.” amounts to generic computer components used as a tool to perform an existing process. Thus, the additional element amounts to no more than a recitation of the words "apply it" (or an equivalent) or are more than mere instructions to implement an abstract idea or other exception on a computer (see MPEP § 2106.05(f)).
Taken alone or in combination, the additional elements of the claim do not provide an inventive concept and thus the claim is subject-matter ineligible.
Claim 13
Step 1 – Is the claim to a process, machine, manufacture or composition of matter?
A machine, as above.
Step 2A Prong 1 – Does the claim recite an abstract idea, law of nature, or natural phenomenon?
The claim recites, inter alia:
“performing an XOR operation between the shifted set of updated values, and the set of edge values.” Under its broadest reasonable interpretation in light of the specification, this limitation encompasses mathematical concept of utilizing a mathematical formula to perform calculations. A human is able to perform the computations using known functions to perform functions such as binary or bitwise operations. This claim discloses a math operation and therefore is ineligible.
Step 2A Prong 2 – Does the claim recite additional elements that integrate the judicial exception into a practical application?
The claim recites the additional elements, “wherein the updated zero-padding pattern is a first updated zero-padding pattern, and wherein generating the updated zero-padding pattern representing the zero-padding pattern for the next cycle comprises:” amounts to generic computer components used as a tool to perform an existing process. Thus, the additional element amounts to no more than a recitation of the words "apply it" (or an equivalent) or are more than mere instructions to implement an abstract idea or other exception on a computer (see MPEP § 2106.05(f)).
“generating a shifted set of updated values based on shifting the first updated zero-padding pattern in the padded register; and” amounts to generic computer components used as a tool to perform an existing process. Thus, the additional element amounts to no more than a recitation of the words "apply it" (or an equivalent) or are more than mere instructions to implement an abstract idea or other exception on a computer (see MPEP § 2106.05(f)).
Step 2B – Does the claim recite additional elements that amount to significantly more than the judicial exception?
Finally, the claim taken as a whole does not contain an inventive concept which provides significantly more than the abstract idea. The additional elements, “wherein the updated zero-padding pattern is a first updated zero-padding pattern, and wherein generating the updated zero-padding pattern representing the zero-padding pattern for the next cycle comprises:” amounts to generic computer components used as a tool to perform an existing process. Thus, the additional element amounts to no more than a recitation of the words "apply it" (or an equivalent) or are more than mere instructions to implement an abstract idea or other exception on a computer (see MPEP § 2106.05(f)).
“generating a shifted set of updated values based on shifting the first updated zero-padding pattern in the padded register; and” amounts to generic computer components used as a tool to perform an existing process. Thus, the additional element amounts to no more than a recitation of the words "apply it" (or an equivalent) or are more than mere instructions to implement an abstract idea or other exception on a computer (see MPEP § 2106.05(f)).
Taken alone or in combination, the additional elements of the claim do not provide an inventive concept and thus the claim is subject-matter ineligible.
Claim 14
Step 1 – Is the claim to a process, machine, manufacture or composition of matter?
A machine, as above.
Step 2A Prong 1 – Does the claim recite an abstract idea, law of nature, or natural phenomenon?
The claim recites, inter alia:
“wherein generating the updated zero-padding pattern comprises: determining that a kernel row or column is out of bound;” Under its broadest reasonable interpretation in light of the specification, this limitation encompasses the mental process of evaluating and observing data, which is an evaluation or observation that is practically capable of being performed in the human mind with the assistance of pen and paper. A human is able to evaluate data and observe if values are out of bounds. The limitation is merely applying an abstract idea on generic computer system. See MPEP 2106.04(a)(2)(III)(c).
“identifying the out-of-bound input elements based on the out-of-bound kernel row or column; and” Under its broadest reasonable interpretation in light of the specification, this limitation encompasses the mental process of evaluating and observing data, which is an evaluation or observation that is practically capable of being performed in the human mind with the assistance of pen and paper. A human is able to evaluate data and observe if values are out of bounds. The limitation is merely applying an abstract idea on generic computer system. See MPEP 2106.04(a)(2)(III)(c).
Step 2A Prong 2 – Does the claim recite additional elements that integrate the judicial exception into a practical application?
The claim recites the additional elements, “including the out-of-bound input elements in the updated zero-padding pattern.” amounts to generic computer components used as a tool to perform an existing process. Thus, the additional element amounts to no more than a recitation of the words "apply it" (or an equivalent) or are more than mere instructions to implement an abstract idea or other exception on a computer (see MPEP § 2106.05(f)).
Step 2B – Does the claim recite additional elements that amount to significantly more than the judicial exception?
Finally, the claim taken as a whole does not contain an inventive concept which provides significantly more than the abstract idea. The additional elements, “including the out-of-bound input elements in the updated zero-padding pattern.” amounts to generic computer components used as a tool to perform an existing process. Thus, the additional element amounts to no more than a recitation of the words "apply it" (or an equivalent) or are more than mere instructions to implement an abstract idea or other exception on a computer (see MPEP § 2106.05(f)).
Taken alone or in combination, the additional elements of the claim do not provide an inventive concept and thus the claim is subject-matter ineligible.
Claim 15
Step 1 – Is the claim to a process, machine, manufacture or composition of matter?
Claim 10 recites, “A neural processor circuit, comprising: a data processor circuit having a buffer memory storing an input tensor; and a plurality of neural engines; wherein the data processor circuit is configured to perform operations comprising:” therefore it is directed to the statutory category of a machine.
Step 2A Prong 1 – Does the claim recite an abstract idea, law of nature, or natural phenomenon?
The claim recites, inter alia:
“dividing, by a rasterizer of the neural processor, the input tensor into a plurality of partitions;” Under its broadest reasonable interpretation in light of the specification, this limitation encompasses the mental process of evaluating and observing data, which is an evaluation or observation that is practically capable of being performed in the human mind with the assistance of pen and paper. A human is able to use a generic computer to divide an image from left to right and top to bottom. The limitation is merely applying an abstract idea on generic computer system. See MPEP 2106.04(a)(2)(III)(c).
“for each row of a kernel for performing convolution on the input tensor:” Under its broadest reasonable interpretation in light of the specification, this limitation encompasses mathematical concept of utilizing a mathematical formula to perform calculations. A human is able to perform the computations using known functions to perform functions such as matrix multiplication. This claim discloses a math operation and therefore is ineligible.
“for a compute cycle in the row of the kernel: performing computations associated with the convolution based in part on the zero-padding pattern,” Under its broadest reasonable interpretation in light of the specification, this limitation encompasses mathematical concept of utilizing a mathematical formula to perform calculations. A human is able to perform the computations using known functions to perform functions such as matrix multiplication. This claim discloses a math operation and therefore is ineligible.
“performing an XOR operation on the set of edge values and the shifted set of values, and” Under its broadest reasonable interpretation in light of the specification, this limitation encompasses mathematical concept of utilizing a mathematical formula to perform calculations. A human is able to perform the computations using known functions to perform functions such as binary or bitwise operations. This claim discloses a math operation and therefore is ineligible.
Step 2A Prong 2 – Does the claim recite additional elements that integrate the judicial exception into a practical application?
The claim recites the additional elements, “accessing, from the buffer memory, the input tensor;” is an insignificant extra-solution activity required for any uses of the mental processes (see MPEP § 2106.05(g)) As such, the claim is ineligible.
“storing a partition of the plurality of partitions in an internal buffer of the neural processor;” is an insignificant extra-solution activity required for any uses of the mental processes (see MPEP § 2106.05(g)) As such, the claim is ineligible.
“generating a set of edge values based on a location of the partition in the internal buffer,” amounts to generic computer components used as a tool to perform an existing process. Thus, the additional element amounts to no more than a recitation of the words "apply it" (or an equivalent) or are more than mere instructions to implement an abstract idea or other exception on a computer (see MPEP § 2106.05(f)).
“wherein the set of edge values indicate an output row edge for the partition;” amounts to generic computer components used as a tool to perform an existing process. Thus, the additional element amounts to no more than a recitation of the words "apply it" (or an equivalent) or are more than mere instructions to implement an abstract idea or other exception on a computer (see MPEP § 2106.05(f)).
“populating an edge register with the set of edge values;” amounts to generic computer components used as a tool to perform an existing process. Thus, the additional element amounts to no more than a recitation of the words "apply it" (or an equivalent) or are more than mere instructions to implement an abstract idea or other exception on a computer (see MPEP § 2106.05(f)).
“populating a padded register with an initial set of values indicating a zero- padding pattern based on a size of the kernel;” amounts to generic computer components used as a tool to perform an existing process. Thus, the additional element amounts to no more than a recitation of the words "apply it" (or an equivalent) or are more than mere instructions to implement an abstract idea or other exception on a computer (see MPEP § 2106.05(f)).
“instead of padding around the input tensor, generating an updated zero-padding pattern representing a zero-padding pattern for a next cycle in the row of the kernel by:” amounts to generic computer components used as a tool to perform an existing process. Thus, the additional element amounts to no more than a recitation of the words "apply it" (or an equivalent) or are more than mere instructions to implement an abstract idea or other exception on a computer (see MPEP § 2106.05(f)).
“generating a shifted set of values based on shifting the initial set of values in the padded register; and” amounts to generic computer components used as a tool to perform an existing process. Thus, the additional element amounts to no more than a recitation of the words "apply it" (or an equivalent) or are more than mere instructions to implement an abstract idea or other exception on a computer (see MPEP § 2106.05(f)).
“updating the initial set of values in the padded register with the updated zero-padding pattern.” amounts to generic computer components used as a tool to perform an existing process. Thus, the additional element amounts to no more than a recitation of the words "apply it" (or an equivalent) or are more than mere instructions to implement an abstract idea or other exception on a computer (see MPEP § 2106.05(f)).
Step 2B – Does the claim recite additional elements that amount to significantly more than the judicial exception?
Finally, the claim taken as a whole does not contain an inventive concept which provides significantly more than the abstract idea. The additional elements, “accessing, from the buffer memory, the input tensor;” is an insignificant extra-solution activity required for any uses of abstract ideas (see MPEP § 2106.05(g)), and is a well-understood, routine, conventional activity (see MPEP § 2106.05(d)(iv); “Storing and retrieving information in memory”.
“storing a partition of the plurality of partitions in an internal buffer of the neural processor;” is an insignificant extra-solution activity required for any uses of abstract ideas (see MPEP § 2106.05(g)), and is a well-understood, routine, conventional activity (see MPEP § 2106.05(d)(iv); “Storing and retrieving information in memory”.
“generating a set of edge values based on a location of the partition in the internal buffer,” amounts to generic computer components used as a tool to perform an existing process. Thus, the additional element amounts to no more than a recitation of the words "apply it" (or an equivalent) or are more than mere instructions to implement an abstract idea or other exception on a computer (see MPEP § 2106.05(f)).
“wherein the set of edge values indicate an output row edge for the partition;” amounts to generic computer components used as a tool to perform an existing process. Thus, the additional element amounts to no more than a recitation of the words "apply it" (or an equivalent) or are more than mere instructions to implement an abstract idea or other exception on a computer (see MPEP § 2106.05(f)).
“populating an edge register with the set of edge values;” amounts to generic computer components used as a tool to perform an existing process. Thus, the additional element amounts to no more than a recitation of the words "apply it" (or an equivalent) or are more than mere instructions to implement an abstract idea or other exception on a computer (see MPEP § 2106.05(f)).
“populating a padded register with an initial set of values indicating a zero- padding pattern based on a size of the kernel;” amounts to generic computer components used as a tool to perform an existing process. Thus, the additional element amounts to no more than a recitation of the words "apply it" (or an equivalent) or are more than mere instructions to implement an abstract idea or other exception on a computer (see MPEP § 2106.05(f)).
“instead of padding around the input tensor, generating an updated zero-padding pattern representing a zero-padding pattern for a next cycle in the row of the kernel by:” amounts to generic computer components used as a tool to perform an existing process. Thus, the additional element amounts to no more than a recitation of the words "apply it" (or an equivalent) or are more than mere instructions to implement an abstract idea or other exception on a computer (see MPEP § 2106.05(f)).
“generating a shifted set of values based on shifting the initial set of values in the padded register; and” amounts to generic computer components used as a tool to perform an existing process. Thus, the additional element amounts to no more than a recitation of the words "apply it" (or an equivalent) or are more than mere instructions to implement an abstract idea or other exception on a computer (see MPEP § 2106.05(f)).
“updating the initial set of values in the padded register with the updated zero-padding pattern.” amounts to generic computer components used as a tool to perform an existing process. Thus, the additional element amounts to no more than a recitation of the words "apply it" (or an equivalent) or are more than mere instructions to implement an abstract idea or other exception on a computer (see MPEP § 2106.05(f)).
Taken alone or in combination, the additional elements of the claim do not provide an inventive concept and thus the claim is subject-matter ineligible.
Claim 16
Step 1 – Is the claim to a process, machine, manufacture or composition of matter?
A machine, as above.
Step 2A Prong 1 – Does the claim recite an abstract idea, law of nature, or natural phenomenon?
The claim recites the abstract ideas of the preceding claims from which it depends.
Step 2A Prong 2 – Does the claim recite additional elements that integrate the judicial exception into a practical application?
The claim recites the additional elements, “wherein generating the updated zero-padding pattern is based in part on out-of-bound input elements or a position of the output row edge.” amounts to generic computer components used as a tool to perform an existing process. Thus, the additional element amounts to no more than a recitation of the words "apply it" (or an equivalent) or are more than mere instructions to implement an abstract idea or other exception on a computer (see MPEP § 2106.05(f)).
Step 2B – Does the claim recite additional elements that amount to significantly more than the judicial exception?
Finally, the claim taken as a whole does not contain an inventive concept which provides significantly more than the abstract idea. The additional elements, “wherein generating the updated zero-padding pattern is based in part on out-of-bound input elements or a position of the output row edge.” amounts to generic computer components used as a tool to perform an existing process. Thus, the additional element amounts to no more than a recitation of the words "apply it" (or an equivalent) or are more than mere instructions to implement an abstract idea or other exception on a computer (see MPEP § 2106.05(f)).
Taken alone or in combination, the additional elements of the claim do not provide an inventive concept and thus the claim is subject-matter ineligible.
Claim 17
Step 1 – Is the claim to a process, machine, manufacture or composition of matter?
A machine, as above.
Step 2A Prong 1 – Does the claim recite an abstract idea, law of nature, or natural phenomenon?
The claim recites the abstract ideas of the preceding claims from which it depends.
Step 2A Prong 2 – Does the claim recite additional elements that integrate the judicial exception into a practical application?
The claim recites the additional elements, “wherein the set of edge values indicate the position of the output row edge.” amounts to generic computer components used as a tool to perform an existing process. Thus, the additional element amounts to no more than a recitation of the words "apply it" (or an equivalent) or are more than mere instructions to implement an abstract idea or other exception on a computer (see MPEP § 2106.05(f)).
Step 2B – Does the claim recite additional elements that amount to significantly more than the judicial exception?
Finally, the claim taken as a whole does not contain an inventive concept which provides significantly more than the abstract idea. The additional elements, “wherein the set of edge values indicate the position of the output row edge.” amounts to generic computer components used as a tool to perform an existing process. Thus, the additional element amounts to no more than a recitation of the words "apply it" (or an equivalent) or are more than mere instructions to implement an abstract idea or other exception on a computer (see MPEP § 2106.05(f)).
Taken alone or in combination, the additional elements of the claim do not provide an inventive concept and thus the claim is subject-matter ineligible.
Claim 18
Step 1 – Is the claim to a process, machine, manufacture or composition of matter?
A machine, as above.
Step 2A Prong 1 – Does the claim recite an abstract idea, law of nature, or natural phenomenon?
The claim recites, inter alia:
“performing an XOR operation between the shifted set of updated values and the set of edge values.” Under its broadest reasonable interpretation in light of the specification, this limitation encompasses mathematical concept of utilizing a mathematical formula to perform calculations. A human is able to perform the computations using known functions to perform functions such as binary or bitwise operations. This claim discloses a math operation and therefore is ineligible.
Step 2A Prong 2 – Does the claim recite additional elements that integrate the judicial exception into a practical application?
The claim recites the additional elements, “wherein the updated zero- padding pattern is a first updated zero-padding pattern, and wherein generating the updated zero- padding pattern representing a zero-padding pattern for the next cycle comprises:” amounts to generic computer components used as a tool to perform an existing process. Thus, the additional element amounts to no more than a recitation of the words "apply it" (or an equivalent) or are more than mere instructions to implement an abstract idea or other exception on a computer (see MPEP § 2106.05(f)).
“generating a shifted set of updated values based on shifting the first updated zero-padding pattern in the padded register; and” amounts to generic computer components used as a tool to perform an existing process. Thus, the additional element amounts to no more than a recitation of the words "apply it" (or an equivalent) or are more than mere instructions to implement an abstract idea or other exception on a computer (see MPEP § 2106.05(f)).
Step 2B – Does the claim recite additional elements that amount to significantly more than the judicial exception?
Finally, the claim taken as a whole does not contain an inventive concept which provides significantly more than the abstract idea. The additional elements, “wherein the updated zero- padding pattern is a first updated zero-padding pattern, and wherein generating the updated zero- padding pattern representing a zero-padding pattern for the next cycle comprises:” amounts to generic computer components used as a tool to perform an existing process. Thus, the additional element amounts to no more than a recitation of the words "apply it" (or an equivalent) or are more than mere instructions to implement an abstract idea or other exception on a computer (see MPEP § 2106.05(f)).
“generating a shifted set of updated values based on shifting the first updated zero-padding pattern in the padded register; and” amounts to generic computer components used as a tool to perform an existing process. Thus, the additional element amounts to no more than a recitation of the words "apply it" (or an equivalent) or are more than mere instructions to implement an abstract idea or other exception on a computer (see MPEP § 2106.05(f)).
Taken alone or in combination, the additional elements of the claim do not provide an inventive concept and thus the claim is subject-matter ineligible.
Claim 19
Step 1 – Is the claim to a process, machine, manufacture or composition of matter?
A machine, as above.
Step 2A Prong 1 – Does the claim recite an abstract idea, law of nature, or natural phenomenon?
The claim recites, inter alia:
“wherein generating the updated zero-padding pattern comprises: determining that a kernel row or column is out of bound;” Under its broadest reasonable interpretation in light of the specification, this limitation encompasses the mental process of evaluating and observing data, which is an evaluation or observation that is practically capable of being performed in the human mind with the assistance of pen and paper. A human is able to evaluate data and observe if values are out of bounds. The limitation is merely applying an abstract idea on generic computer system. See MPEP 2106.04(a)(2)(III)(c).
“identifying the out-of-bound input elements based on the out-of-bound kernel row or column; and” Under its broadest reasonable interpretation in light of the specification, this limitation encompasses the mental process of evaluating and observing data, which is an evaluation or observation that is practically capable of being performed in the human mind with the assistance of pen and paper. A human is able to evaluate data and observe if values are out of bounds. The limitation is merely applying an abstract idea on generic computer system. See MPEP 2106.04(a)(2)(III)(c).
Step 2A Prong 2 – Does the claim recite additional elements that integrate the judicial exception into a practical application?
The claim recites the additional elements, “including the out-of-bound input elements in the updated zero-padding pattern.” amounts to generic computer components used as a tool to perform an existing process. Thus, the additional element amounts to no more than a recitation of the words "apply it" (or an equivalent) or are more than mere instructions to implement an abstract idea or other exception on a computer (see MPEP § 2106.05(f)).
Step 2B – Does the claim recite additional elements that amount to significantly more than the judicial exception?
Finally, the claim taken as a whole does not contain an inventive concept which provides significantly more than the abstract idea. The additional elements, “including the out-of-bound input elements in the updated zero-padding pattern.” amounts to generic computer components used as a tool to perform an existing process. Thus, the additional element amounts to no more than a recitation of the words "apply it" (or an equivalent) or are more than mere instructions to implement an abstract idea or other exception on a computer (see MPEP § 2106.05(f)).
Taken alone or in combination, the additional elements of the claim do not provide an inventive concept and thus the claim is subject-matter ineligible.
Claim 20
Step 1 – Is the claim to a process, machine, manufacture or composition of matter?
A machine, as above.
Step 2A Prong 1 – Does the claim recite an abstract idea, law of nature, or natural phenomenon?
The claim recites the abstract ideas of the preceding claims from which it depends.
Step 2A Prong 2 – Does the claim recite additional elements that integrate the judicial exception into a practical application?
The claim recites the additional elements, “comprising a plurality of compute circuits configured to perform computation associated with the convolution, wherein each value in the initial set of values corresponds to one of the plurality of compute circuits, and performing computations associated with convolution comprises:” amounts to generic computer components used as a tool to perform an existing process. Thus, the additional element amounts to no more than a recitation of the words "apply it" (or an equivalent) or are more than mere instructions to implement an abstract idea or other exception on a computer (see MPEP § 2106.05(f)).
“keeping a result of a compute circuit corresponding to an active value in the initial set of values; and” amounts to generic computer components used as a tool to perform an existing process. Thus, the additional element amounts to no more than a recitation of the words "apply it" (or an equivalent) or are more than mere instructions to implement an abstract idea or other exception on a computer (see MPEP § 2106.05(f)).
“ignoring a result of a compute circuit corresponding to an inactive value in the initial set of values”. amounts to generic computer components used as a tool to perform an existing process. Thus, the additional element amounts to no more than a recitation of the words "apply it" (or an equivalent) or are more than mere instructions to implement an abstract idea or other exception on a computer (see MPEP § 2106.05(f)).
Step 2B – Does the claim recite additional elements that amount to significantly more than the judicial exception?
Finally, the claim taken as a whole does not contain an inventive concept which provides significantly more than the abstract idea. The additional elements, “comprising a plurality of compute circuits configured to perform computation associated with the convolution, wherein each value in the initial set of values corresponds to one of the plurality of compute circuits, and performing computations associated with convolution comprises:” amounts to generic computer components used as a tool to perform an existing process. Thus, the additional element amounts to no more than a recitation of the words "apply it" (or an equivalent) or are more than mere instructions to implement an abstract idea or other exception on a computer (see MPEP § 2106.05(f)).
“keeping a result of a compute circuit corresponding to an active value in the initial set of values; and” amounts to generic computer components used as a tool to perform an existing process. Thus, the additional element amounts to no more than a recitation of the words "apply it" (or an equivalent) or are more than mere instructions to implement an abstract idea or other exception on a computer (see MPEP § 2106.05(f)).
“ignoring a result of a compute circuit corresponding to an inactive value in the initial set of values”. amounts to generic computer components used as a tool to perform an existing process. Thus, the additional element amounts to no more than a recitation of the words "apply it" (or an equivalent) or are more than mere instructions to implement an abstract idea or other exception on a computer (see MPEP § 2106.05(f)).
Taken alone or in combination, the additional elements of the claim do not provide an inventive concept and thus the claim is subject-matter ineligible.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-5, and 9-20 are rejected under 35 U.S.C. 103 as being unpatentable over Young et al, (Young et al, “PERFORMING AVERAGE POOLING IN HARDWARE”, US 2018/0165577 A1, Mar. 23, 2017, hereinafter “Young”) in view of Liu et al, (Liu et al, “A Binary Convolutional Encoder-decoder Network for Real-time Natural Scene Text Processing”, Dec. 2016, hereinafter “Liu”) and Tang et al (Tang et al, “The Effects of Partitioning Strategies on Energy Consumption in Distributed CNN Inference at The Edge”, Oct. 2022, hereinafter ”Tang”).
Regarding claim 1, Tang discloses, “accessing, from an external memory by the neural processor, an input tensor;” (Energy Consumption Models, pp. 5; “For the different partitioning strategies, described in Section III-B, each partition will be mapped and executed on one edge device in the distributed system and the energy consumption per device can be very different depending on the partitioning strategy.” This article discloses different partitioning methods used on operatically constrained edge devices. This discloses that the edge devices themselves will perform the actions. These devices which are external to the devices that take in an input images and vectorize them into input tensors.)
“dividing, by a rasterizer of the neural processor, the input tensor into a plurality of partitions;” (Energy Model for Data Partitioning Strategy pp. 5; “For the data partitioning strategy, the weights of every CNN layer are not partitioned whereas the input data given to every CNN layer
l
i
is partitioned along the height
H
i
X
of the input tensor
X
i
[
H
i
Y
j
,
W
i
X
,
C
i
Y
]
into M partitions, …” This article discloses different partitioning strategies in an CNN. This discloses the input images is partitioned into multiple partitions from left to right and top to bottom.)
“storing a partition of the plurality of partitions in an internal buffer of the neural processor;” (Energy Model for Data Partitioning Strategy, pp. 5; “in such a way that the output tensor
Y
i
[
H
i
Y
j
,
W
i
Y
,
C
i
Y
]
from every partition j of the same layer
l
i
can be concatenated with the other output tensors of partitions into one whole piece of output tensor along height
H
i
Y
=
∑
j
=
1
M
H
i
Y
(
j
)
.” Each of the layers will partition their own layer and each layer will be stored and can be concatenated with the other output tensors of the layer. This teaches that each layer will store and accumulate each output tensors to concatenate all of the outputs.)
“generating a set of edge values based on a location of the partition in the internal buffer,” (CNN Computational model, pp. 3; “The layers input and output data is stored in multidimensional arrays, called tensors. In this paper, each input/output tensor T has the format
T
H
T
,
W
T
,
C
T
, where
H
T
is the tensor height,
W
T
is the tensor width,
C
T
is the number of channels. We define a layer as a tuple
l
i
=
(
X
i
,
Y
i
,
Θ
i
,
o
p
i
,
s
i
,
p
a
d
i
)
, where:
X
i
[
H
i
x
,
W
i
X
,
C
i
x
]
is the input data tensor of
l
i
;
Y
i
[
H
i
Y
,
W
i
Y
,
C
i
Y
]
is the output data tensor of
l
i
;
Θ
i
[
N
i
Θ
,
H
i
Θ
,
W
i
Θ
,
C
i
Θ
]
is the sliding window of
l
i
,
N
i
Θ
=
C
i
X
is the number of neurons in
l
i
, and
C
i
Θ
=
C
i
X
;
s
i
is the stride, with which
l
i
moves over
X
i
;
o
p
i
is the operator of
l
i
;
p
a
d
i
is the padding of
l
i
;” This article discloses common CNN methods of storing layers as tensors. This tensor will contain the size of the image, height and width, and the padding the layer requires. The padding is interpreted to extend one or many points outside of the original.)
“wherein the set of edge values indicates an output row edge for the partition;” (CNN Computational model, pp. 3; “The layers input and output data is stored in multidimensional arrays, called tensors. In this paper, each input/output tensor T has the format
T
H
T
,
W
T
,
C
T
, where
H
T
is the tensor height,
W
T
is the tensor width,
C
T
is the number of channels. We define a layer as a tuple
l
i
=
(
X
i
,
Y
i
,
Θ
i
,
o
p
i
,
s
i
,
p
a
d
i
)
, where:
X
i
[
H
i
x
,
W
i
X
,
C
i
x
]
is the input data tensor of
l
i
;
Y
i
[
H
i
Y
,
W
i
Y
,
C
i
Y
]
is the output data tensor of
l
i
;
Θ
i
[
N
i
Θ
,
H
i
Θ
,
W
i
Θ
,
C
i
Θ
]
is the sliding window of
l
i
,
N
i
Θ
=
C
i
X
is the number of neurons in
l
i
, and
C
i
Θ
=
C
i
X
;
s
i
is the stride, with which
l
i
moves over
X
i
;
o
p
i
is the operator of
l
i
;
p
a
d
i
is the padding of
l
i
;” This article discloses common CNN methods to store a layer of a model as a tensor. As stated above the layers may include padding as denoted by
p
a
d
i
. The number of neurons and strides are also stored in the tuple.)
“populating an edge register with the set of edge values;” (CNN computational model, pp. 3; “If input data
X
i
cannot be covered by sliding window
Θ
i
integer number of times, layer
l
i
crops or extends
X
i
with padding
p
a
d
i
[1] and processes cropped/extended input data
X
i
'
, which can be covered by sliding window
Θ
i
integer number of times.” This article discloses the ability to crop or resize an input image using padding. This would teach that the edges of the image can be populated with zeros or other edge values.)
Tang fails to explicitly disclose the remaining limitations of this claim. However, Young discloses, “A method for efficient zero-padding in convolution performed by a neural processor, the method comprising:” (Detailed Description, pp. 3, [0038]; "FIG. 2 is a flow diagram of an example process 200 for performing a computation for a given layer of a neural network using a special-purpose hardware circuit. For convenience, the method 200 will be described with respect to a system having one or more circuits that performs the method 200. The method 200 can be performed for each layer of the neural network in order to compute an inference from a received input." The proposed system in this application discloses a convolutional neural network. This CNN uses zero-padding in different layers of the network. This application discloses the methods used.)
“for each row of a kernel for performing convolution on the input tensor: populating a padded register with an initial set of values indicating a zero-padding pattern based on a size of the kernel;” (Detailed Description, pp. 6, [0067]; "For example, based on receiving the request to implement the neural network specifying a network input to the neural network and a window of the average pooling layer of the neural network, the system generates a pooling kernel, a zero-padded input tensor for processing the average pooling layer, a masking tensor for processing the average pooling layer, and an optional third tensor for processing the average pooling layer." This system will perform average pooling using a zero-padded input tensor. This system will user a kernel with the input tensor to calculate a window of the input tensor.)
“for a compute cycle in the row of the kernel: performing, by the neural processor, computations associated with the convolution based in part on the zero-padding pattern,” (Detailed Description, pp. 6, [0068]; "Each identity matrix is composed of values, e.g., ones and zeros, such that a convolution of the pooling kernel and a region of an input tensor will result in an element having a value equal to a sum of the elements within the region at a particular depth." The system will perform convolutional actions on each window of the input tensor. This will follow the standard CNN methods and steps to evaluate an entire input tensor. This will also use the zero-padded values where appropriate.)
“updating the initial set of values in the padded register with the updated zero- padding pattern.” (Detailed Description, pp. 8, [0085]; "In some implementations, performing the convolution of the input tensor and the pooling kernel involves performing a convolution of a zero-padded input tensor and the pooling kernel. For example, as discussed with respect to FIG. 6, a zero-padded version of an input tensor may be generated, and the zero-padded input tensor and the pooling kernel may be convolved to generate the summed output tensor. To perform the convolution, the zero-padded input tensor may be generated and stored at the unified buffer 308." While evaluating the input tensor the kernel will be updated with window of values. This window will slide across the image and at each step will populate the kernel with values. The values are summed and placed into memory. This will execute until the whole image has been evaluated.)
Tang and Young fail to explicitly disclose the remaining limitations of the claims. However, Liu discloses, “instead of padding around the input tensor, generating an updated zero- padding pattern representing a zero-padding pattern for a next cycle in the row of the kernel by:” (B-CEDNet architecture, pp. 2; “The decoder module is composed of 6 convolutional blocks (block-5 to -10). Block-5 to -8 are formed by one un-pooling layer, one BinConv layer, one BN layer and one Binrz layer. Note that there exists a symmetric structure along block-1 to -8. Thus the un-pooling layers Badrinarayanan et al. [2015] within block-5 to -8 simply assign the input pixels back to their original position according to the index generated by the corresponding max-pooling layer and pad the remains with zeros. The up-sampled feature maps then go through the binary convolution, normalization and binarization.” This article discloses different functions that can be applied to convolutional blocks. When using the decoder the system will perform a function to return an input back to the original positions and then apply zero padding. This teaches that the system will apply zero padding at different times of the convolution process and it does not occur at the start of a convolutional process.)
“generating a shifted set of values based on shifting the initial set of values in the padded register; and” (B-CEDNet architecture, pp. 2; “The adapter module (block-0) contains a full-precision convolutional layer, followed by a batch-normalization (BN) layer and binarization (Binrz) layer. It transforms the input data into binary format before feeding the data into binary encoder module.” The discloses that the input values are altered and shifted in different layers after the convolutional layer.)
“performing an XOR operation on the set of edge values and the shifted set of values, and” (B-CEDNet architecture, pp. 2; “The BinConv layer takes binary feature maps
a
k
-
1
b
∈
0,1
W
k
-
1
×
H
k
-
1
×
D
k
-
1
as input and performs binary convolution operation which is illustrated as follows: [see equation (1)] where XNOR(·) is defined as bit-wise XNOR operation,
w
k
b
∈
0,1
W
k
×
H
k
×
D
k
are the binary weights in k-th block and
s
k
∈
R
W
k
×
H
k
×
D
k
is the output of the spatial convolution. Then
s
k
is normalized by the BN layer before pooling and binarization. The output of k-th BN layer
a
k
∈
R
W
k
×
H
k
×
D
k
is represented by [see equation (2)] where µ and
σ
2
are the expectation and variance over the mini-batch, while γ and β are learnable parametersIoffe and Szegedy [2015]. The output of the BN layer is subsequently down-sampled by the pooling layer.” This article discloses the use of an XNOR operation during the convolutional operation. This will take in an input tensor and apply different functions to the values. This will then perform the binary operation XNOR on the convolution values in the kernel.)
It would have been obvious to one of ordinary skill in the art before the effective filing date of the present application to combine Tang, Young and Liu. Tang teaches different methods of partitioning input tensors and testing their methods using generic CNN models. Young teaches a method which uses average pooling layers in a CNN with zero padding techniques. Liu teaches a system that uses bitwise operations as convolutional functions with the different kernels and features maps. One of ordinary skill would have motivation to research different partitioning methods for input tensors and combine a CNN model which uses zero padding for input images and a system that is able to execute the different layers of a CNN using bitwise operations to speed up operations, "Figure 3 compares the inference time for B-CEDNet running on baseline kernel and XNOR kernel Courbariaux and Bengio [2016]. Baseline kernel is an optimized matrix multiplication kernel, while the XNOR kernel is tailored for bit-count operation in binary network. We measure the inference time with a batch of input images (size of 16) to obtain higher utilization of GPU. Due to the bit-count operation and huge memory access reduction, the B-CEDNet achieves an average of 4.59 ms inference time and 8speedup with XNOR kernel on TITAN X GPU compared with baseline kernel. Since XNOR kernel introduces run-time overhead concatenating 32 binary values into a 32-bit register, the speedup is more remarkable when the convolutional operation becomes more intensive." (Liu, Run-time and memory usage, pp. 4)
Regarding claim 2, Young discloses, “wherein generating the updated zero- padding pattern is based in part on out-of-bound input elements or a position of the output row edge.” (Detailed Description, pp. 6; "In some implementations where zero-padding is performed by the special-purpose hardware circuit 110, the zero-padding is achieved by first copying the input tensor to the appropriate parts of the output, e.g., in the unified buffer 308, and then writing zeros at the appropriate positions in the memory to obtain a zero-padded input tensor. For example, for an 8x8 input tensor and a 3x3 window for an average pooling layer, a zero-padded input tensor would be a 10x10 tensor." This model proposed a layer which uses zero-padding. This model will evaluate the size of the input tensor and apply zero padding accordingly. This model will assign zeros to the out-of-bound locations.)
Regarding claim 3, Tang discloses, “wherein the set of edge values indicate the position of the output row edge.” (CNN Computational model, pp. 3; “The layers input and output data is stored in multidimensional arrays, called tensors. In this paper, each input/output tensor T has the format
T
H
T
,
W
T
,
C
T
, where
H
T
is the tensor height,
W
T
is the tensor width,
C
T
is the number of channels. We define a layer as a tuple
l
i
=
(
X
i
,
Y
i
,
Θ
i
,
o
p
i
,
s
i
,
p
a
d
i
)
, where:
X
i
[
H
i
x
,
W
i
X
,
C
i
x
]
is the input data tensor of
l
i
;
Y
i
[
H
i
Y
,
W
i
Y
,
C
i
Y
]
is the output data tensor of
l
i
;
Θ
i
[
N
i
Θ
,
H
i
Θ
,
W
i
Θ
,
C
i
Θ
]
is the sliding window of
l
i
,
N
i
Θ
=
C
i
X
is the number of neurons in
l
i
, and
C
i
Θ
=
C
i
X
;
s
i
is the stride, with which
l
i
moves over
X
i
;
o
p
i
is the operator of
l
i
;
p
a
d
i
is the padding of
l
i
;” This article discloses common CNN methods to store a layer of a model as a tensor. As stated above the layers may include padding as denoted by
p
a
d
i
. The number of neurons and strides are also stored in the tuple.)
Regarding claim 4, Liu discloses, “wherein the updated zero-padding pattern is a first updated zero-padding pattern, and wherein generating the updated zero-padding pattern representing the zero-padding pattern for the next cycle comprises:” (B-CEDNet architecture, pp. 2; “The BinConv layer takes binary feature maps
a
k
-
1
b
∈
0,1
W
k
-
1
×
H
k
-
1
×
D
k
-
1
as input and performs binary convolution operation which is illustrated as follows: [see equation (1)] where XNOR(·) is defined as bit-wise XNOR operation,
w
k
b
∈
0,1
W
k
×
H
k
×
D
k
are the binary weights in k-th block and
s
k
∈
R
W
k
×
H
k
×
D
k
is the output of the spatial convolution. Then
s
k
is normalized by the BN layer before pooling and binarization. The output of k-th BN layer
a
k
∈
R
W
k
×
H
k
×
D
k
is represented by [see equation (2)] where µ and
σ
2
are the expectation and variance over the mini-batch, while γ and β are learnable parametersIoffe and Szegedy [2015]. The output of the BN layer is subsequently down-sampled by the pooling layer.” The system proposed in this article uses a bitwise operation during the convolution process. This method will take the feature map as an input and perform a bitwise operation to produce an output. Using the broadest reasonable interpretation the first register would be view as the kernel values and the second register would be interpreted as the weights being applied to the kernel values.)
“generating a shifted set of updated values based on shifting the first updated zero-padding pattern in the padded register; and” (B-CEDNet architecture, pp. 2; “The adapter module (block-0) contains a full-precision convolutional layer, followed by a batch-normalization (BN) layer and binarization (Binrz) layer. It transforms the input data into binary format before feeding the data into binary encoder module.” The discloses that the input values are altered and shifted in different layers after the convolutional layer.)
“performing an XOR operation between the shifted set of updated values and the set of edge values.” (B-CEDNet architecture, pp. 2; “The BinConv layer takes binary feature maps
a
k
-
1
b
∈
0,1
W
k
-
1
×
H
k
-
1
×
D
k
-
1
as input and performs binary convolution operation which is illustrated as follows: [see equation (1)] where XNOR(·) is defined as bit-wise XNOR operation,
w
k
b
∈
0,1
W
k
×
H
k
×
D
k
are the binary weights in k-th block and
s
k
∈
R
W
k
×
H
k
×
D
k
is the output of the spatial convolution. Then
s
k
is normalized by the BN layer before pooling and binarization. The output of k-th BN layer
a
k
∈
R
W
k
×
H
k
×
D
k
is represented by [see equation (2)] where µ and
σ
2
are the expectation and variance over the mini-batch, while γ and β are learnable parametersIoffe and Szegedy [2015]. The output of the BN layer is subsequently down-sampled by the pooling layer.” The system proposed in this article uses a bitwise operation during the convolution process. This method will take the feature map as an input and perform a bitwise operation to produce an output. Using the broadest reasonable interpretation the first register would be view as the kernel values and the second register would be interpreted as the weights being applied to the kernel values.)
Regarding claim 5, Young discloses, “wherein generating the updated zero-padding pattern comprises: determining that a kernel row or column is out of bound;” (Detailed Description, pp. 6, [0072]; "In some implementations where zero-padding is performed by the special-purpose hardware circuit 110, the zero-padding is achieved by first copying the input tensor to the appropriate parts of the output, e.g., in the unified buffer 308, and then writing zeros at the appropriate positions in the memory to obtain a zero-padded input tensor." This model will evaluate the size of the input tensor and evaluate for zero-padding. This model is able take the initial image and expand it to have extra rows and column, which are out-of-bounds, add apply zeros to those locations.)
“identifying the out-of-bound input elements based on the out-of-bound kernel row or column; and” (Detailed Description, pp. 11, [0109]; "Instructions provided to the special purpose hardware circuit may be used to generate control signals for controlling the special purpose hardware circuit to zero-pad an input tensor. The zero-padding may be accomplished, for example, by providing the input tensor from the unified buffer 308 to the matrix computation unit 312, multiplying the input matrix with an identity matrix at the matrix computation unit 312, storing the output at the unified buffer 308, and then performing activation operations, e.g., by the vector computation unit 314, to write zeros in the appropriate places in the unified buffer 308 to generate the zero-padded input tensor. The resulting zero-padded input tensor is a I0xl0 matrix having a first row of 10 zeros, 8 rows each having a first zero, 8 values from a row of the input tensor, and a second zero at the end of the row, and a final row of 10 zeros." This model will evaluate the size of the input tensor and evaluate for zero-padding. This model is able take the initial image and expand it to have extra rows and column, which are out-of-bounds, add apply zeros to those locations. While performing operations, the system is able to recognize out-of-bound elements because they are denoted as zeros as well as recognize the original size of the input tensor.)
“including the out-of-bound input elements in the updated zero-padding pattern.” (Detailed Description, pp. 11, [0110]; "The zero-padded input tensor is convolved with a kernel that is a pooling kernel having the same size as a window specified for the average pooling layer of the neural network. Thus, for the example shown in FIG. 9, a 3x3 kernel composed of 1x1 identity matrices, i.e., ones, is convolved with the zero-padded input tensor to generate a summed output tensor." The out-of-bound elements are still while evaluating the input tensor. Depending on the operation being carried out by the layer the out-of-bound elements are included in the calculations. All elements of the kernel are evaluated to generate an output, this includes the zero padded numbers.)
Regarding claim 9, Young discloses, “wherein each value in the initial set of values corresponds to a compute circuit configured to perform computation associated with the convolution, and performing computations associated with convolution comprises: keeping a result of a compute circuit corresponding to an active value in the initial set of values; and” (Detailed Description, pp. 3, [0035]; In particular, some neural networks include an average pooling layer. Such a neural network layer defines a window for performing the average pooling. Conceptually, to generate an element of an output tensor of the average pooling layer, a region of an input tensor is identified that has the dimensions of the window, and an average of the elements within the region is determined. The window is shifted through the input tensor, i.e., with a stride of one, to generate the output tensor. In such a scenario, the output tensor will have dimensions matching those of the input tensor. The output tensor can then be provided as an inference of the neural network, or as an input tensor to a subsequent layer of the neural network." When evaluating input tensors this system will use a sliding window to evaluate all of the points in the input. This will perform convolutional operations on the values within the window. This take in values which are out-of-bounds and set those values to zero. During this process the values are kept in an output matrix to be further processed in other layers. This process is also carried out by specified units within the system.)
“ignoring a result of a compute circuit corresponding to an inactive value in the initial set of values.” (Detailed Description, pp. 8, [0084]; "The matrix computation unit 312 performs a convolution of the input tensor and the pooling kernel to generate a summed output tensor. Convolving the input tensor with the pooling kernel results in a summed output tensor with a size matching that of the input tensor. In some implementations, the convolution may be performed using techniques disclosed in U.S. patent application Ser. No.14/844, 738, which is hereby incorporated by reference in its entirety. Each element of the summed output tensor is equivalent to a sum of elements of the input tensor within a region of the input tensor defined by the window when applied to a corresponding element of the input tensor. Where the input tensor has a depth D greater than 1, such that the elements of the pooling kernel are each a DxD identity matrix, convolution of the input tensor and the pooling kernel is such that different depths of the input tensor may be processed in parallel to generate the summed output tensor." While processing an input tensor, the size of the input is evaluated. An output matrix is used to hold the convoluted values during the processing. Once complete, the values will be used as input to the next layer of the system. The values which where out-of-bounds are set to zero and are still used in the convolutional process, however the center of kernel will not go outside the measured input matrix and it will not be able to process values out of bounds. The out-of-bounds values are interpreted as the invalid values.)
Regarding claim 10, Tang discloses, “access, from an external memory by the neural processor, an input tensor;” (Energy Consumption Models, pp. 5; “For the different partitioning strategies, described in Section III-B, each partition will be mapped and executed on one edge device in the distributed system and the energy consumption per device can be very different depending on the partitioning strategy.” This article discloses different partitioning methods used on operatically constrained edge devices. This discloses that the edge devices themselves will perform the actions. These devices which are external to the devices that take in an input images and vectorize them into input tensors.)
“divide, by a rasterizer of the neural processor, the input tensor into a plurality of partitions;” (Energy Model for Data Partitioning Strategy pp. 5; “For the data partitioning strategy, the weights of every CNN layer are not partitioned whereas the input data given to every CNN layer
l
i
is partitioned along the height
H
i
X
of the input tensor
X
i
[
H
i
Y
j
,
W
i
X
,
C
i
Y
]
into M partitions, …” This article discloses different partitioning strategies in an CNN. This discloses the input images is partitioned into multiple partitions from left to right and top to bottom.)
“store a partition of the plurality of partitions in an internal buffer of the neural processor;” (Energy Model for Data Partitioning Strategy, pp. 5; “in such a way that the output tensor
Y
i
[
H
i
Y
j
,
W
i
Y
,
C
i
Y
]
from every partition j of the same layer
l
i
can be concatenated with the other output tensors of partitions into one whole piece of output tensor along height
H
i
Y
=
∑
j
=
1
M
H
i
Y
(
j
)
.” Each of the layers will partition their own layer and each layer will be stored and can be concatenated with the other output tensors of the layer. This teaches that each layer will store and accumulate each output tensors to concatenate all of the outputs.)
“generate a set of edge values based on a location of the partition in the internal buffer,” (CNN Computational model, pp. 3; “The layers input and output data is stored in multidimensional arrays, called tensors. In this paper, each input/output tensor T has the format
T
H
T
,
W
T
,
C
T
, where
H
T
is the tensor height,
W
T
is the tensor width,
C
T
is the number of channels. We define a layer as a tuple
l
i
=
(
X
i
,
Y
i
,
Θ
i
,
o
p
i
,
s
i
,
p
a
d
i
)
, where:
X
i
[
H
i
x
,
W
i
X
,
C
i
x
]
is the input data tensor of
l
i
;
Y
i
[
H
i
Y
,
W
i
Y
,
C
i
Y
]
is the output data tensor of
l
i
;
Θ
i
[
N
i
Θ
,
H
i
Θ
,
W
i
Θ
,
C
i
Θ
]
is the sliding window of
l
i
,
N
i
Θ
=
C
i
X
is the number of neurons in
l
i
, and
C
i
Θ
=
C
i
X
;
s
i
is the stride, with which
l
i
moves over
X
i
;
o
p
i
is the operator of
l
i
;
p
a
d
i
is the padding of
l
i
;” This article discloses common CNN methods of storing layers as tensors. This tensor will contain the size of the image, height and width, and the padding the layer requires. The padding is interpreted to extend one or many points outside of the original.)
“wherein the set of edge values indicates an output row edge for the partition;” (CNN Computational model, pp. 3; “The layers input and output data is stored in multidimensional arrays, called tensors. In this paper, each input/output tensor T has the format
T
H
T
,
W
T
,
C
T
, where
H
T
is the tensor height,
W
T
is the tensor width,
C
T
is the number of channels. We define a layer as a tuple
l
i
=
(
X
i
,
Y
i
,
Θ
i
,
o
p
i
,
s
i
,
p
a
d
i
)
, where:
X
i
[
H
i
x
,
W
i
X
,
C
i
x
]
is the input data tensor of
l
i
;
Y
i
[
H
i
Y
,
W
i
Y
,
C
i
Y
]
is the output data tensor of
l
i
;
Θ
i
[
N
i
Θ
,
H
i
Θ
,
W
i
Θ
,
C
i
Θ
]
is the sliding window of
l
i
,
N
i
Θ
=
C
i
X
is the number of neurons in
l
i
, and
C
i
Θ
=
C
i
X
;
s
i
is the stride, with which
l
i
moves over
X
i
;
o
p
i
is the operator of
l
i
;
p
a
d
i
is the padding of
l
i
;” This article discloses common CNN methods to store a layer of a model as a tensor. As stated above the layers may include padding as denoted by
p
a
d
i
. The number of neurons and strides are also stored in the tuple.)
“populate an edge register with the set of edge values;” (CNN computational model, pp. 3; “If input data
X
i
cannot be covered by sliding window
Θ
i
integer number of times, layer
l
i
crops or extends
X
i
with padding
p
a
d
i
[1] and processes cropped/extended input data
X
i
'
, which can be covered by sliding window
Θ
i
integer number of times.” This article discloses the ability to crop or resize an input image using padding. This would teach that the edges of the image can be populated with zeros or other edge values.)
Tang fails to explicitly disclose the remaining limitations of this claim. However, Young discloses, “A non-transitory storage medium storing instruction thereon, the instructions when executed by a neural processor cause causing the neural processor to:” (Detailed Description, pp. 12, [0115]; "Embodiments of the subject matter and the functional operations described in this specification can be implemented in digital electronic circuitry, in tangibly-embodied computer software or firmware, in computer hardware, including the structures disclosed in this specification and their structural equivalents, or in combinations of one or more of them. Embodiments of the subject matter described in this specification can be implemented as one or more computer programs, i.e., one or more modules of computer program instructions encoded on a tangible non transitory program carrier for execution by, or to control the operation of, data processing apparatus." The system proposed in this application is executed on a computing system. This computing system contains memory linked to processors and 1/0 devices to perform the methods of the article. The memory in this system contains the computer instructions for the processor to perform the methods listed.)
“for each row of a kernel for performing convolution on the input tensor: populate a padded register with an initial set of values indicating a zero-padding pattern based on a size of the kernel;” (Detailed Description, pp. 6, [0067]; "For example, based on receiving the request to implement the neural network specifying a network input to the neural network and a window of the average pooling layer of the neural network, the system generates a pooling kernel, a zero-padded input tensor for processing the average pooling layer, a masking tensor for processing the average pooling layer, and an optional third tensor for processing the average pooling layer." This system will perform average pooling using a zero-padded input tensor. This system will user a kernel with the input tensor to calculate a window of the input tensor.)
“for a compute cycle in the row of the kernel: perform computations associated with the convolution based in part on the zero-padding pattern,” (Detailed Description, pp. 6, [0068]; "Each identity matrix is composed of values, e.g., ones and zeros, such that a convolution of the pooling kernel and a region of an input tensor will result in an element having a value equal to a sum of the elements within the region at a particular depth." The system will perform convolutional actions on each window of the input tensor. This will follow the standard CNN methods and steps to evaluate an entire input tensor. This will also use the zero-padded values where appropriate.)
“update the initial set of values in the padded register with the updated zero- padding pattern.” (Detailed Description, pp. 8, [0085]; "In some implementations, performing the convolution of the input tensor and the pooling kernel involves performing a convolution of a zero-padded input tensor and the pooling kernel. For example, as discussed with respect to FIG. 6, a zero-padded version of an input tensor may be generated, and the zero-padded input tensor and the pooling kernel may be convolved to generate the summed output tensor. To perform the convolution, the zero-padded input tensor may be generated and stored at the unified buffer 308." While evaluating the input tensor the kernel will be updated with window of values. This window will slide across the image and at each step will populate the kernel with values. The values are summed and placed into memory. This will execute until the whole image has been evaluated.)
Tang and Young fail to explicitly disclose the remaining limitations of the claims. However, Liu discloses, “instead of padding around the input tensor, generate an updated zero-padding pattern representing a zero-padding pattern for a next cycle in the row of the kernel by:” (B-CEDNet architecture, pp. 2; “The decoder module is composed of 6 convolutional blocks (block-5 to -10). Block-5 to -8 are formed by one un-pooling layer, one BinConv layer, one BN layer and one Binrz layer. Note that there exists a symmetric structure along block-1 to -8. Thus the un-pooling layers Badrinarayanan et al. [2015] within block-5 to -8 simply assign the input pixels back to their original position according to the index generated by the corresponding max-pooling layer and pad the remains with zeros. The up-sampled feature maps then go through the binary convolution, normalization and binarization.” This article discloses different functions that can be applied to convolutional blocks. When using the decoder the system will perform a function to return an input back to the original positions and then apply zero padding. This teaches that the system will apply zero padding at different times of the convolution process and it does not occur at the start of a convolutional process.)
“generate a shifted set of values based on shifting the initial set of values in the padded register; and” (B-CEDNet architecture, pp. 2; “The adapter module (block-0) contains a full-precision convolutional layer, followed by a batch-normalization (BN) layer and binarization (Binrz) layer. It transforms the input data into binary format before feeding the data into binary encoder module.” The discloses that the input values are altered and shifted in different layers after the convolutional layer.)
“perform an XOR operation on the set of edge values and the shifted set of values, and” (B-CEDNet architecture, pp. 2; “The BinConv layer takes binary feature maps
a
k
-
1
b
∈
0,1
W
k
-
1
×
H
k
-
1
×
D
k
-
1
as input and performs binary convolution operation which is illustrated as follows: [see equation (1)] where XNOR(·) is defined as bit-wise XNOR operation,
w
k
b
∈
0,1
W
k
×
H
k
×
D
k
are the binary weights in k-th block and
s
k
∈
R
W
k
×
H
k
×
D
k
is the output of the spatial convolution. Then
s
k
is normalized by the BN layer before pooling and binarization. The output of k-th BN layer
a
k
∈
R
W
k
×
H
k
×
D
k
is represented by [see equation (2)] where µ and
σ
2
are the expectation and variance over the mini-batch, while γ and β are learnable parametersIoffe and Szegedy [2015]. The output of the BN layer is subsequently down-sampled by the pooling layer.” This article discloses the use of an XNOR operation during the convolutional operation. This will take in an input tensor and apply different functions to the values. This will then perform the binary operation XNOR on the convolution values in the kernel.)
Regarding claim 11, Young discloses, “wherein generating the updated zero-padding pattern is based in part on out-of-bound input elements or a position of the output row edge.” (Detailed Description, pp. 6; "In some implementations where zero-padding is performed by the special-purpose hardware circuit 110, the zero-padding is achieved by first copying the input tensor to the appropriate parts of the output, e.g., in the unified buffer 308, and then writing zeros at the appropriate positions in the memory to obtain a zero-padded input tensor. For example, for an 8x8 input tensor and a 3x3 window for an average pooling layer, a zero-padded input tensor would be a 10x10 tensor." This model proposed a layer which uses zero-padding. This model will evaluate the size of the input tensor and apply zero padding accordingly. This model will assign zeros to the out-of-bound locations.)
Regarding claim 12, Tang discloses, “wherein the set of edge values indicates the position of the output row edge.” (CNN Computational model, pp. 3; “The layers input and output data is stored in multidimensional arrays, called tensors. In this paper, each input/output tensor T has the format
T
H
T
,
W
T
,
C
T
, where
H
T
is the tensor height,
W
T
is the tensor width,
C
T
is the number of channels. We define a layer as a tuple
l
i
=
(
X
i
,
Y
i
,
Θ
i
,
o
p
i
,
s
i
,
p
a
d
i
)
, where:
X
i
[
H
i
x
,
W
i
X
,
C
i
x
]
is the input data tensor of
l
i
;
Y
i
[
H
i
Y
,
W
i
Y
,
C
i
Y
]
is the output data tensor of
l
i
;
Θ
i
[
N
i
Θ
,
H
i
Θ
,
W
i
Θ
,
C
i
Θ
]
is the sliding window of
l
i
,
N
i
Θ
=
C
i
X
is the number of neurons in
l
i
, and
C
i
Θ
=
C
i
X
;
s
i
is the stride, with which
l
i
moves over
X
i
;
o
p
i
is the operator of
l
i
;
p
a
d
i
is the padding of
l
i
;” This article discloses common CNN methods to store a layer of a model as a tensor. As stated above the layers may include padding as denoted by
p
a
d
i
. The number of neurons and strides are also stored in the tuple.)
Regarding claim 13, Liu discloses, “wherein the updated zero-padding pattern is a first updated zero-padding pattern, and wherein generating the updated zero-padding pattern representing the zero-padding pattern for the next cycle comprises:” (B-CEDNet architecture, pp. 2; “The BinConv layer takes binary feature maps
a
k
-
1
b
∈
0,1
W
k
-
1
×
H
k
-
1
×
D
k
-
1
as input and performs binary convolution operation which is illustrated as follows: [see equation (1)] where XNOR(·) is defined as bit-wise XNOR operation,
w
k
b
∈
0,1
W
k
×
H
k
×
D
k
are the binary weights in k-th block and
s
k
∈
R
W
k
×
H
k
×
D
k
is the output of the spatial convolution. Then
s
k
is normalized by the BN layer before pooling and binarization. The output of k-th BN layer
a
k
∈
R
W
k
×
H
k
×
D
k
is represented by [see equation (2)] where µ and
σ
2
are the expectation and variance over the mini-batch, while γ and β are learnable parametersIoffe and Szegedy [2015]. The output of the BN layer is subsequently down-sampled by the pooling layer.” The system proposed in this article uses a bitwise operation during the convolution process. This method will take the feature map as an input and perform a bitwise operation to produce an output. Using the broadest reasonable interpretation the first register would be view as the kernel values and the second register would be interpreted as the weights being applied to the kernel values.)
“generating a shifted set of updated values based on shifting the first updated zero-padding pattern in the padded register; and” (B-CEDNet architecture, pp. 2; “The adapter module (block-0) contains a full-precision convolutional layer, followed by a batch-normalization (BN) layer and binarization (Binrz) layer. It transforms the input data into binary format before feeding the data into binary encoder module.” The discloses that the input values are altered and shifted in different layers after the convolutional layer.)
“performing an XOR operation between the shifted set of updated values, and the set of edge values.” (B-CEDNet architecture, pp. 2; “The BinConv layer takes binary feature maps
a
k
-
1
b
∈
0,1
W
k
-
1
×
H
k
-
1
×
D
k
-
1
as input and performs binary convolution operation which is illustrated as follows: [see equation (1)] where XNOR(·) is defined as bit-wise XNOR operation,
w
k
b
∈
0,1
W
k
×
H
k
×
D
k
are the binary weights in k-th block and
s
k
∈
R
W
k
×
H
k
×
D
k
is the output of the spatial convolution. Then
s
k
is normalized by the BN layer before pooling and binarization. The output of k-th BN layer
a
k
∈
R
W
k
×
H
k
×
D
k
is represented by [see equation (2)] where µ and
σ
2
are the expectation and variance over the mini-batch, while γ and β are learnable parametersIoffe and Szegedy [2015]. The output of the BN layer is subsequently down-sampled by the pooling layer.” The system proposed in this article uses a bitwise operation during the convolution process. This method will take the feature map as an input and perform a bitwise operation to produce an output. Using the broadest reasonable interpretation the first register would be view as the kernel values and the second register would be interpreted as the weights being applied to the kernel values.)
Regarding claim 14, Young discloses, “wherein generating the updated zero-padding pattern comprises: determining that a kernel row or column is out of bound;” (Detailed Description, pp. 6, [0072]; "In some implementations where zero-padding is performed by the special-purpose hardware circuit 110, the zero-padding is achieved by first copying the input tensor to the appropriate parts of the output, e.g., in the unified buffer 308, and then writing zeros at the appropriate positions in the memory to obtain a zero-padded input tensor." This model will evaluate the size of the input tensor and evaluate for zero-padding. This model is able take the initial image and expand it to have extra rows and column, which are out-of-bounds, add apply zeros to those locations.)
“identifying the out-of-bound input elements based on the out-of-bound kernel row or column; and” (Detailed Description, pp. 11, [0109]; "Instructions provided to the special purpose hardware circuit may be used to generate control signals for controlling the special purpose hardware circuit to zero-pad an input tensor. The zero-padding may be accomplished, for example, by providing the input tensor from the unified buffer 308 to the matrix computation unit 312, multiplying the input matrix with an identity matrix at the matrix computation unit 312, storing the output at the unified buffer 308, and then performing activation operations, e.g., by the vector computation unit 314, to write zeros in the appropriate places in the unified buffer 308 to generate the zero-padded input tensor. The resulting zero-padded input tensor is a I0xl0 matrix having a first row of 10 zeros, 8 rows each having a first zero, 8 values from a row of the input tensor, and a second zero at the end of the row, and a final row of 10 zeros." This model will evaluate the size of the input tensor and evaluate for zero-padding. This model is able take the initial image and expand it to have extra rows and column, which are out-of-bounds, add apply zeros to those locations. While performing operations, the system is able to recognize out-of-bound elements because they are denoted as zeros as well as recognize the original size of the input tensor.)
“including the out-of-bound input elements in the updated zero-padding pattern.” (Detailed Description, pp. 11, [0110]; "The zero-padded input tensor is convolved with a kernel that is a pooling kernel having the same size as a window specified for the average pooling layer of the neural network. Thus, for the example shown in FIG. 9, a 3x3 kernel composed of 1x1 identity matrices, i.e., ones, is convolved with the zero-padded input tensor to generate a summed output tensor." The out-of-bound elements are still while evaluating the input tensor. Depending on the operation being carried out by the layer the out-of-bound elements are included in the calculations. All elements of the kernel are evaluated to generate an output, this includes the zero padded numbers.)
Regarding claim 15, Tang discloses, “accessing, from the buffer memory, the input tensor;” (Energy Consumption Models, pp. 5; “For the different partitioning strategies, described in Section III-B, each partition will be mapped and executed on one edge device in the distributed system and the energy consumption per device can be very different depending on the partitioning strategy.” This article discloses different partitioning methods used on operatically constrained edge devices. This discloses that the edge devices themselves will perform the actions. These devices which are external to the devices that take in an input images and vectorize them into input tensors.)
“dividing, by a rasterizer of the neural processor, the input tensor into a plurality of partitions;” (Energy Model for Data Partitioning Strategy pp. 5; “For the data partitioning strategy, the weights of every CNN layer are not partitioned whereas the input data given to every CNN layer
l
i
is partitioned along the height
H
i
X
of the input tensor
X
i
[
H
i
Y
j
,
W
i
X
,
C
i
Y
]
into M partitions, …” This article discloses different partitioning strategies in an CNN. This discloses the input images is partitioned into multiple partitions from left to right and top to bottom.)
“storing a partition of the plurality of partitions in an internal buffer of the neural processor;” (Energy Model for Data Partitioning Strategy, pp. 5; “in such a way that the output tensor
Y
i
[
H
i
Y
j
,
W
i
Y
,
C
i
Y
]
from every partition j of the same layer
l
i
can be concatenated with the other output tensors of partitions into one whole piece of output tensor along height
H
i
Y
=
∑
j
=
1
M
H
i
Y
(
j
)
.” Each of the layers will partition their own layer and each layer will be stored and can be concatenated with the other output tensors of the layer. This teaches that each layer will store and accumulate each output tensors to concatenate all of the outputs.)
“generating a set of edge values based on a location of the partition in the internal buffer, ” (CNN Computational model, pp. 3; “The layers input and output data is stored in multidimensional arrays, called tensors. In this paper, each input/output tensor T has the format
T
H
T
,
W
T
,
C
T
, where
H
T
is the tensor height,
W
T
is the tensor width,
C
T
is the number of channels. We define a layer as a tuple
l
i
=
(
X
i
,
Y
i
,
Θ
i
,
o
p
i
,
s
i
,
p
a
d
i
)
, where:
X
i
[
H
i
x
,
W
i
X
,
C
i
x
]
is the input data tensor of
l
i
;
Y
i
[
H
i
Y
,
W
i
Y
,
C
i
Y
]
is the output data tensor of
l
i
;
Θ
i
[
N
i
Θ
,
H
i
Θ
,
W
i
Θ
,
C
i
Θ
]
is the sliding window of
l
i
,
N
i
Θ
=
C
i
X
is the number of neurons in
l
i
, and
C
i
Θ
=
C
i
X
;
s
i
is the stride, with which
l
i
moves over
X
i
;
o
p
i
is the operator of
l
i
;
p
a
d
i
is the padding of
l
i
;” This article discloses common CNN methods of storing layers as tensors. This tensor will contain the size of the image, height and width, and the padding the layer requires. The padding is interpreted to extend one or many points outside of the original.)
“wherein the set of edge values indicate an output row edge for the partition;” (CNN Computational model, pp. 3; “The layers input and output data is stored in multidimensional arrays, called tensors. In this paper, each input/output tensor T has the format
T
H
T
,
W
T
,
C
T
, where
H
T
is the tensor height,
W
T
is the tensor width,
C
T
is the number of channels. We define a layer as a tuple
l
i
=
(
X
i
,
Y
i
,
Θ
i
,
o
p
i
,
s
i
,
p
a
d
i
)
, where:
X
i
[
H
i
x
,
W
i
X
,
C
i
x
]
is the input data tensor of
l
i
;
Y
i
[
H
i
Y
,
W
i
Y
,
C
i
Y
]
is the output data tensor of
l
i
;
Θ
i
[
N
i
Θ
,
H
i
Θ
,
W
i
Θ
,
C
i
Θ
]
is the sliding window of
l
i
,
N
i
Θ
=
C
i
X
is the number of neurons in
l
i
, and
C
i
Θ
=
C
i
X
;
s
i
is the stride, with which
l
i
moves over
X
i
;
o
p
i
is the operator of
l
i
;
p
a
d
i
is the padding of
l
i
;” This article discloses common CNN methods to store a layer of a model as a tensor. As stated above the layers may include padding as denoted by
p
a
d
i
. The number of neurons and strides are also stored in the tuple.)
“populating an edge register with the set of edge values;” (CNN computational model, pp. 3; “If input data
X
i
cannot be covered by sliding window
Θ
i
integer number of times, layer
l
i
crops or extends
X
i
with padding
p
a
d
i
[1] and processes cropped/extended input data
X
i
'
, which can be covered by sliding window
Θ
i
integer number of times.” This article discloses the ability to crop or resize an input image using padding. This would teach that the edges of the image can be populated with zeros or other edge values.)
Tang fails to explicitly disclose the remaining limitations of this claim. However, Young discloses, “A neural processor circuit, comprising: a data processor circuit having a buffer memory storing an input tensor; and a plurality of neural engines; wherein the data processor circuit is configured to perform operations comprising:” (Detailed Description, pp. 12, [0115]; "Embodiments of the subject matter and the functional operations described in this specification can be implemented in digital electronic circuitry, in tangibly-embodied computer software or firmware, in computer hardware, including the structures disclosed in this specification and their structural equivalents, or in combinations of one or more of them. Embodiments of the subject matter described in this specification can be implemented as one or more computer programs, i.e., one or more modules of computer program instructions encoded on a tangible non transitory program carrier for execution by, or to control the operation of, data processing apparatus." The system proposed in this application is executed on a computing system. This computing system contains memory linked to processors and 1/0 devices to perform the methods of the article. The memory in this system contains the computer instructions for the processor to perform the methods listed.)
“for each row of a kernel for performing convolution on the input tensor: populating a padded register with an initial set of values indicating a zero- padding pattern based on a size of the kernel;” (Detailed Description, pp. 6, [0067]; "For example, based on receiving the request to implement the neural network specifying a network input to the neural network and a window of the average pooling layer of the neural network, the system generates a pooling kernel, a zero-padded input tensor for processing the average pooling layer, a masking tensor for processing the average pooling layer, and an optional third tensor for processing the average pooling layer." This system will perform average pooling using a zero-padded input tensor. This system will user a kernel with the input tensor to calculate a window of the input tensor.)
“for a compute cycle in the row of the kernel: performing computations associated with the convolution based in part on the zero-padding pattern,” (Detailed Description, pp. 6, [0068]; "Each identity matrix is composed of values, e.g., ones and zeros, such that a convolution of the pooling kernel and a region of an input tensor will result in an element having a value equal to a sum of the elements within the region at a particular depth." The system will perform convolutional actions on each window of the input tensor. This will follow the standard CNN methods and steps to evaluate an entire input tensor. This will also use the zero-padded values where appropriate.)
“updating the initial set of values in the padded register with the updated zero-padding pattern.” (Detailed Description, pp. 8, [0085]; "In some implementations, performing the convolution of the input tensor and the pooling kernel involves performing a convolution of a zero-padded input tensor and the pooling kernel. For example, as discussed with respect to FIG. 6, a zero-padded version of an input tensor may be generated, and the zero-padded input tensor and the pooling kernel may be convolved to generate the summed output tensor. To perform the convolution, the zero-padded input tensor may be generated and stored at the unified buffer 308." While evaluating the input tensor the kernel will be updated with window of values. This window will slide across the image and at each step will populate the kernel with values. The values are summed and placed into memory. This will execute until the whole image has been evaluated.)
Tang and Young fail to explicitly disclose the remaining limitations of the claims. However, Liu discloses, “instead of padding around the input tensor, generating an updated zero-padding pattern representing a zero-padding pattern for a next cycle in the row of the kernel by:” (B-CEDNet architecture, pp. 2; “The decoder module is composed of 6 convolutional blocks (block-5 to -10). Block-5 to -8 are formed by one un-pooling layer, one BinConv layer, one BN layer and one Binrz layer. Note that there exists a symmetric structure along block-1 to -8. Thus the un-pooling layers Badrinarayanan et al. [2015] within block-5 to -8 simply assign the input pixels back to their original position according to the index generated by the corresponding max-pooling layer and pad the remains with zeros. The up-sampled feature maps then go through the binary convolution, normalization and binarization.” This article discloses different functions that can be applied to convolutional blocks. When using the decoder the system will perform a function to return an input back to the original positions and then apply zero padding. This teaches that the system will apply zero padding at different times of the convolution process and it does not occur at the start of a convolutional process.)
“generating a shifted set of values based on shifting the initial set of values in the padded register; and” (B-CEDNet architecture, pp. 2; “The adapter module (block-0) contains a full-precision convolutional layer, followed by a batch-normalization (BN) layer and binarization (Binrz) layer. It transforms the input data into binary format before feeding the data into binary encoder module.” The discloses that the input values are altered and shifted in different layers after the convolutional layer.)
“performing an XOR operation on the set of edge values and the shifted set of values, and” (B-CEDNet architecture, pp. 2; “The BinConv layer takes binary feature maps
a
k
-
1
b
∈
0,1
W
k
-
1
×
H
k
-
1
×
D
k
-
1
as input and performs binary convolution operation which is illustrated as follows: [see equation (1)] where XNOR(·) is defined as bit-wise XNOR operation,
w
k
b
∈
0,1
W
k
×
H
k
×
D
k
are the binary weights in k-th block and
s
k
∈
R
W
k
×
H
k
×
D
k
is the output of the spatial convolution. Then
s
k
is normalized by the BN layer before pooling and binarization. The output of k-th BN layer
a
k
∈
R
W
k
×
H
k
×
D
k
is represented by [see equation (2)] where µ and
σ
2
are the expectation and variance over the mini-batch, while γ and β are learnable parametersIoffe and Szegedy [2015]. The output of the BN layer is subsequently down-sampled by the pooling layer.” This article discloses the use of an XNOR operation during the convolutional operation. This will take in an input tensor and apply different functions to the values. This will then perform the binary operation XNOR on the convolution values in the kernel.)
Regarding claim 16, Young discloses, “wherein generating the updated zero-padding pattern is based in part on out-of-bound input elements or a position of the output row edge.” (Detailed Description, pp. 6; "In some implementations where zero-padding is performed by the special-purpose hardware circuit 110, the zero-padding is achieved by first copying the input tensor to the appropriate parts of the output, e.g., in the unified buffer 308, and then writing zeros at the appropriate positions in the memory to obtain a zero-padded input tensor. For example, for an 8x8 input tensor and a 3x3 window for an average pooling layer, a zero-padded input tensor would be a 10x10 tensor." This model proposed a layer which uses zero-padding. This model will evaluate the size of the input tensor and apply zero padding accordingly. This model will assign zeros to the out-of-bound locations.)
Regarding claim 17, Tang discloses, “wherein the set of edge values indicate the position of the output row edge.” (CNN Computational model, pp. 3; “The layers input and output data is stored in multidimensional arrays, called tensors. In this paper, each input/output tensor T has the format
T
H
T
,
W
T
,
C
T
, where
H
T
is the tensor height,
W
T
is the tensor width,
C
T
is the number of channels. We define a layer as a tuple
l
i
=
(
X
i
,
Y
i
,
Θ
i
,
o
p
i
,
s
i
,
p
a
d
i
)
, where:
X
i
[
H
i
x
,
W
i
X
,
C
i
x
]
is the input data tensor of
l
i
;
Y
i
[
H
i
Y
,
W
i
Y
,
C
i
Y
]
is the output data tensor of
l
i
;
Θ
i
[
N
i
Θ
,
H
i
Θ
,
W
i
Θ
,
C
i
Θ
]
is the sliding window of
l
i
,
N
i
Θ
=
C
i
X
is the number of neurons in
l
i
, and
C
i
Θ
=
C
i
X
;
s
i
is the stride, with which
l
i
moves over
X
i
;
o
p
i
is the operator of
l
i
;
p
a
d
i
is the padding of
l
i
;” This article discloses common CNN methods to store a layer of a model as a tensor. As stated above the layers may include padding as denoted by
p
a
d
i
. The number of neurons and strides are also stored in the tuple.)
Regarding claim 18, Liu discloses, “wherein the updated zero- padding pattern is a first updated zero-padding pattern, and wherein generating the updated zero- padding pattern representing a zero-padding pattern for the next cycle comprises:” (B-CEDNet architecture, pp. 2; “The BinConv layer takes binary feature maps
a
k
-
1
b
∈
0,1
W
k
-
1
×
H
k
-
1
×
D
k
-
1
as input and performs binary convolution operation which is illustrated as follows: [see equation (1)] where XNOR(·) is defined as bit-wise XNOR operation,
w
k
b
∈
0,1
W
k
×
H
k
×
D
k
are the binary weights in k-th block and
s
k
∈
R
W
k
×
H
k
×
D
k
is the output of the spatial convolution. Then
s
k
is normalized by the BN layer before pooling and binarization. The output of k-th BN layer
a
k
∈
R
W
k
×
H
k
×
D
k
is represented by [see equation (2)] where µ and
σ
2
are the expectation and variance over the mini-batch, while γ and β are learnable parametersIoffe and Szegedy [2015]. The output of the BN layer is subsequently down-sampled by the pooling layer.” The system proposed in this article uses a bitwise operation during the convolution process. This method will take the feature map as an input and perform a bitwise operation to produce an output. Using the broadest reasonable interpretation the first register would be view as the kernel values and the second register would be interpreted as the weights being applied to the kernel values.)
“generating a shifted set of updated values based on shifting the first updated zero-padding pattern in the padded register; and” (B-CEDNet architecture, pp. 2; “The adapter module (block-0) contains a full-precision convolutional layer, followed by a batch-normalization (BN) layer and binarization (Binrz) layer. It transforms the input data into binary format before feeding the data into binary encoder module.” The discloses that the input values are altered and shifted in different layers after the convolutional layer.)
“performing an XOR operation between the shifted set of updated values and the set of edge values.” (B-CEDNet architecture, pp. 2; “The BinConv layer takes binary feature maps
a
k
-
1
b
∈
0,1
W
k
-
1
×
H
k
-
1
×
D
k
-
1
as input and performs binary convolution operation which is illustrated as follows: [see equation (1)] where XNOR(·) is defined as bit-wise XNOR operation,
w
k
b
∈
0,1
W
k
×
H
k
×
D
k
are the binary weights in k-th block and
s
k
∈
R
W
k
×
H
k
×
D
k
is the output of the spatial convolution. Then
s
k
is normalized by the BN layer before pooling and binarization. The output of k-th BN layer
a
k
∈
R
W
k
×
H
k
×
D
k
is represented by [see equation (2)] where µ and
σ
2
are the expectation and variance over the mini-batch, while γ and β are learnable parametersIoffe and Szegedy [2015]. The output of the BN layer is subsequently down-sampled by the pooling layer.” The system proposed in this article uses a bitwise operation during the convolution process. This method will take the feature map as an input and perform a bitwise operation to produce an output. Using the broadest reasonable interpretation the first register would be view as the kernel values and the second register would be interpreted as the weights being applied to the kernel values.)
Regarding claim 19, Young discloses, “wherein generating the updated zero-padding pattern comprises: determining that a kernel row or column is out of bound;”(Detailed Description, pp. 6, [0072]; "In some implementations where zero-padding is performed by the special-purpose hardware circuit 110, the zero-padding is achieved by first copying the input tensor to the appropriate parts of the output, e.g., in the unified buffer 308, and then writing zeros at the appropriate positions in the memory to obtain a zero-padded input tensor." This model will evaluate the size of the input tensor and evaluate for zero-padding. This model is able take the initial image and expand it to have extra rows and column, which are out-of-bounds, add apply zeros to those locations.)
“identifying the out-of-bound input elements based on the out-of-bound kernel row or column; and” (Detailed Description, pp. 11, [0109]; "Instructions provided to the special purpose hardware circuit may be used to generate control signals for controlling the special purpose hardware circuit to zero-pad an input tensor. The zero-padding may be accomplished, for example, by providing the input tensor from the unified buffer 308 to the matrix computation unit 312, multiplying the input matrix with an identity matrix at the matrix computation unit 312, storing the output at the unified buffer 308, and then performing activation operations, e.g., by the vector computation unit 314, to write zeros in the appropriate places in the unified buffer 308 to generate the zero-padded input tensor. The resulting zero-padded input tensor is a I0xl0 matrix having a first row of 10 zeros, 8 rows each having a first zero, 8 values from a row of the input tensor, and a second zero at the end of the row, and a final row of 10 zeros." This model will evaluate the size of the input tensor and evaluate for zero-padding. This model is able take the initial image and expand it to have extra rows and column, which are out-of-bounds, add apply zeros to those locations. While performing operations, the system is able to recognize out-of-bound elements because they are denoted as zeros as well as recognize the original size of the input tensor.)
“including the out-of-bound input elements in the updated zero-padding pattern.” (Detailed Description, pp. 11, [0110]; "The zero-padded input tensor is convolved with a kernel that is a pooling kernel having the same size as a window specified for the average pooling layer of the neural network. Thus, for the example shown in FIG. 9, a 3x3 kernel composed of 1x1 identity matrices, i.e., ones, is convolved with the zero-padded input tensor to generate a summed output tensor." The out-of-bound elements are still while evaluating the input tensor. Depending on the operation being carried out by the layer the out-of-bound elements are included in the calculations. All elements of the kernel are evaluated to generate an output, this includes the zero padded numbers.)
Regarding claim 20, Young discloses, “comprising a plurality of compute circuits configured to perform computation associated with the convolution, wherein each value in the initial set of values corresponds to one of the plurality of compute circuits, and performing computations associated with convolution comprises: keeping a result of a compute circuit corresponding to an active value in the initial set of values; and” (Detailed Description, pp. 3, [0035]; In particular, some neural networks include an average pooling layer. Such a neural network layer defines a window for performing the average pooling. Conceptually, to generate an element of an output tensor of the average pooling layer, a region of an input tensor is identified that has the dimensions of the window, and an average of the elements within the region is determined. The window is shifted through the input tensor, i.e., with a stride of one, to generate the output tensor. In such a scenario, the output tensor will have dimensions matching those of the input tensor. The output tensor can then be provided as an inference of the neural network, or as an input tensor to a subsequent layer of the neural network." When evaluating input tensors this system will use a sliding window to evaluate all of the points in the input. This will perform convolutional operations on the values within the window. This take in values which are out-of-bounds and set those values to zero. During this process the values are kept in an output matrix to be further processed in other layers. This process is also carried out by specified units within the system.)
“ignoring a result of a compute circuit corresponding to an inactive value in the initial set of values.” (Detailed Description, pp. 8, [0084]; "The matrix computation unit 312 performs a convolution of the input tensor and the pooling kernel to generate a summed output tensor. Convolving the input tensor with the pooling kernel results in a summed output tensor with a size matching that of the input tensor. In some implementations, the convolution may be performed using techniques disclosed in U.S. patent application Ser. No.14/844,738, which is hereby incorporated by reference in its entirety. Each element of the summed output tensor is equivalent to a sum of elements of the input tensor within a region of the input tensor defined by the window when applied to a corresponding element of the input tensor. Where the input tensor has a depth D greater than 1, such that the elements of the pooling kernel are each a DxD identity matrix, convolution of the input tensor and the pooling kernel is such that different depths of the input tensor may be processed in parallel to generate the summed output tensor." While processing an input tensor, the size of the input is evaluated. An output matrix is used to hold the convoluted values during the processing. Once complete, the values will be used as input to the next layer of the system. The values which where out-of-bounds are set to zero and are still used in the convolutional process, however the center of kernel will not go outside the measured input matrix and it will not be able to process values out of bounds. The out-of-bounds values are interpreted as the invalid values.)
Claims 6-8 are rejected under 35 U.S.C. 103 as being unpatentable over Young, Tang and Liu in view of Ren et al, (Ren et al, “An SVM-Based Nested Sliding Window Approach for Spectral–Spatial Classification of Hyperspectral Images”, Dec. 2020, hereinafter “Ren”).
Regarding claim 6, Ren discloses, “determining whether the output row edge is at a leftmost position;” (The Nested Sliding Window Method, pp. 5; “After zero-padding is performed on the raw data, the neighborhood of the target pixel
X
i
j
:
P
can be obtained according to Formula (2), denoted as
N
X
i
j
:
P
. Set a sliding sub-window with a size of ((a+1), (a+1)) in the neighborhood. Using this sub-window, a smaller three dimensional matrix
W
m
n
X
i
j
:
P
can be divided in
N
X
i
j
:
P
, where
W
m
n
X
i
j
:
P
⊂
N
X
i
j
:
P
, m and n are used to determine the position of the sliding window, and
0
≤
m
≤
a
,
0
≤
n
≤
a
. is defined as follows: [see Equation (4)]. where
a
<
i
≤
H
+
a
a
n
d
a
<
j
≤
W
+
a
.” The system proposed in this article will evaluate an area around a designated location. This will evaluate the location and determine where in the image it is. The method will generate a filter around this point and take into consideration if this point is located on an edge or corner. If this location is an edge, left or right, zero padding is used to the out-of- bounds points.)
“responsive to determining that the output row edge is at the leftmost position, for each compute cycle:” (The Nested Sliding Window Method, pp. 4; “The nested sliding window (NSW) method proposed in this paper uses the correlation between HSI pixels to reconstruct the data, and generally uses the Pearson correlation coefficient to measure the correlation. For pixel vectors x and y, the Pearson correlation coefficient is calculated as follows: [see equation (1)] where
c
o
v
⋅
,
⋅
represents covariance, and
V
a
r
⋅
represents variance. Denote the pixel vector in row i and column j of X as
X
i
j
:
, and assume that
X
i
j
:
is the target pixel.” This system will perform actions based on the location of the target in the image. If the target is located on an edge zero padding is used for the out-of-bounds points.)
“determining whether a kernel element positioned at a row corresponding to a row number and a column corresponding to a column number satisfies a condition of that the column number is no greater than a floor of a half of a width of the kernel; and” (The Nested Sliding Window Method, pp. 4; “Considering that Formula (2) cannot be used to obtain the neighborhood when the target pixel is at the edge position of X in the spatial dimension, i.e.,
i
≤
a
,
i
>
H
-
a
,
j
≤
a
,
o
r
j
>
W
-
a
, the data needs to be zero-padding before obtain the neighborhood. Perform zero-padding operation on X to get
X
P
⊂
R
H
+
2
a
,
W
+
2
a
,
B
: [see equation (3)].” The system in this article will use an evaluation to determine if the location is within bounds. This system will also determine if the points around the target are in bounds. Particularly the target, denoted as
X
i
j
, will be given a value depending on its location as seen in equation (3).)
“responsive to determining that the kernel element satisfies the condition, identifying one or more input elements next to the output row edge; and” (The Nested Window Method, pp. 5; “Within the valid range of m and n,
W
m
n
X
i
j
:
P
always contains the target pixel
X
i
j
:
P
. Therefore, the correlation coefficients between
X
i
j
:
P
and the pixel vectors in
W
m
n
X
i
j
:
P
can be calculated according to Formula (1), and the calculated correlation coefficient matrix be denoted as
C
m
n
X
i
j
:
P
: [see equation (5)].” After this system determines the location of the target location actions are performed on the target location using the neighbor data. Once the neighborhood is set then equation (1) is executed to find correlations of the data.)
“including the one or more input elements in the updated zero-padding pattern.” (The Nested Sliding Window Method, pp. 4; “Considering that Formula (2) cannot be used to obtain the neighborhood when the target pixel is at the edge position of X in the spatial dimension, i.e.,
i
≤
a
,
i
>
H
-
a
,
j
≤
a
,
o
r
j
>
W
-
a
, the data needs to be zero-padding before obtain the neighborhood. Perform zero-padding operation on X to get
X
P
⊂
R
H
+
2
a
,
W
+
2
a
,
B
: [see equation (3)].” When the target location is an edge location the system will use zero padding to fill the locations. If the target is an edge the input elements of the neighborhood filter will contain zeros.)
It would have been obvious to one of ordinary skill in the art before the effective filing date of the present application to combine Tang, Young, Liu and Ren. Tang teaches different methods of partitioning input tensors and testing their methods using generic CNN models. Young teaches a method which uses average pooling layers in a CNN with zero padding techniques. Liu teaches a system that uses bitwise operations as convolutional functions with the different kernels and features maps. Ren teaches a system that evaluates an image using a CNN with a sliding window that is able to further evaluate a point of the image using multiple filters. One of ordinary skill would have motivation to research different partitioning methods for input tensors and combine a CNN model which uses zero padding for input images and a system that is able to execute the different layers of a CNN using bitwise operations to speed up operations and system that executes a CNN using multiple filters to further examine an point of the image, which as uses a zero padding technique, "The classification accuracy of the five comparison models, i.e., CDCT-WF-SVM, CDCT-2DCT-SVM, SDWT-2DWT-SVM, SDWTWF- SVM and SDWT-2DCT-SVM, has been significantly improved compared with the SVM model and the PCA-SVM model. Among them, the CDCT-2DCT-SVM model (OA = 83.26%) achieved the highest classification accuracy. In fact, the CDCT-2DCT-SVM model and the other four models only perform spatial filtering on the noisy part from the spectral filter, while a part of the reconstructed data does not contain spatial information." (Ren, Discussion, pp. 22)
Regarding claim 7, Ren discloses, “determining whether the output row edge is at a rightmost position;” (The Nested Sliding Window Method, pp. 5; “After zero-padding is performed on the raw data, the neighborhood of the target pixel
X
i
j
:
P
can be obtained according to Formula (2), denoted as
N
X
i
j
:
P
. Set a sliding sub-window with a size of ((a+1), (a+1)) in the neighborhood. Using this sub-window, a smaller three dimensional matrix
W
m
n
X
i
j
:
P
can be divided in
N
X
i
j
:
P
, where
W
m
n
X
i
j
:
P
⊂
N
X
i
j
:
P
, m and n are used to determine the position of the sliding window, and
0
≤
m
≤
a
,
0
≤
n
≤
a
. is defined as follows: [see Equation (4)]. where
a
<
i
≤
H
+
a
a
n
d
a
<
j
≤
W
+
a
.” The system proposed in this article will evaluate an area around a designated location. This will evaluate the location and determine where in the image it is. The method will generate a filter around this point and take into consideration if this point is located on an edge or corner. If this location is an edge, left or right, zero padding is used to the out-of- bounds points.)
“responsive to determining that the output row edge is at the rightmost position,” (The Nested Sliding Window Method, pp. 4; “The nested sliding window (NSW) method proposed in this paper uses the correlation between HSI pixels to reconstruct the data, and generally uses the Pearson correlation coefficient to measure the correlation. For pixel vectors x and y, the Pearson correlation coefficient is calculated as follows: [see equation (1)] where
c
o
v
⋅
,
⋅
represents covariance, and
V
a
r
⋅
represents variance. Denote the pixel vector in row i and column j of X as
X
i
j
:
, and assume that
X
i
j
:
is the target pixel.” This system will perform actions based on the location of the target in the image. If the target is located on an edge zero padding is used for the out-of-bounds points.)
“for each compute cycle: determining whether a kernel element positioned at a row corresponding to a row number and a column corresponding to a column number satisfies a condition of that the column number is no less than a ceiling of a half of a width of the kernel;” (The Nested Sliding Window Method, pp. 4; “Considering that Formula (2) cannot be used to obtain the neighborhood when the target pixel is at the edge position of X in the spatial dimension, i.e.,
i
≤
a
,
i
>
H
-
a
,
j
≤
a
,
o
r
j
>
W
-
a
, the data needs to be zero-padding before obtain the neighborhood. Perform zero-padding operation on X to get
X
P
⊂
R
H
+
2
a
,
W
+
2
a
,
B
: [see equation (3)].” The system in this article will use an evaluation to determine if the location is within bounds. This system will also determine if the points around the target are in bounds. Particularly the target, denoted as
X
i
j
, will be given a value depending on its location as seen in equation (3).)
“responsive to determining that the kernel element satisfies the condition, identifying one or more input elements next to the output row edge; and” (The Nested Window Method, pp. 5; “Within the valid range of m and n,
W
m
n
X
i
j
:
P
always contains the target pixel
X
i
j
:
P
. Therefore, the correlation coefficients between
X
i
j
:
P
and the pixel vectors in
W
m
n
X
i
j
:
P
can be calculated according to Formula (1), and the calculated correlation coefficient matrix be denoted as
C
m
n
X
i
j
:
P
: [see equation (5)].” After this system determines the location of the target location actions are performed on the target location using the neighbor data. Once the neighborhood is set then equation (1) is executed to find correlations of the data.)
“including the one or more input elements in the updated zero-padding pattern.” (The Nested Sliding Window Method, pp. 4; “Considering that Formula (2) cannot be used to obtain the neighborhood when the target pixel is at the edge position of X in the spatial dimension, i.e.,
i
≤
a
,
i
>
H
-
a
,
j
≤
a
,
o
r
j
>
W
-
a
, the data needs to be zero-padding before obtain the neighborhood. Perform zero-padding operation on X to get
X
P
⊂
R
H
+
2
a
,
W
+
2
a
,
B
: [see equation (3)].” When the target location is an edge location the system will use zero padding to fill the locations. If the target is an edge the input elements of the neighborhood filter will contain zeros.)
Regarding claim 8, Ren discloses, “responsive to determining that the output row is in a middle position, for each compute cycle,” (The Nested Sliding Window Method, pp. 5; “After zero-padding is performed on the raw data, the neighborhood of the target pixel
X
i
j
:
P
can be obtained according to Formula (2), denoted as
N
X
i
j
:
P
. Set a sliding sub-window with a size of ((a+1), (a+1)) in the neighborhood. Using this sub-window, a smaller three dimensional matrix
W
m
n
X
i
j
:
P
can be divided in
N
X
i
j
:
P
, where
W
m
n
X
i
j
:
P
⊂
N
X
i
j
:
P
, m and n are used to determine the position of the sliding window, and
0
≤
m
≤
a
,
0
≤
n
≤
a
. is defined as follows: [see Equation (4)]. where
a
<
i
≤
H
+
a
a
n
d
a
<
j
≤
W
+
a
.” The system proposed in this article will evaluate an area around a designated location. This will evaluate the location and determine where in the image it is. The method will generate a filter around this point and take into consideration if this point is located on an edge or corner. If this location is an edge, left or right, zero padding is used to the out-of-bounds points.)
“determining a kernel element positioned at a row corresponding to a row number and a column corresponding to a column number satisfies a condition of that the column number is no greater than a floor of a half of a height of the kernel or no less than a ceiling of a half of a height of the kernel;” (The Nested Sliding Window Method, pp. 4; “Considering that Formula (2) cannot be used to obtain the neighborhood when the target pixel is at the edge position of X in the spatial dimension, i.e.,
i
≤
a
,
i
>
H
-
a
,
j
≤
a
,
o
r
j
>
W
-
a
, the data needs to be zero-padding before obtain the neighborhood. Perform zero-padding operation on X to get
X
P
⊂
R
H
+
2
a
,
W
+
2
a
,
B
: [see equation (3)].” The system in this article will use an evaluation to determine if the location is within bounds. This system will also determine if the points around the target are in bounds. Particularly the target, denoted as
X
i
j
, will be given a value depending on its location as seen in equation (3).)
“identifying one or more input elements next to the output row edge; and” (The Nested Window Method, pp. 5; “Within the valid range of m and n,
W
m
n
X
i
j
:
P
always contains the target pixel
X
i
j
:
P
. Therefore, the correlation coefficients between
X
i
j
:
P
and the pixel vectors in
W
m
n
X
i
j
:
P
can be calculated according to Formula (1), and the calculated correlation coefficient matrix be denoted as
C
m
n
X
i
j
:
P
: [see equation (5)].” After this system determines the location of the target location actions are performed on the target location using the neighbor data. Once the neighborhood is set then equation (1) is executed to find correlations of the data.)
“including the one or more input elements in the updated zero-padding pattern.” (The Nested Sliding Window Method, pp. 4; “Considering that Formula (2) cannot be used to obtain the neighborhood when the target pixel is at the edge position of X in the spatial dimension, i.e.,
i
≤
a
,
i
>
H
-
a
,
j
≤
a
,
o
r
j
>
W
-
a
, the data needs to be zero-padding before obtain the neighborhood. Perform zero-padding operation on X to get
X
P
⊂
R
H
+
2
a
,
W
+
2
a
,
B
: [see equation (3)].” When the target location is an edge location the system will use zero padding to fill the locations. If the target is an edge the input elements of the neighborhood filter will contain zeros.)
Conclusion
THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to PAUL MICHAEL GALVIN-SIEBENALER whose telephone number is (571)272-1257. The examiner can normally be reached Monday - Friday 8AM to 5PM.
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/PAUL M GALVIN-SIEBENALER/Examiner, Art Unit 2147
/VIKER A LAMARDO/Supervisory Patent Examiner, Art Unit 2147
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