DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Examiner’s Comments
The instant application claims benefits of an earlier filing date of provisional application 62662969 filed on April 26, 2018.
The provisional application 62662969, however, does not fully support the claimed invention of at least claim 21 (e.g., “a first power amplifier, supplied by a first envelope tracking supply voltage comprising a combination of a first DC supply voltage and the amplified first envelope tracking signal, for receiving a first input signal to generate a first output signal”; and a second power amplifier, supplied by a second envelope tracking supply voltage comprising a combination of a second DC supply voltage and the amplified second envelope tracking signal, for receiving a second input signal to generate a second output signal”).
Accordingly, the instant application can’t claim benefits of an earlier filing date of provisional application 62662969 filed on April 26, 2018.
The effective filing date of the instant application is April 9, 2019.
Response to Arguments
Applicant’s arguments with respect to claims 21-23, 25-30, 32-35 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claims 21-22, 26-29, 33-35 are rejected under 35 U.S.C. 103 as being unpatentable over Watkins (US 2018/0102750) in view of Balteanu (US 2018/0138862).
As to claim 21, Watkins discloses a package, comprising: a first linear amplifier 8a (see at least paragraph [0037] which discloses that “Env Amp 8 is a linear amplifier”), for receiving a first envelope tracking signal (see envelope signal output from block 6a) to generate an amplified first envelope tracking signal; a second linear amplifier 8b (see at least paragraph [0037] which discloses that “Env Amp 8 is a linear amplifier”), for receiving a second envelope tracking signal (see envelope signal output from block 6b) to generate an amplified second envelope tracking signal; a first power amplifier RF PA 1), supplied by a first envelope tracking supply voltage V2 comprising a combination of a first DC supply voltage (see DC voltage at output of D1) and the amplified first envelope tracking signal (see output of Env Amp 8a), for receiving a first input signal S1 to generate a first output signal; and a second power amplifier RF PA 2, supplied by a second envelope tracking supply voltage V4 comprising a combination of a second DC supply voltage (see DC voltage at output of D2) and the amplified second envelope tracking signal (see output of Env Amp 8b), for receiving a second input signal S2 to generate a second output signal, wherein the first DC supply voltage is different from the second DC supply voltage (DC voltages at output of D1 and D2 are different).
Watkins fails to disclose a multi-input multi-output beamforming transmitter, wherein the first output signal is for a first antenna; and the second output signal is for a second antenna. Balteanu discloses a multi-input multi-output beamforming transmitter, wherein the first output signal is for a first antenna 430a; and the second output signal is for a second antenna 430b. See figure 4, paragraphs [0023], [0045], [0057]. Therefore, it would have been obvious, before the effective filing date of the claimed invention, to one of ordinary skill in the art to provide the above teaching of Balteanu to Watkins, in order to yield predictable results such as increasing communication coverages.
As to claims 22, 29, Watkins discloses that the first input signal and the second input signal are radio frequency (RF) signals (see paragraph [0038]), the first envelope tracking signal at least partially follows an envelope of the first input signal, and the second envelope tracking signal at least partially follows an envelope of the second input signal (see paragraphs [0044], [0045]).
As to claims 26, 33, Watkins discloses a supply voltage generator, for combining the first DC supply voltage and the amplified first envelope tracking signal to generate the first envelope tracking supply voltage. In this instance, “a supply voltage generator” reads on a common node in figure 7 which combines output of diode D1 and output of C1.
As to claims 27, 34, Watkins discloses a capacitor C1 coupled to an output terminal of the first linear amplifier 8a (see figure 7).
As to claim 28, it is rejected for similar reasons with respect to independent claim 21 as set forth above. Watkins further discloses that the first envelope tracking signal (output from block 6a) is different from the second envelope tracking signal (output from block 6b).
As to claim 35, it is rejected for similar reasons with respect to independent claim 21 as set forth above.
Claims 23, 30 are rejected under 35 U.S.C. 103 as being unpatentable over Watkins in view of Balteanu (US 2018/0138862) as applied to claims 21 and 28 above, and further in view of Balteanu (US 2018/0152945; hereinafter simply referred to as Balteanu’945).
As to claims 23, 30, Watkins disclose that the first DC supply voltage and the second DC supply voltage are provided by a power management circuit external to the circuits of figure 7 (in this instance, “a power management circuit” as claimed reads on a circuit which provides at least voltage V+); but fails to disclose that the power management circuit is a power management integrated circuit external to a package. Balteanu’945 discloses a power management integrated circuit 202 external to a package 201 (see paragraph [0033]). Therefore, it would have been obvious, before the effective filing date of the claimed invention, to one of ordinary skill in the art to provide the above teaching of Balteanu’945 to Watkins, in order to reduce the size, weight and implementing cost of the power management circuit.
Claims 25, 32 are rejected under 35 U.S.C. 103 as being unpatentable over Watkins in view of Balteanu (US 2018/0138862) as applied to claims 21, and 28 above, and further in view of Ishihara (US 2019/0131941).
As to claims 25, 32, Watkins fails to disclose that the first linear amplifier and the first power amplifier are within a first die, and the second linear amplifier and the second power amplifier are within the first die or a second die. Those skilled in the art would recognize that these claimed limitations do not involve any inventive concept. They merely depend on the locations of the first linear amplifier, the first power amplifier, the second linear amplifier, and the second power amplifier. In addition, the specification of the instant application fails to disclose any unexpected results obtained from the fact that the first linear amplifier and the first power amplifier are within a first die, and the second linear amplifier and the second power amplifier are within the first die or a second die. Ishihara teaches disposing plurality of amplifiers on a single die (see paragraph [0034]). Therefore, it would have been obvious, before the effective filling date of the claimed invention, to one of ordinary skill in the art to provide the above teaching of Ishihara, in order to yield predictable results such as reducing the size, weight, and implementing cost of the amplifiers.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
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/NGUYEN T VO/Primary Examiner, Art Unit 2646