Prosecution Insights
Last updated: April 19, 2026
Application No. 18/096,621

ACOUSTIC WAVE DEVICE

Non-Final OA §103
Filed
Jan 13, 2023
Examiner
ARMSTRONG, JONATHAN D
Art Unit
3645
Tech Center
3600 — Transportation & Electronic Commerce
Assignee
Murata Manufacturing Co. Ltd.
OA Round
3 (Non-Final)
52%
Grant Probability
Moderate
3-4
OA Rounds
3y 9m
To Grant
54%
With Interview

Examiner Intelligence

Grants 52% of resolved cases
52%
Career Allow Rate
218 granted / 415 resolved
+0.5% vs TC avg
Minimal +2% lift
Without
With
+1.5%
Interview Lift
resolved cases with interview
Typical timeline
3y 9m
Avg Prosecution
63 currently pending
Career history
478
Total Applications
across all art units

Statute-Specific Performance

§101
3.5%
-36.5% vs TC avg
§103
55.6%
+15.6% vs TC avg
§102
20.5%
-19.5% vs TC avg
§112
18.4%
-21.6% vs TC avg
Black line = Tech Center average estimate • Based on career data from 415 resolved cases

Office Action

§103
Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Continued Examination Under 37 CFR 1.114 A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on 1/13/2026 has been entered. Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 1-2, 8, 15, and 17 are rejected under 35 U.S.C. 103 as being unpatentable over Sato (JP 2020043442 A; search report), Oda (JP 2010147591 A), Nakamura (US 2004/0233020 A1). Regarding claim 1, Sato teaches an acoustic wave device, comprising: a support substrate [[0001] acoustic wave device having multiple piezoelectric substrates; [0020] fig. 1b, piezoelectric substrates 10 a and 10 b are bonded onto a support substrate 11]; a piezoelectric layer on the support substrate [[0002] ladder-type filter, it is known that a parallel resonator and a series resonator are provided on piezoelectric substrates; [0006] acoustic wave device comprising: a first piezoelectric substrate … a second piezoelectric substrate]; a functional electrode on the piezoelectric layer [[0029] series resonators S1 to S3 are connected in series, and the parallel resonators P1 and P2 are connected in parallel. One end of each of the parallel resonators P1 and P2 is connected to the ground terminal; [0022] traces … pads … metal layers … bumps … terminal 29 is electrically connected to acoustic wave resonators 20 a and 20 b via through electrode 28]; and Sato does not explicitly teach and Oda teaches a first electrode film and a second electrode film on the piezoelectric layer [[fig. (b)] shows signal wiring pattern #22 connected to electrode #20 and ground wiring pattern #23 on top of piezoelectric substrate #10], facing each other, and having different electric potentials from each other [[fig. (b)] where it is noted that a signal is a different electric potential from ground]; and the inter-electrode film region between the first electrode film and the second electrode film adjacent to each other is not provided with an electrode film [[fig. (b)] shows gap between signal pattern and ground pattern]. It would have been obvious to combine the multiple substrates as taught by Sato, with the signal and ground wiring patterns as taught by Oda so that the interdigital electrodes may be provided with input/output signals. Sato does not explicitly teach and yet Nakamura teaches wherein when a region between the first electrode film and the second electrode film adjacent to each other in a plan view is defined as an inter-electrode film region [[fig. 19] shows region with thin film F3], and a region overlapping with the first electrode film or the second electrode film in a plan view is defined as an electrode film underlying region [[fig. 19] shows regions Cf1 and Cf2], a thickness of the piezoelectric layer in at least a portion of the inter- electrode film region is smaller than a thickness of the piezoelectric layer in the electrode film underlying region [[fig. 20] [0135] inventor made the following assumption about parasitic capacitances occurring between the electrode E1 and an electrode E2 when the thin film F is not formed between the substrate S and the electrodes E1 and E2 as shown in FIG. 20. Here, FIG. 20 is an explanatory drawing showing parasitic capacitances when the thin film F is not formed between the substrate S and the electrodes E1 and E2 according to Embodiment 1 of the present invention.]. It would have been obvious to modify the film placed between electrodes as taught by Sato, so that the film is either formed or not formed between the electrodes so that parasitic capacitance can be adjusted to tune the filter (Nakamura) [[0005][0033]]. Regarding claim 2, Sato teaches the acoustic wave device according to Claim 1, wherein the piezoelectric layer is not provided in at least a portion of the inter-electrode film region [[figs. 7-10] and representative fig. 10 show a gradual tapering denoted by θa and θb so that there is no piezoelectric layer provided on top of the middle of the substrate #11]. Regarding claim 8, Sato teaches the acoustic wave device according to Claim 1, wherein the piezoelectric layer is made of lithium niobate or lithium tantalate [[0014] first piezoelectric substrate and the second piezoelectric substrate can be a rotated Y-cut X-propagation lithium tantalate substrate or a rotated Y-cut X-propagation lithium niobate substrate, and a Y-cut angle of the first piezoelectric substrate and a Y-cut angle of the second piezoelectric substrate can be different]. Regarding claim 15, Sato teaches the acoustic wave device according to Claim 1, wherein the acoustic wave device is a filter device [[0002] ladder type filter] including multiple acoustic wave resonators [[0012] one or more series resonators … one or more parallel resonators]; each of the multiple acoustic wave resonators includes the functional electrode, each of the functional electrodes is an IDT electrode [[0025] acoustic wave resonators 20 a and 20 b each include an IDT 18], each of the IDT electrodes includes one pair of busbars having different electric potentials from each other [[fig. 2] shows multiple bus bars #15 with electrodes between]; the first electrode film is connected to the busbar of one acoustic wave resonator of the acoustic wave resonators adjacent to each other [[fig. 2] shows finger electrodes #14 attached to one side bus bar #15], and the second electrode film is connected to the busbar of another acoustic wave resonator of the acoustic wave resonators adjacent to each other [[fig. 2] shows finger electrodes #14 attached to other side bus bar #15]; and the inter-electrode film region is between the busbar to which the first electrode film is connected and the busbar to which the second electrode film is connected [[figs. 7-10]]. Regarding claim 17, Sato teaches the acoustic wave device according to Claim 1, wherein the support substrate is a silicon substrate [[0020] support substrate 11 is, for example, a sapphire substrate, a spinel substrate, a silicon substrate, a quartz substrate, a quartz substrate, or an alumina substrate]. Claims 3 and 5-6 are rejected under 35 U.S.C. 103 as being unpatentable over Sato (JP 2020043442 A), Oda (JP 2010147591A), and Nakamura (US 2004/0233020 A1) as applied to claim 2 above, and further in view of Kishimoto (US 2019/0238114 A1; search report). Regarding claim 3, Sato does not explicitly teach and yet Kishimoto teaches the acoustic wave device according to Claim 2, wherein a recess is provided in the support substrate in at least a portion of the inter-electrode film region [[fig. 2c] shows piezoelectric layer #4 to left and right of grooves #10a, 10b, 10c]. It would have been obvious to a person having ordinary skill in the art prior to the effective filing date of the invention to combine the tapered piezoelectric layer in the middle as taught by Sato, with the gap/groove in the middle of the substrate under the piezoelectric layer as taught by Kishimoto so that elastic waves that travel in the propagation direction or different directions do not leak outside the elastic wave device (Kishimoto) [[0005]]. Regarding claim 5, Sato does not explicitly teach and yet Kishimoto teaches the acoustic wave device according to Claim 1, further comprising a dielectric film in at least a portion of the inter- electrode film region [note: see claim 6 below for candidate dielectric film materials; [figs. 2b-2c]; [0068] intermediate layer #3 preferably includes an SiO2 layer, for example. Of course, other than SiO2, silicon nitride, aluminum nitride, or other suitable materials, may be used for the intermediate layer 3. These materials may be used alone or may be used in combination]. It would have been obvious to a person having ordinary skill in the art prior to the effective filing date of the invention to combine the tapered piezoelectric layer in the middle as taught by Sato, with the intermediate film layer made from silicon oxide, silicon nitride, or other suitable materials as taught by Kishimoto so that elastic waves that travel in the propagation direction or different directions do not leak outside the elastic wave device (Kishimoto) [[0011--0012]]. Regarding claim 6, Sato does not explicitly teach and yet Kishimoto teaches the acoustic wave device according to Claim 5, wherein the dielectric film is made of silicon oxide, silicon nitride, or resin [[0068] intermediate layer #3 preferably includes an SiO2 layer, for example. Of course, other than SiO2, silicon nitride, aluminum nitride, or other suitable materials, may be used for the intermediate layer 3. These materials may be used alone or may be used in combination]. It would have been obvious to a person having ordinary skill in the art prior to the effective filing date of the invention to combine the tapered piezoelectric layer in the middle as taught by Sato, with the intermediate film layer made from silicon oxide, silicon nitride, or other suitable materials as taught by Kishimoto so that elastic waves that travel in the propagation direction or different directions do not leak outside the elastic wave device (Kishimoto) [[0011-0012]]. Claim 14 is rejected under 35 U.S.C. 103 as being unpatentable over Sato (JP 2020043442 A), Oda (JP 2010147591A), and Nakamura (US 2004/0233020 A1) as applied to claim 1 above, and further in view of Meltaus (US 2013/0057360 A1; search report). Regarding claim 14, Sato does not explicitly teach and yet Meltaus teaches the acoustic wave device according to Claim 1, wherein the piezoelectric layer includes a first main surface and a second main surface opposed to each other; the first electrode film and the second electrode film are on the first main surface [note: compare to instant fig. 14 showing upper electrode #51a and lower electrode #51b; [fig. 4] shows electrodes #41 and #42]; the functional electrode includes an upper electrode on the first main surface [electrodes/ports #41 and #42 on top side] and a lower electrode provided on the second main surface [bottom electrode #44]; and the upper electrode and the lower electrode face each other [[fig. 4] shows that #41, #42, and #44 overlap or in other words face each other]. It would have been obvious to a person having ordinary skill in the art prior to the effective filing date of the invention to combine the tapered piezoelectric layer in the middle as taught by Sato, with the top and bottom electrode as taught by Meltaus so that the desired filter passband may be chosen (Meltaus) [[abstract]]. Response to Arguments Applicant’s arguments, see pgs. 7-13, filed 1/13/2026, with respect to the rejection(s) of claim(s) 1 under 35 U.S.C 103 have been fully considered and are persuasive. Therefore, the rejection has been withdrawn. However, upon further consideration, a new ground(s) of rejection is made in view of Oda (JP 2010147591A). Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to JONATHAN D ARMSTRONG whose telephone number is (571)270-7339. The examiner can normally be reached M - F 9am-5pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Isam Alsomiri can be reached on 571-272-6970. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /JONATHAN D ARMSTRONG/ Examiner, Art Unit 3645
Read full office action

Prosecution Timeline

Jan 13, 2023
Application Filed
Apr 18, 2025
Non-Final Rejection — §103
Jul 18, 2025
Response Filed
Aug 28, 2025
Final Rejection — §103
Dec 01, 2025
Interview Requested
Dec 08, 2025
Examiner Interview Summary
Dec 08, 2025
Applicant Interview (Telephonic)
Dec 10, 2025
Response after Non-Final Action
Dec 13, 2025
Request for Continued Examination
Jan 14, 2026
Interview Requested
Jan 14, 2026
Response after Non-Final Action
Jan 21, 2026
Non-Final Rejection — §103
Jan 21, 2026
Applicant Interview (Telephonic)
Apr 01, 2026
Interview Requested
Apr 09, 2026
Applicant Interview (Telephonic)
Apr 10, 2026
Examiner Interview Summary

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

3-4
Expected OA Rounds
52%
Grant Probability
54%
With Interview (+1.5%)
3y 9m
Median Time to Grant
High
PTA Risk
Based on 415 resolved cases by this examiner. Grant probability derived from career allow rate.

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