DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claim(s) 1, 3-8 is/are rejected under 35 U.S.C. 103 as being unpatentable over Terada et al. (US 2005/0232324) in view of Kunimasa (US 2006/0239318).
With respect to claim 1, Terada teaches a semiconductor light emitting device (fig.1/6/17) comprising: a semiconductor light emitting element that emits light (fig.1, abstract); and a submount (fig.6 #200) that includes a mounting surface (fig.6 top of #200) on which the semiconductor light emitting element is mounted via a bonding material (fig.6 #50), wherein the semiconductor light emitting element includes: a semiconductor multilayer structure (fig.24/25) that includes: an opposite surface (fig.6 lower side of #10) opposite the mounting surface; and an emission surface which is located at an end portion of the opposite surface and emits the light (fig.1/6 emission from #12); and one or more mounting electrodes (fig.24/25 #31 on central ridge #12) that are arranged on the opposite surface of the semiconductor multilayer structure and extend in a direction of emission of the light (ridge #12 extends in emission direction as seen in fig.17), one or more grooves (fig.17 #16s on either side of central ridge #12) are formed in the opposite surface of the semiconductor multilayer structure to extend along the one or more mounting electrodes in the direction of emission. Terada further teaches protrusion/steps (fig.17 #14) along with the grooves to be used for control during a solder bonding process ([0052]), but does not teach the emission surface is located outside of an end portion of the mounting surface, or a first distance between the emission surface and the one or more grooves is greater than zero and less than a second distance between the emission surface and the mounting surface. Kunimasa teaches a related semiconductor light emitter (abstract), which is mounted atop a base (fig.2 #115) and which emission surface is located outside of an end portion of the mounting surface (fig.2 #150a past mount edge), grooves formed between the emitter and mount (fig.1/3 lower/thinner portions in electrode layer) and a first distance between the emission surface and one or more grooves is greater than zero (fig.2 based on the ‘step gap’ spacing the groove from the emission end, [0070] and less than a second distance between the emission surface and the mounting surface (fig.2 emission surface slightly further from the mount surface than the groove based on the solder layer #114 being therebetween at the front edge face of the mount). It would have been obvious to one of ordinary skill in the art before the filing of the instant application to adapt the end most portion of the protrusions/steps (fig.17 #14) of Terada to make use of the ‘step gap’ type structure with positioning as taught by Kunimasa, thereby achieving the emission surface is located outside of an end portion of the mounting surface, or a first distance between the emission surface and the one or more grooves is greater than zero and less than a second distance between the emission surface and the mounting surface, in order to prevent the light face from being interrupted by both the mount and the solder as well as to facilitate better cooling of the emitter (Kunimasa, [0070-71]).
With respect to claim 3, Terada, as modified, teaches the semiconductor multilayer structure includes: a substrate (fig.24 #21); a first semiconductor layer of a first conductivity type (fig.24 #22, n-type, [0100]) arranged above the substrate; a light emitting layer (fig.24 #24) arranged above the first semiconductor layer; and a second semiconductor layer of a second conductivity type (fig.24 #26/28, p-type, [0100]) different from the first conductivity type, the second semiconductor layer being arranged above the light emitting layer, and the one or more mounting electrodes (fig.24 #31) are arranged above the second semiconductor layer.
With respect to claim 4, Terada, as modified, teaches the one or more mounting electrodes include a first mounting electrode (fig.24/17 #31 on central ridge), the one or more grooves include a first groove adjacent to the first mounting electrode (fig.17 groove #16 to left of central ridge), and an average distance in a direction perpendicular to the direction of emission between the first mounting electrode and a part of the first groove adjacent to the first mounting electrode in the direction perpendicular to the direction of emission is less than an average distance in the direction perpendicular to the direction of emission between the first mounting electrode and a part of the first groove located closer to the emission surface than the first mounting electrode (as seen in fig.17 electrode-groove spacing increases towards emission surface near label L, while decreasing further away).
With respect to claims 5 and 6, Terada teaches the device outlined above, but does not teach a side wall of each of the one or more grooves includes a layer that has higher wettability to the bonding material than the semiconductor multilayer structure, wherein the side wall of each of the one or more grooves includes an Au layer. Kunimasa further teaches the material between the solder and semiconductor emitter is of Au ([0083]). It would have been obvious to one of ordinary skill in the art before the filing of the instant application to adapt the device of Terada to make use of an Au layer on the sidewalls of the grooves as demonstrated by Kunimasa in order to better sink heat from the emitter using metallic materials connecting to the solder and thereby the mount.
With respect to claim 7, Terada, as modified, teaches in each of the one or more grooves, one or more projecting portions are formed (fig.17 projecting portions #14 formed within grooves #16).
With respect to claim 8, Terada, as modified, teaches the device outlined above, but does not teach the one or more mounting electrodes comprise a plurality of mounting electrodes, and the one or more grooves comprise a plurality of grooves. The Examiner takes Official Notice that forming arrays of laser diodes by duplicating the structure of a laser diode is well known in the art in order to provide higher output power. Therefore, it would have been obvious to one of ordinary skill in the art to have modified Terada in order to make use of multiple grooves and mounting electrodes by duplicating the device of Terada and Kunimasa to have multiple emitters on the mount in order to provide a higher output power device (see also MPEP 2144.04 VI B).
Allowable Subject Matter
Claim 2 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Claim 2 further outlines the position of the emission to mount surface compared to the position of the emission surface to mounting electrodes, which was not found to be taught or suggested by the prior art.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to TOD THOMAS VAN ROY whose telephone number is (571)272-8447. The examiner can normally be reached M-F: 8AM-430PM.
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/TOD T VAN ROY/Primary Examiner, Art Unit 2828