Prosecution Insights
Last updated: May 29, 2026
Application No. 18/099,560

EARLY DETERMINATION TRAINING ACCELERATOR BASED ON TIMESTEP SPLITTING OF SPIKING NEURAL NETWORK AND OPERATION METHOD THEREOF

Final Rejection §103§112
Filed
Jan 20, 2023
Priority
Jan 24, 2022 — RE 10-2022-0009753 +1 more
Examiner
HADDAD, MAJD MAHER
Art Unit
2125
Tech Center
2100 — Computer Architecture & Software
Assignee
Korea University Research And Business Foundation
OA Round
2 (Final)
100%
Grant Probability
Favorable
3-4
OA Rounds
1m
Est. Remaining
99%
With Interview

Examiner Intelligence

Grants 100% — above average
100%
Career Allowance Rate
2 granted / 2 resolved
+45.0% vs TC avg
Minimal +0% lift
Without
With
+0.0%
Interview Lift
resolved cases with interview
Typical timeline
3y 5m
Avg Prosecution
13 currently pending
Career history
21
Total Applications
across all art units

Statute-Specific Performance

§101
10.3%
-29.7% vs TC avg
§103
79.3%
+39.3% vs TC avg
Black line = Tech Center average estimate • Based on career data from 2 resolved cases

Office Action

§103 §112
Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claims 1-4 and 6-13 are presented for examination. Information Disclosure Statement The information disclosure statement (IDS) submitted on June 4, 2025 was filed. The submission is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner. Response to Arguments Applicant’s arguments, see Pages 3-7 and 13-14, filed February 10th, 2026, with respect to claim objections, 112(d), 35 U.S.C. 101, and Double Patenting rejections have been fully considered and are persuasive. The objections of claims 4-6 and 10-13, 35 U.S.C 101 rejection of claims 1-4 and 6-13, 112(d) of claim 5, and Double Patenting rejection of claims 1-4 and 6-7 has been withdrawn. Applicant’s arguments with respect to the remaining rejections are not persuasive for the following reasons: Response to 35 U.S.C 112(f) invocation: Applicant argues that each alleged 112(f) invocation recites sufficient structure, thus stating that there is no invocation for claims 8 and 10 (Page 1 Remarks). Applicant’s arguments have been considered but are not persuasive. Each limitation is analyzed individually under the three-prong test. Claim 8: “an input layer module”: Prong 1 (Function): Recites receiving an input spike signal (Functional) Prong 2 (Means or Equivalence): “into which…” (Condition met; therefore is the equivalent of means) Prong 3 (Structure): module is a generic term; the specification only describes the function of receiving input without structural implementation. “hidden layer module”: Prong 1 (Function): Recites receiving an input spike signal (Functional) Prong 2 (Means or Equivalence): “configured to…” (Condition met) Prong 3 (Structure): module is a generic term; the specification describes subcomponents in functional terms without structural detail. “an output layer module”: Prong 1 (Function): Recites receiving an input spike signal (Functional) Prong 2 (Means or Equivalence): “configured to…” (Condition met) Prong 3 (Structure): module is a generic; specification merely restates functions and lists sub-units defined functionally. “global controller”: Prong 1 (Function): Recites executing termination operations (Functional) Prong 2 (Means or Equivalence): “configured to…” (Condition met) Prong 3 (Structure): controller is a generic; specification restates functions, no structure. Claim 10: “a membrane potential update module”: Prong 1 (Function): Recites receiving an input spike signal (Functional) Prong 2 (Means or Equivalence): “configured to…” (Condition met) Prong 3 (Structure): module is a generic; specification describes operation but not structural implementation. “a weight update module”: Prong 1 (Function): Recites adding weights of input spike signals (Functional) Prong 2 (Means or Equivalence): “configured to…” (Condition met) Prong 3 (Structure): module is a generic; specification describes operation but not structural implementation. “an error calculation unit” Prong 1 (Function): Recites calculating a difference (Functional) Prong 2 (Means or Equivalence): “configured to…” (Condition met) Prong 3 (Structure): unit is a generic; specification restates function. “an early determination unit”: Prong 1 (Function): Recites determining training contribution (Functional) Prong 2 (Means or Equivalence): “configured to…” (Condition met) Prong 3 (Structure): unit is a generic; specification describes only the result of the determination. “threshold calculation unit”: Prong 1 (Function): Recites calculating a threshold value (Functional) Prong 2 (Means or Equivalence): “configured to…” (Condition met) Prong 3 (Structure): unit is a generic; equations are disclosed but describe the result of the calculation rather than a structural implementation or algorithm tied to a specific structure. Applicant’s reliance on Apex Inc. v. Raritan and Watts v. XL Sys. are not persuasive because the generic terms such as “module” and “unit” do not provide sufficient structure. Figure 7 and the specification merely depict functional block diagrams and do not provide structural detail. Therefore, the limitations are properly interpreted under 35 U.S.C. 112(f). Response to 112(a): Applicant argues that the specification and drawings provide sufficient written description and enablement because it discloses the functions of the claimed modules, units, and controller in the figures and specification. Applicant’s arguments are not persuasive. The specification merely provides functional descriptions and block diagrams (e.g., FIG. 7) without disclosing specific structural implementation or algorithms for performing the claimed functions. The specification shows that the disclosed equations describe only the results of calculations, not their implementation. Paragraphs 51-52 of the instant specification defines the threshold, and paragraphs 60-62 define the termination condition. However, the “threshold calculation unit and the “early determination unit” are described functionally without any algorithm or structural detail explaining how these computations are performed. Response to 35 U.S.C 112(b): Applicant addressed the first antecedent issue but failed to address the 112(f) invocations. The rejection under 35 U.S.C 112(b) is maintained. Response to 35 U.S.C 103: In regards to claim 1, Applicant argues that the cited references fail to teach several limitations of amended claim 1 including (1) a timestep splitting operation, (2) measuring first and second membrane potentials for each splitted timestep, (3) calculating a threshold value based on the membrane potentials for use in a subsequent training process, and (5) a global controller configured to terminate training in real time. However, these arguments are not persuasive. With respect to the time splitting operation, Applicant argues that prior art spiking neural networks treat a timestep as a unitary propagation interval and do not subdivide timesteps. However, Akopyan explicitly teaches subdividing a timestep into multiple sub-timesteps, during which spike delivery and neuron updates occur. See Paragraphs 29 and 65 of Akopyan that teaches the operation of splitting a timestep into different sub-timesteps. Under broadest reasonable interpretation, Akopyan still reasonably teaches the limitation. Regarding the membrane potential measuring operation, Applicant argues that the cited references do not measure two membrane potentials per sub-timestep. The argument is not persuasive because Akopyan teaches storing and processing membrane potential values associated with each sub-timestep, which under broadest reasonable interpretation, maps accordingly to the limitation. See Paragraph 43 of Akopyan which states, “The T sets of neuron membrane potentials 516 comprise neuron membrane potentials for the of electronic neurons of a neural core circuit 100 such that each of the T partitions stores neuron membrane potentials for the plurality of electronic neurons for one of the T sub-timesteps.” With respect to the threshold value calculation operation, Applicant argues that the prior art references do not calculate a threshold value for early training termination based on membrane potentials. The argument is moot because the new reference Uma teaches comparing the difference between neuron excitation values against a threshold, and McDanel teaches the early exit neural networks strategy. Applicant argues that the cited references do not disclose early termination of training within a timestep where the global controller is capable of terminating the training process. The argument is not persuasive because with the combination of Akopyan’s global controller (controlling neural computation within the neurosynaptic core) and splitted timestep and McDanel’s early exit neural network strategy of terminating training, one can easily combine the teachings of the two to perform the required limitation of terminating the training process within the splitted timestep by a global controller. Response to Claim 8 Arguments: Applicant argues that the cited references are algorithmic and do not disclose a hardware architecture including input, hidden, and output layer modules. The argument is not persuasive. Basu teaches a neural network architecture including input, hidden, and output layers that process neural signals. Applying a known neural network structure (the layers) within a neurosynaptic hardware accelerator would have been obvious to combine. The claim recites “modules”, which can be a software or hardware module. Applicant argues that the prior art does not determine whether an input image has training contribution. The argument is not persuasive. Zhang teaches identifying portions of training images that do not contribute to the training objective and excludes those images from the training process. Applicant argues that none of the references disclose a global controller. The argument is not persuasive. Akopyan discloses a controller configured to manage neural processing and computation operations within a neurosynaptic core. Akopyan teaches a controller that multiplexes computation and controls logic for multiple neurons within the neural core circuit from Paragraph 27. Controllers in neurosynaptic core architectures are responsible for managing the system execution, thus is considered as a global controller. Applicant argues that the prior art does not perform real-time comparison and termination within split timesteps. The argument is not persuasive. Akopyan teaches performing neural processing within sub-timesteps where the neuron states and spike events are evaluated during each sub-timestep. Applicant argues that the claimed invention produces unexpected improvements such as reduced training time and energy consumption. However, Applicant has not provided any evidence demonstrating that these alleged improvements are unexpected relative to the prior art. Therefore, the argument is not persuasive. See MPEP § 716.02(c). Claim Interpretation The following is a quotation of 35 U.S.C. 112(f): (f) Element in Claim for a Combination. – An element in a claim for a combination may be expressed as a means or step for performing a specified function without the recital of structure, material, or acts in support thereof, and such claim shall be construed to cover the corresponding structure, material, or acts described in the specification and equivalents thereof. The following is a quotation of pre-AIA 35 U.S.C. 112, sixth paragraph: An element in a claim for a combination may be expressed as a means or step for performing a specified function without the recital of structure, material, or acts in support thereof, and such claim shall be construed to cover the corresponding structure, material, or acts described in the specification and equivalents thereof. The claims in this application are given their broadest reasonable interpretation using the plain meaning of the claim language in light of the specification as it would be understood by one of ordinary skill in the art. The broadest reasonable interpretation of a claim element (also commonly referred to as a claim limitation) is limited by the description in the specification when 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, is invoked. As explained in MPEP § 2181, subsection I, claim limitations that meet the following three-prong test will be interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph: (A) the claim limitation uses the term “means” or “step” or a term used as a substitute for “means” that is a generic placeholder (also called a nonce term or a non-structural term not having specific structural meaning) for performing the claimed function; (B) the term “means” or “step” or the generic placeholder is modified by functional language, typically, but not always linked by the transition word “for” (e.g., “means for”) or another linking word or phrase, such as “configured to” or “so that”; and (C) the term “means” or “step” or the generic placeholder is not modified by sufficient structure, material, or acts for performing the claimed function. Use of the word “means” (or “step”) in a claim with functional language creates a rebuttable presumption that the claim limitation is to be treated in accordance with 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph. The presumption that the claim limitation is interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, is rebutted when the claim limitation recites sufficient structure, material, or acts to entirely perform the recited function. Absence of the word “means” (or “step”) in a claim creates a rebuttable presumption that the claim limitation is not to be treated in accordance with 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph. The presumption that the claim limitation is not interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, is rebutted when the claim limitation recites function without reciting sufficient structure, material or acts to entirely perform the recited function. Claim limitations in this application that use the word “means” (or “step”) are being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, except as otherwise indicated in an Office action. Conversely, claim limitations in this application that do not use the word “means” (or “step”) are not being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, except as otherwise indicated in an Office action. This application includes one or more claim limitations that do not use the word “means,” but are nonetheless being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, because the claim limitation(s) uses a generic placeholder that is coupled with functional language without reciting sufficient structure to perform the recited function and the generic placeholder is not preceded by a structural modifier. Such claim limitation(s) is/are: “an input layer module” in claim 8 “hidden layer module” in claim 8 “an output layer module” in claim 8 “global controller” in claim 8 “a membrane potential update module” in claim 10 “a weight update module” in claim 10. “an error calculation unit” in claim 10 “an early determination unit” in claim 10 “threshold calculation unit” in claim 10 Regarding all invocations of 112f, see rejections under 35 USC 112(a)-(b) infra. Because this/these claim limitation(s) is/are being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, it/they is/are being interpreted to cover the corresponding structure described in the specification as performing the claimed function, and equivalents thereof. If applicant does not intend to have this/these limitation(s) interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, applicant may: (1) amend the claim limitation(s) to avoid it/them being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph (e.g., by reciting sufficient structure to perform the claimed function); or (2) present a sufficient showing that the claim limitation(s) recite(s) sufficient structure to perform the claimed function so as to avoid it/them being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph. Claim Rejections - 35 USC § 112 The following is a quotation of the first paragraph of 35 U.S.C. 112(a): (a) IN GENERAL.—The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor or joint inventor of carrying out the invention. The following is a quotation of the first paragraph of pre-AIA 35 U.S.C. 112: The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor of carrying out his invention. Claims 8-13 are rejected under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-AIA ), first paragraph, as failing to comply with the written description requirement. The claim(s) contains subject matter which was not described in the specification in such a way as to reasonably convey to one skilled in the relevant art that the inventor or a joint inventor, or for applications subject to pre-AIA 35 U.S.C. 112, the inventor(s), at the time the application was filed, had possession of the claimed invention. Claim limitations “input layer module”, “hidden layer module”, “output layer module”, “membrane potential update module”, “weight update module”, “error calculation unit”, “early determination unit”, and “threshold calculation unit” invoke 35 U.S.C 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph. However, the written description fails to disclose the corresponding structure, material, or acts for performing the entire claimed function and to clearly link the structure, material, or acts to the function. The scope of these functional limitations, therefore, encompasses any and all software that performs the claimed functions, without limitation to a specific disclosed structure or algorithm. Therefore, it is unclear whether Applicant had possession of the claimed inventions as of the effective filing date. See rejection under 35 USC 112(b) infra for further analysis. The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph: The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention. Claims 8-13 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention. Claim limitation “input layer module” invokes 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph. However, the written description fails to disclose the corresponding structure, material, or acts for performing the entire claimed function and to clearly link the structure, material, or acts to the function. At most, the functions of the limitations are described in paragraphs 71, 72, 74, and 83, which lists the module as a black box that does not explain how the function is being performed, and offers no sufficient corresponding structure (hardware and algorithm). The scope of this functional limitation, therefore, encompasses any and all software that performs the claimed functions, without limitation to a specific disclosed structure or algorithm. Therefore, the claim is indefinite and is rejected under 35 U.S.C. 112(b) or pre-AIA 35 U.S.C. 112, second paragraph. Claim limitation “hidden layer module” invokes 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph. However, the written description fails to disclose the corresponding structure, material, or acts for performing the entire claimed function and to clearly link the structure, material, or acts to the function. At most, the function of the hidden layer module is described in paragraph 13, which describes a membrane potential update module and weight update module without providing any algorithm, circuit, processor, or other structural detail showing how the claimed functions are carried out. The scope of this functional limitation, therefore, encompasses any and all software that performs the claimed functions, without limitation to a specific disclosed structure or algorithm. Therefore, the claim is indefinite and is rejected under 35 U.S.C. 112(b) or pre-AIA 35 U.S.C. 112, second paragraph. Claim limitation “output layer module” invokes 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph. However, the written description fails to disclose the corresponding structure, material, or acts for performing the entire claimed function and to clearly link the structure, material, or acts to the function. At most, the function of the output layer module is described in paragraph 14, which describes a membrane potential update module and weight update module without providing any algorithm, circuit, processor, or other structural detail showing how the claimed functions are carried out. The scope of this functional limitation, therefore, encompasses any and all software that performs the claimed functions, without limitation to a specific disclosed structure or algorithm. Therefore, the claim is indefinite and is rejected under 35 U.S.C. 112(b) or pre-AIA 35 U.S.C. 112, second paragraph. Claim limitation “membrane potential update module” invokes 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph. However, the written description fails to disclose the corresponding structure, material, or acts for performing the entire claimed function and to clearly link the structure, material, or acts to the function. At most, the function of the membrane potential update module is described in paragraphs 73-75 and 82-84, which describes receiving input spike signal and calculating membrane potentials, without providing any algorithm, circuit, processor, or other structural detail showing how the claimed functions are carried out. The scope of this functional limitation, therefore, encompasses any and all software that performs the claimed functions, without limitation to a specific disclosed structure or algorithm. Therefore, the claim is indefinite and is rejected under 35 U.S.C. 112(b) or pre-AIA 35 U.S.C. 112, second paragraph. Claim limitation “a weight update module” invokes 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph. However, the written description fails to disclose the corresponding structure, material, or acts for performing the entire claimed function and to clearly link the structure, material, or acts to the function. At most, the function of the membrane potential update module is described in paragraphs 76-78 and 87, which describes adding weights of input spikes and transmitting weight information, without providing any algorithm, circuit, processor, or other structural detail showing how the claimed functions are carried out. The scope of this functional limitation, therefore, encompasses any and all software that performs the claimed functions, without limitation to a specific disclosed structure or algorithm. Therefore, the claim is indefinite and is rejected under 35 U.S.C. 112(b) or pre-AIA 35 U.S.C. 112, second paragraph. Claim limitation “an error calculation unit” invokes 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph. However, the written description fails to disclose the corresponding structure, material, or acts for performing the entire claimed function and to clearly link the structure, material, or acts to the function. At most, the function of the membrane potential update module is described in paragraph 93, which describes calculating an error and transmitting the calculation result to the weight update module, without providing any algorithm, circuit, processor, or other structural detail showing how the claimed functions are carried out. The scope of this functional limitation, therefore, encompasses any and all software that performs the claimed functions, without limitation to a specific disclosed structure or algorithm. Therefore, the claim is indefinite and is rejected under 35 U.S.C. 112(b) or pre-AIA 35 U.S.C. 112, second paragraph. Claim limitation “an early determination unit” invokes 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph. However, the written description fails to disclose the corresponding structure, material, or acts for performing the entire claimed function and to clearly link the structure, material, or acts to the function. At most, the function of the membrane potential update module is described in paragraphs 88-90, which describes determining an image having training contribution and transmitting the determination result to the global controller, without providing any algorithm, circuit, processor, or other structural detail showing how the claimed functions are carried out. The scope of this functional limitation, therefore, encompasses any and all software that performs the claimed functions, without limitation to a specific disclosed structure or algorithm. Therefore, the claim is indefinite and is rejected under 35 U.S.C. 112(b) or pre-AIA 35 U.S.C. 112, second paragraph. Claim limitation “threshold calculation unit” invokes 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph. However, the written description fails to disclose the corresponding structure, material, or acts for performing the entire claimed function and to clearly link the structure, material, or acts to the function. At most, the function of the membrane potential update module is described in paragraphs 14 and 81, which describes calculating a threshold value used in subsequent training, without providing any algorithm, circuit, processor, or other structural detail showing how the claimed functions are carried out. The scope of this functional limitation, therefore, encompasses any and all software that performs the claimed functions, without limitation to a specific disclosed structure or algorithm. Therefore, the claim is indefinite and is rejected under 35 U.S.C. 112(b) or pre-AIA 35 U.S.C. 112, second paragraph. Applicant may: (a) Amend the claim so that the claim limitation will no longer be interpreted as a limitation under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph; (b) Amend the written description of the specification such that it expressly recites what structure, material, or acts perform the entire claimed function, without introducing any new matter (35 U.S.C. 132(a)); or (c) Amend the written description of the specification such that it clearly links the structure, material, or acts disclosed therein to the function recited in the claim, without introducing any new matter (35 U.S.C. 132(a)). If applicant is of the opinion that the written description of the specification already implicitly or inherently discloses the corresponding structure, material, or acts and clearly links them to the function so that one of ordinary skill in the art would recognize what structure, material, or acts perform the claimed function, applicant should clarify the record by either: (a) Amending the written description of the specification such that it expressly recites the corresponding structure, material, or acts for performing the claimed function and clearly links or associates the structure, material, or acts to the claimed function, without introducing any new matter (35 U.S.C. 132(a)); or (b) Stating on the record what the corresponding structure, material, or acts, which are implicitly or inherently set forth in the written description of the specification, perform the claimed function. For more information, see 37 CFR 1.75(d) and MPEP §§ 608.01(o) and 2181. Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows: 1. Determining the scope and contents of the prior art. 2. Ascertaining the differences between the prior art and the claims at issue. 3. Resolving the level of ordinary skill in the pertinent art. 4. Considering objective evidence present in the application indicating obviousness or nonobviousness. This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention. Claim 1 is rejected under 35 U.S.C. 103 as being unpatentable over Akopyan US (20170286825 A1), McDanel (“BranchyNet: Fast inference via early exiting from deep neural networks”, 2016), Zuo (CN 111275004 A) and Uma (JP H05274289 A). Regarding claim 1, Akopyan teaches [a] method (Para 0005 of Akopyan, a computer-implemented method for multiplexing a neural core circuit) …a timestep splitting, the method comprising: a timestep splitting operation of splitting a timestep (Paragraph 29 of kopyan, “Further, the memory 110a may be divided into T partitions. Each of the T partitions may be associated with a corresponding one of T sub-timesteps of a timestep.”, See Para 0065, “In one embodiment, the multiplexed neurosynaptic multiplexed core 610 may operate in the following manner. Synchronously, within each of T sub-timesteps (from sub-timestep 0 to sub-timestep T−1), each axon it is checked to determine whether the axon has a spike that needs to be delivered…” Akopyan teaches dividing a timestep into T sub-timesteps, where neuron and axon processing takes place during each sub-timestep.) a membrane potential measuring operation of measuring first and second membrane potentials for each splitted timestep during a current training process (Paragraph 24, “Each synapse 31 communicates firing events (e.g., spike events) between an axon 15 and a neuron 11”, Para 0025, “A learning rule such as spike-timing dependent plasticity (STDP) may be applied to update the synaptic weights of the synapses 31.”, Para 0037 “For each entry, after all spikes are integrated and the leak rate is applied, a comparator may determine whether the modified membrane potential variable exceeds a threshold parameter Th maintained in said entry.”, Paragraph 36, “An adder may add the neuron parameter selected by the multiplexer to a membrane potential variable selected by another multiplexer. For each entry, the other multiplexer may select the , membrane potential variable V maintained in said entry for the first addition.”, Paragraph 43, “The T sets of neuron membrane potentials 516 comprise neuron membrane potentials for the… electronic neurons for one of the T sub-timesteps.” Akopyan stores and updates membrane potential variables for neurons during each sub-timestep and performs spike and leak operations. The updates require accessing the values of the membrane potentials at different points in the timestep. Akopyan teaches this limitation as the membrane potential before and after the spike integration corresponds to the first and second membrane potentials measure for each splitted timestep during a training process. The process of using a STDP learning rule further teaches the calculation that occurs between 2 different neurons to determine how to update the strength of their connection.) a threshold value calculation operation of calculating a threshold value to be used in a subsequent training process based on the first and second membrane potentials (“A learning rule such as spike-timing dependent plasticity (STDP) may be applied to update the synaptic weights of the synapses 31.”, Paragraph 37 of Akopyan, “For each entry, after all spikes are integrated and the leak rate is applied, a comparator may determine whether the modified membrane potential variable exceeds a threshold parameter Th maintained in said entry. If the threshold parameter Th is exceeded, the encoder may generate a spike” Akopyan teaches comparing a neuron’s membrane potential to a threshold parameter after the spike integration and leak are applied.) executed by a global controller (Paragraph 27 of Akopyan, “Further, the core circuit 100 multiplexes one or more of computation and control logic for multiple neurons 11. The core circuit 100 includes… a controller (i.e., a processing and computation logic circuit)” Akopyan teaches a controller that multiplexes computation and controls logic for multiple neurons within the neural core circuit.) Akopyan does not teach a threshold value calculation operation of calculating a threshold value to be used in a subsequent training process based on the first and second membrane potentials… of accelerating early determination training based on... and an early training termination operation… the early training termination operation including: comparing, in real time, a difference between the first and second membrane potentials for each splitted timestep to the threshold value, and, when the difference is greater than the threshold value, determining that an image is not having a training contribution and terminating the training at the splitted timestep. McDanel, in the same field of endeavor, teaches accelerating early determination training... and an early training termination operation… the early training termination operation including: (Page 1 and 2 Introduction of McDanel, the original baseline neural network, to allow certain test samples to exit early… If the entropy of a test sample is below a learned threshold value, meaning that the classifier is confident in the prediction, the sample exits the network with the prediction result at this exit point, and is not processed by the higher network layers.” McDanel teaches exiting early in a neural network where input samples can exit the network early when a confidence metric falls below a threshold.) in real time (Page 1 and 2 Introduction of McDanel, “…may make deeper networks less tractable in many real world scenarios, such as real-time control of radio resources…”) determining that an image is not having a training contribution and… (Page 1 Introduction of McDanel, “The ImageNet challenge exemplifies the trend to deeper networks, as the state of the art methods have advanced from 8 layers (AlexNet)”, Page 3 Section C of McDanel, “The procedure requires T, a vector where the n-th entry is the threshold used to determine if the input x should exit at the n-th exit point. In section V-B, we discuss how these thresholds may be set. The procedure begins with the lowest exit point and iterates to the highest and final exit point of the network. For each exit point, the input sample is fed through the corresponding branch...” McDanel teaches that if a threshold condition is met, the input sample exits the network. The input samples are images used from image datasets like AlexNet, ResNet, and MNIST.) Therefore, it would have been obvious to combine Akopyan’s teaching of a neurosynaptic core with McDanels’s early exit neural network strategy in order to reduce runtime and energy computation (Introduction of McDanel). Akopyan and McDanel do not teach terminating the training at the… timestep. Zuo, in the same field of endeavor, teaches terminating the training at the… timestep. (“then building pulse neural network model, using the… input layer and the output layer of the pulse neural network model between learning, until satisfy the training termination condition, then using the trained model for fault diagnosis.” Zuo teaches that "the timestep" corresponds to the exact point in time when the condition is satisfied to terminate the training.) Therefore, it would have been obvious to one of ordinary skill in the art to combine Akopyan and McDanel’s teaching with Zuo’s termination of training at the timestep in order to improve the efficiency of the neural network model (Page 1 of Zuo). Akopyan, McDanel, and Zuo do not teach a difference between the first and second membrane potentials for each splitted timestep to the threshold value, and, when the difference is greater than the threshold value… a threshold value calculation operation of calculating a threshold value to be used in a subsequent training process based on the first and second membrane potentials Uma, in the same field of endeavor, teaches comparing… a difference between the first and second membrane potentials for each splitted timestep to the threshold value, and, when the difference is greater than the threshold value, (Paragraph 7, “…the difference between the excitement degree of the first intermediate neuron and the excitement degree of the second intermediate neuron exceeds a predetermined recognition threshold.”) Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date to combine Akopyan and McDanel’s teaching with Uma’s teaching of membrane potential calculations in order to improve the prediction accuracy of the model (Paragraph 36 of Uma). Claims 2 and 7 are rejected under 35 U.S.C. 103 as being unpatentable over Akopyan US (20170286825 A1), Lim (US 20200312350 A1) in view of Zhang (US 5732697 A), McDanel (“BranchyNet: Fast inference via early exiting from deep neural networks”, 2016), Zuo (CN 111275004 A), and Uma (JP H05274289 A). Regarding claim 2, Akopyan teaches the first membrane potential is a membrane potential of a correct answer neuron, and the second membrane potential is a largest membrane potential among membrane potentials excluding membrane potentials of the correct answer neuron among a plurality of membrane potentials. (Para 0025 of Akopyan, “A learning rule such as spike-timing dependent plasticity (STDP) may be applied to update the synaptic weights of the synapses 31.” By definition, STDP is a calculation based on the spikes of two different neurons. It involves comparing the timing and spikes of two different neurons which are typically pre-synaptic and a post-synaptic neuron in order to determine their strength connection to update the weights. The “first membrane potential” corresponds to the membrane potential of the post-synaptic (correct answer) neuron whose firing represents the desired output, while “second membrane potential” corresponds to the membrane potential of another neuron (non-correct answer neuron) with the largest potential among the remaining neurons. Since STDP operates by calculating the spike timing between neuron pairs, Akopyan’s teaching of applying STDP to neurosynaptic core circuits performs a comparison between neurons corresponding to the claimed first and second membrane potentials associated with the correct and non-correct neurons.) Regarding claim 7, Akopyan teaches the splitted timestep is a timestep in which one timestep is splitted into one of 2 to 16 (Para 0029 of Akopyan, “Each of the T partitions may be associated with a corresponding one of T sub-timesteps of a timestep”; Para 0044, “As shown in FIG. 4, T=4, such that the configuration 502 includes four sets of neuron membrane potentials 516 for four sub-timesteps of a timestep, but it is understood that T may equal any number.” Akopyan teaches that the timestep can be split into T sub-timesteps which means it can be split into one of 2 to 16 and does not limit the value of T.) Claim 3 is rejected under 35 U.S.C. 103 as being unpatentable over Akopyan (US 20170286825 A1), Lim (US 20200312350 A1), in view of Zhang (US 5732697 A) and Kim (US 9026841 B1). Regarding claim 3, Akopyan teaches a membrane potential difference (Para 0025 of Akopyan, “A learning rule such as spike-timing dependent plasticity (STDP) may be applied to update the synaptic weights of the synapses 31.”) However, Akopyan does not teach the threshold value calculation operation calculates the threshold value based on Equation 1, Equation 1 is a=m+2𝛔, and where, 'a' is the threshold value, 'm' is an average…, and PNG media_image1.png 12 17 media_image1.png Greyscale is a deviation. Kim, in the same field of endeavor, teaches the threshold value calculation operation calculates the threshold value based on Equation 1, Equation 1 is a=m+2𝛔, and where, 'a' is the threshold value, 'm' is an average…, and PNG media_image1.png 12 17 media_image1.png Greyscale is a deviation (Description in Para 180, “a standard-deviation technique (e.g., to identify a threshold to be two standard deviations from a mean)” in order to use the threshold value to identify anomalies using neural networks (Para 145)). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date to modify the membrane potential threshold determination in Akopyan to incorporate the threshold value calculation technique of Kim, in which the threshold is set as two standard deviations from the mean. The motivation for doing so is to provide a mechanism that improves the efficiency of the model (See Para 120 of Kim; see Para 0002 of Akopyan). Kim teaches that such statistical thresholding leads to more accurate detection of activation events. Incorporating this technique into Akopyan would predictably enhance the membrane potential determination. Akopyan and Kim do not teach a distribution of the images with training contribution. Zhang, in the same field of endeavor, teaches distribution of the images (Description of Drawings Para 7, “FIG. 5A is a graph showing the training error of the neural network as it is trained using a set of training images and desired outputs” with the training contribution [Description of Drawings Para 4, “…wherein some areas of the training image are excluded from training as belonging to a training-free zone”] to improve prediction and efficiency in artificial neural networks trained by images. Zhang mentions how some training images are excluded during the training process which explicitly mentions how other images are kept during training.) Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date to combine Akopyan and Kim’s teachings of the threshold value corresponding to two standard deviations from the mean, with Zhang’s artificial neural network training based off images in order to improve accuracy of the artificial neural network based on the distribution of images (see Abstract of Zhang). Claims 8-9 are rejected under 35 U.S.C. 103 as being unpatentable over Akopyan (US 20170286825 A1), in view of Zhang (US 5732697 A), Lim (US 20200312350 A1), Basu (US 20160110643 A1), and Uma (JP H05274289 A). Regarding claim 8, Akopyan teaches [a]n early determination training accelerator based on a timestep splitting comprising: (See Akopyan, Para 0002, “Because manufacturing neurosynaptic chips is expensive, it is desirable to minimize the number of chips used by a given system”, See Para 0065, “In one embodiment, the multiplexed neurosynaptic multiplexed core 610 may operate in the following manner. Synchronously, within each of T sub-timesteps (from sub-timestep 0 to sub-timestep T−1), each axon it is checked to determine whether the axon has a spike that needs to be delivered. …Further, the multiplexed neurosynaptic core 610 may operate asynchronously to receive spike event packets from the neurosynaptic network, and update axon buffers.”) and a global controller (Paragraph 27 of Akopyan, “Further, the core circuit 100 multiplexes one or more of computation and control logic for multiple neurons 11. The core circuit 100 includes… a controller (i.e., a processing and computation logic circuit)” Akopyan teaches a controller that multiplexes computation and controls logic for multiple neurons within the neural core circuit.) …in real time… (Paragraph 44, “ As shown in FIG. 4, T=4, such that the configuration… includes four sets of neuron membrane potentials 516 for four sub-timesteps of a timestep, but it is understood that T may equal any number. ”) Akopyan does not teach an input layer module into which an input spike signal of a spiking neural network is input; a hidden layer module configured to receive the input spike signal; an output layer module configured to receive the input spike signal from the hidden layer module. Basu, in the same field of endeavor, teaches an input layer module into which an input spike signal of a spiking neural network is input (Para 0057, “The architecture of the proposed classifier of the MLCP 8 that exploits the d×L random weights of the input layer is shown in FIG. 4. A decoder 10 receives the neural recordings and separates it into d data signals indicative of different sensors.”); a hidden layer module configured to receive the input spike signal; an output layer module configured to receive the input spike signal from the hidden layer module (Para 0015, “One example of a suitable adaptive signal processing model is a two-layer neural network known as an Extreme Learning Machine (ELM). An ELM has a hidden layer of neurons connected to network inputs by corresponding connections characterized by randomly-set first layer weight values, and an output formed as a function of the outputs of the hidden layer of neurons where the function depends upon a set of tunable output weights.”) Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date to modify the early determination training accelerator of Akopyan to include the layers as taught by Basu in order to make the neural network more accurate (Para 0003 of Basu). Akopyan and Basu do not disclose that an image does not have training contribution. Zhang, in the same field of endeavor, teaches to determine an image not having training contribution (Description of Drawings Para 4, “…wherein some areas of the training image are excluded from training as belonging to a training-free zone”.) Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date to modify the method of Akopyan and Basu to incorporate Zhang’s teaching of determining that an image does not have training contribution, for the purpose of improving the training efficiency of the neural network by avoiding unnecessary computation on data samples that don’t contribute meaningfully to the training process (Abstract of Zhang). Akopyan, Basu, and Zhang do not explicitly teach terminating a training process based on the presence or absence of the training contribution determined by the output layer module. Lim, in the same field of endeavor, teaches configured to terminate a training process based on the presence or absence of the training contribution determined by the output layer module (Paragraph 17 of Lim, “The neural network may be trained to early stop at an optimal epoch determined while monitoring an accuracy or a loss or an F-score based on the different threshold for each sound event.”) calculat[ing] a threshold value for determining presence or absence of the training contribution (Paragraph 17 of Lim, “The neural network may be trained to early stop at an optimal epoch determined while monitoring an accuracy or a loss or an F-score based on the different threshold for each sound event.”); execute an early training termination operation by… and terminating the training process (Paragraph 17 of Lim, “The neural network may be trained to early stop at an optimal epoch determined while monitoring an accuracy or a loss or an F-score based on the different threshold for each sound event.”); Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date to combine these references with Lim’s threshold used in subsequent training process and terminating the training neural network early in order to improve the improve the efficiency of a neural network (Para 0044 of Lim). Uma, in the same field of endeavor, teaches comparing… a difference between the first and second membrane potentials to the threshold value (Paragraph 7 of Uma, “…the difference between the excitement degree of the first intermediate neuron and the excitement degree of the second intermediate neuron exceeds a predetermined recognition threshold.”); receiving, for each splitted timestep, first and second membrane potentials measured by the output layer… (“Therefore, if this pattern is learned to be "A"… Intermediate neuron N that is excited when an input vector enters 1 is generated, and an output neuron representing the class “A” is generated in the output layer. Thereafter, an intermediate neuron N1 that excites a pattern that falls within this circle is generated in the output layer as an output neuron representing class "A"… Next… the class "B"… causes a new intermediate neuron N2 in the hidden layer. To generate an output neuron representing the class “B” in the output layer.”); Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date to combine the previous teachings with Uma’s teaching of membrane potential calculations in order to improve the prediction accuracy of the model (Paragraph 36 of Uma). Regarding claim 9, Akopyan teaches a weight update module configured to add weights of the input spikes to the membrane potential based on an input of the input spike signal; a membrane potential buffer configured to store the membrane potentials of the plurality of neurons; and a spike time buffer configured to store spike occurrence times of the plurality of neurons (Para 0025, “A learning rule such as spike-timing dependent plasticity (STDP) may be applied to update the synaptic weights of the synapses 31.”; Para 0049, “Additionally, the T sets of neuron membrane potentials 516 comprise neuron membrane potentials for the plurality of electronic neurons of a neural core circuit (membrane potential buffer) 100 such that each of the T partitions stores neuron membrane potentials for the plurality of electronic neurons for one of the T sub-timesteps.”; Para 0032, “ Each spike event packet may further include a timestep and a sub-timestep indicating when a firing event encapsulated in said spike event packet was generated.”). Akopyan, Lim, and Zhang do not teach that the hidden layer module includes: a membrane potential update module configured to receive the input spike signal from the input layer module and to calculate membrane potentials of a plurality of neurons based on input spikes. Basu, in the same field of endeavor, teaches wherein the hidden layer module includes: a membrane potential update module configured to receive the input spike signal from the input layer module and to calculate membrane potentials of a plurality of neurons based on input spikes (Para 0068, “Combining these two blocks, the hidden-layer neuron convert (calculate) the input current randomly projected by input weights into spike numbers, which is transmitted out of the microchip for further processing] to improve power efficiency with data processing.”) Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date to combine Akopyan’s teaching of the weight update module, membrane potential buffer, and spike time buffer with Basu’s membrane potential update module in the hidden layer in order to improve power efficiency in computing systems (Para 0003 in Basu). Claims 10-13 are rejected under 35 U.S.C. 103 as being unpatentable over Akopyan (US 20170286825 A1), in view of Zhang (US 5732697 A), Lim (US 20200312350 A1), Tschirhart (US 20200242452 A1), and Basu (US 20160110643 A1). Regarding claim 10, Akopyan teaches a weight update module configured to add weights of the input spikes to the membrane potential based on an input of the input spike signal; (Para 0025, “A learning rule such as spike-timing dependent plasticity (STDP) may be applied to update the synaptic weights of the synapses 31.”) a membrane potential buffer configured to store the membrane potentials of the plurality of neurons; (Para 0049, “Additionally, the T sets of neuron membrane potentials 516 comprise neuron membrane potentials for the plurality of electronic neurons of a neural core circuit (membrane potential buffer) 100 such that each of the T partitions stores neuron membrane potentials for the plurality of electronic neurons for one of the T sub-timesteps.”) and a spike time buffer configured to store spike occurrence times of the plurality of neurons; (Para 0032, “Each spike event packet may further include a timestep and a sub-timestep indicating when a firing event encapsulated in said spike event packet was generated.”; Para 0033, “For a given axon 15, the scheduler may buffer received firing events addressed to the axon 15 in a buffer associated with the axon 15.”) an error calculation unit configured to calculate a difference between a spike occurrence time of the plurality of neurons after a forward propagation process is finished during a training process and a target correct answer signal; (Para 0025, “A learning rule such as spike-timing dependent plasticity (STDP) may be applied to update the synaptic weights of the synapses 31.”.) an early determination unit configured to determine… when calculation of each timestep in the forward propagation process is completed; and a threshold calculation unit configured to calculate a threshold value to be used in a subsequent training after the forward propagation process is completed (See Para 0067, “If the new neuron state triggers a spike, then look up the destination location of the neuron, generate a spike event packet addressed to the destination location, send the spike event packet on the neurosynaptic network, and reset the state of the neuron j”; Para 0002, “Further, the multiplexed neurosynaptic core 610 may operate asynchronously to receive spike event packets from the neurosynaptic network, and update axon buffers.”.) Akopyan, Lim, and Basu do not teach an image not having the training contribution. Zhang, in the same field of endeavor, teaches an image not having the training contribution (Description of Drawings Para 4, “…wherein some areas of the training image are excluded from training as belonging to a training-free zone”.) Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date to modify the method of Akopyan to incorporate Zhang’s teaching of determining that an image does not have training contribution, for the purpose of improving the training efficiency of the neural network by avoiding unnecessary computation on data samples that don’t contribute meaningfully to the training process (Abstract of Zhang). Akopyan, Lim, Basu, and Zhang do not teach that the output layer module includes: a spike buffer configured to receive the input spike signal from the hidden layer module and a membrane potential update module configured to receive the input spike signal. Tschirhart, in the same field of endeavor, teaches the output layer module includes: a spike buffer configured to receive the input spike signal from the hidden layer module (Para 0036, “incoming spikes from other neurons (i.e., neurons that are presynaptic to a neuron whose response is computed by core 100) can be received by incoming spike buffer 102 along input lines 112”, Para 0021, “the direct network of four neuromorphic cores together to create a neural network of four neurons in each layer, as in the hidden layers of the example network shown in FIG. 3.”); a membrane potential update module configured to receive the input spike signal (Para 0089, “Furthermore, the described systems and methods use a more centralized soma circuit to determine spiking behavior, leveraging an accumulator to sum up the incoming weight at the soma, and thus differ from designs that implement neuronal soma as one or more dendritic membrane circuits that determine the spiking behavior of the neuron, and therefore lack an accumulator in the soma.” Tschirhart’s accumulator corresponds to the claimed membrane potential update module because both perform the same function of summing incoming weighted spike inputs to determine whether the neurons fire. Tschirhart teaches that the systems use a soma circuit to determine spiking behavior based on the accumulator that sums up the incoming weight at the soma. This directly corresponds to updating the membrane potential of the neuron based on the received spikes.) Therefore, it would have been obvious to one of ordinary skill before the effective filing date to combine Akopyan, Lim, Basu, and Zhang’s teaching with Tschirhart’s teaching of a hidden layer consisting of a membrane potential update module in order to improve the processing efficiency and accuracy of spike-based neural computations (Para 0003 of Tschirhart). Regarding claim 11, Akopyan teaches [t]he early determination training accelerator based on the timestep splitting of claim 10, wherein, when a difference between the first and second membrane potentials in the timestep is greater than the threshold value (See Para 0067, “If the new neuron state triggers a spike, then look up the destination location of the neuron, generate a spike event packet addressed to the destination location, send the spike event packet on the neurosynaptic network, and reset the state of the neuron j”). the early determination unit (Para 0099, FIG. 8 shows a representative hardware environment for configuring neurosynaptic cores, in accordance with one embodiment. Such figure illustrates a typical hardware configuration of a workstation having a central processing unit 210, such as a microprocessor, and a number of other units interconnected via a system bus. The reset after threshold comparison teaches the claimed early termination behavior when a threshold condition is met.) Akopyan, Lim, and Basu do not teach determining that the image does not have the training contribution and terminating the training at the timestep. Zhang, in the same field of endeavor, teaches determines that the image is not having the training contribution and terminates the training at the timestep (Description of Drawings Para 4, “…wherein some areas of the training image are excluded from training as belonging to a training-free zone”). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date to modify the method of Akopyan to incorporate Zhang’s teaching of determining that an image does not have training contribution, for the purpose of improving the training efficiency of the neural network by avoiding unnecessary computation on data samples that don’t contribute meaningfully to the training process (Abstract of Zhang). Regarding claim 12, Akopyan teaches the threshold value calculation unit calculates the threshold value to be used in a subsequent training process based on distribution data of first and second membrane potentials among the membrane potentials of the plurality of neurons (Para 0025, “A learning rule such as spike-timing dependent plasticity (STDP) may be applied to update the synaptic weights of the synapses 31.”; See Para 0037, “a comparator may determine whether the modified membrane potential variable exceeds a threshold parameter Th maintained in said entry”. By definition, STDP is a calculation based on the spikes of two different neurons. It involves comparing the timing and spikes of two different neurons which are typically pre-synaptic and a post-synaptic neuron in order to determine their strength connection to update the weights. The “first membrane potential” corresponds to the membrane potential of the post-synaptic (correct answer) neuron whose firing represents the desired output, while “second membrane potential” corresponds to the membrane potential of another neuron (non-correct answer neuron) with the largest potential among the remaining neurons. After the calculation of the difference between the first and second membrane potential, the calculation for the threshold value is performed to see if it exceeds the threshold parameter.) Regarding claim 13, Akopyan further teaches the first membrane potential is a membrane potential of a correct answer neuron, and the second membrane potential is a largest membrane potential among membrane potentials excluding membrane potentials of the correct answer neuron among a plurality of membrane potentials (Para 0025, “A learning rule such as spike-timing dependent plasticity (STDP) may be applied to update the synaptic weights of the synapses 31.” By definition, STDP is a calculation based on the spikes of two different neurons. It involves comparing the timing and spikes of two different neurons which are typically pre-synaptic and a post-synaptic neuron in order to determine their strength connection to update the weights. The “first membrane potential” corresponds to the membrane potential of the post-synaptic (correct answer) neuron whose firing represents the desired output, while “second membrane potential” corresponds to the membrane potential of another neuron (non-correct answer neuron) with the largest potential among the remaining neurons. Since STDP operates by calculating the spike timing between neuron pairs, Akopyan’s teaching of applying STDP to neurosynaptic core circuits performs a comparison between neurons corresponding to the claimed first and second membrane potentials associated with the correct and non-correct neurons.) Allowable Subject Matter Claim 6 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. Conclusion Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to MAJD MAHER HADDAD whose telephone number is (571)272-2265. The examiner can normally be reached Mon-Friday 8-5 pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Kamran Afshar, can be reached at (571) 272-7796. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /M.M.H./Examiner, Art Unit 2125 /KAMRAN AFSHAR/Supervisory Patent Examiner, Art Unit 2125
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Prosecution Timeline

Jan 20, 2023
Application Filed
Nov 19, 2025
Non-Final Rejection mailed — §103, §112
Feb 10, 2026
Response Filed
Mar 31, 2026
Final Rejection mailed — §103, §112 (current)

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3-4
Expected OA Rounds
100%
Grant Probability
99%
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3y 5m (~1m remaining)
Median Time to Grant
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