DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Amendment
The Examiner acknowledges the amending of claims 1, 3, 9-10, 14, cancellation of claim 11 and addition of claim 31.
Drawings
Figure 1 is accepted.
Claim Rejections - 35 USC § 112
The previous 112 rejections are withdrawn due to the current amendments.
The following is a quotation of the first paragraph of 35 U.S.C. 112(a):
(a) IN GENERAL.—The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor or joint inventor of carrying out the invention.
The following is a quotation of the first paragraph of pre-AIA 35 U.S.C. 112:
The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor of carrying out his invention.
Claim 9 is rejected under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-AIA ), first paragraph, as failing to comply with the written description requirement. The claim(s) contains subject matter which was not described in the specification in such a way as to reasonably convey to one skilled in the relevant art that the inventor or a joint inventor, or for applications subject to pre-AIA 35 U.S.C. 112, the inventor(s), at the time the application was filed, had possession of the claimed invention.
Claim 9 has been amended to state the CTE values are within 10% of each other. The original filed specification is not found to disclose a value of 10%. Therefore, it is not clear the Applicant was in possession of the claimed invention at the time of filing.
Response to Arguments
Applicant’s arguments with respect to claim(s) 1 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claim(s) 1-2, 4, 6-10, 12-14 is/are rejected under 35 U.S.C. 103 as being unpatentable over Miyata (US 2021/0091532) in view of Kimura et al. (US 2023/0170665; note foreign priority with support).
With respect to claim 1, Miyata discloses a semiconductor package (fig.5-6), comprising: a cap (fig.5-6 #40a-c) comprising: a first window wafer (fig.5a #40a) comprising a first face (fig.5a #40a right side) and opposing second face (fig.5a #40a left side), wherein the first face and second face are mutually parallel (as seen in fig.5a/6, [0042]), and wherein the first face and/or second face includes an antireflective surface ([0042]); a second window wafer (fig.5a #40c) comprising a first face (fig.5a #40c left side) and opposing second face (fig.5a #40c right side); and a spacer wafer (fig.5a/b #40b) that is perforated with a single through-hole (fig.5-6 C-shaped #40b constitutes through hole) extending from a first face of the spacer wafer (fig.5a #40b left side) to an opposing second face of the spacer wafer (fig.5a #40b right side), wherein the spacer wafer is disposed between the first window wafer and the second window wafer (fig.5-6) with the first window wafer bonded to the first face of the spacer wafer and the second window wafer bonded to the second face of the spacer wafer (as defined above), wherein the first window wafer, second window wafer, and spacer wafer together define a cavity in the cap (fig.5-6 empty central region); and an edge-emitting laser diode (fig.5a #10, [0047]) disposed on a submount (fig.5a #30) and configured to direct a laser beam at normal incidence to the first face of the first window wafer (fig.5a see arrow), wherein the cap is mounted on the submount with the edge-emitting laser diode enclosed in the cavity (fig.5-6). Miyata does not teach the direct bonding of the second window wafer to the second face of the spacer wafer. Kimura teaches a substantially similar package device (fig.2/4a/4b) which includes direct bonding as an alternative to anodic bonding (used by Miyata) (Kimura, [0064]). It would have been obvious to one of ordinary skill in the art before the filing of the instant application to utilize direct bonding between the spacer wafer and both the first and second window wafers in place of the anodic bonding as Kimura has taught the direct bonding to be a suitable alternative thereto (see MPEP 2144.06 II, 2144.07) and the direct bonding would additionally eliminate the need to use additional bonding materials (see Conclusion section below demonstrating this is known in the art).
With respect to claim 2, Miyata discloses the antireflective surface comprises an antireflective coating ([0042]), a filter coating, or a textured surface configured to form an antireflective topography.
With respect to claim 4, Miyata discloses the first face of the first window wafer is disposed proximal to the edge-emitting laser diode (fig.5a #40a right side near laser) and includes the antireflective surface ([0042]).
With respect to claim 6, Miyata discloses the first window wafer and/or the second window wafer is a dual side polished wafer ([0062] there are two sides, left/right, and they are smooth; noting the manner in which the smooth sides are produced, “polished”, is understood to be a product-by-process limitation, where the product is limited only be the structure implied by the process; see MPEP 2113).
With respect to claim 7, Miyata discloses the first window wafer comprises DSP fused silica, glass ([0066]), sapphire, Borofloat 33 glass, or silicon.
With respect to claim 8, Miyata discloses the first and second window wafers each have a thickness of 0.2 mm to 0.8 mm ([0072, 76]) and the spacer wafer has a thickness of 0.5 mm to 3.5 mm ([0071]).
With respect to claim 9, Miyata discloses the spacer wafer is configured to have a coefficient of thermal expansion (CTE) within 10% of the first and second window wafers ([0066]).
With respect to claim 10, Miyata discloses the spacer wafer is comprised of the same material as the first window wafer and/or the second window wafer ([0066]).
With respect to claim 12, Miyata discloses the spacer wafer comprises Invar, silicon, Kovar, fused silica, glass ([0066]), or sapphire.
With respect to claim 13, Miyata discloses the submount is made of ceramic ([0050]).
With respect to claim 14, Miyata discloses the through- hole is rectangular ([0042]), triangular, or circular.
With respect to claim 31, Miyata, as modified, teaches the first window wafer is directly bonded to the first face of the spacer wafer (see claim 1 rejection above).
Claim(s) 3 is/are rejected under 35 U.S.C. 103 as being unpatentable over Miyata in view of Hobbs et al. (“High Laser Damage Threshold Surface Relief Micro-Structures for Anti-Reflection Applications”, Applicant submitted prior art).
With respect to claim 3, Miyata teaches the device outlined above, but does not teach the anti-reflection surface comprises the textured surface, and wherein the textured suface comprises a motheye topography in which textured areas are formed in a matrix of discrete rectangular areas. Hobbs teaches AR textured surfaces (abstract) which include motheye topography (see section 2) and formed as a matrix of discrete rectangular areas (see fig.1 SEM where the tops of the peaks resemble rectangles). It would have been obvious to one of ordinary skill in the art before the filing of the instant application to adapt the device of Miyata to make use of the textured surface type of Hobbs in place of the AR coating in order to improve damage thresholds within the device (Hobbs, abstract).
Claim(s) 5 is/are rejected under 35 U.S.C. 103 as being unpatentable over Miyata in view of Miura et al. (US 2021/0135426).
With respect to claim 5, Miyata discloses the second face of the first window wafer is disposed distal to the edge-emitting laser diode (fig.5a #40a left side far from laser) and an array of lenses or microlenses on the cap ([0047]). Miyata does not specify the lenses are bonded to the window wafer. Miura teaches a related laser package (fig.13) which includes multiple lens (fig.13a #40) attached to a side of the package and the use of bonding to attach the lenses ([0089]). It would have been obvious to one of ordinary skill in the art before the filing of the instant application to adapt the use of multiple lenses on the cover of Miyata to have those lenses be bonded to the first window wafer as Miura has demonstrated such a configuration and would allow for a more integrated, stable device while making use of a secure attachment means.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
Please see the include and previous pto892 form for a list of references related to at least claim 1.
US 2019/0035700 noted as being particularly relevant.
US2017/0148955 is noted as demonstrating the motivation of using direct bonding methods to bond materials without needing extra intermediate layers was known in the art ([0042]).
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to TOD THOMAS VAN ROY whose telephone number is (571)272-8447. The examiner can normally be reached M-F: 8AM-430PM.
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/TOD T VAN ROY/Primary Examiner, Art Unit 2828