DETAILED ACTION
This action is in response to the amendments filed on July 31st, 2026. A summary of this action:
Claims 1, 3-12, 14-22 have been presented for examination.
Claims 1, 12, 20-22 are objected to because of informalities
Claim(s) 1, 3-8, 12, 14-22 is/are rejected under 35 U.S.C. 103 as being unpatentable over Serrano-Jiménez (hereinafter Serrano), Daniel, et al. "Stability tool for electric power systems with a high penetration of electronic power converters." Electric Power Systems Research 210 (2022): 108115 in view of Saied, Noman. "Novel parallel computing decoupling methods for power system distribution networks." (2022) and in further view of Daxer at al., US 2024/0160443.
A term in the prior art has its meaning explained by another reference (see MPEP § 2131.01) in view of Webb, Kyle. ESE 470 – Energy Distribution Systems. Section 4: Transmission Lines. Lecture Notes. Last Modified: June 2022. URL: web(dot)engr(dot)oregonstate(dot)edu/~webbky/ESE470_files/Section%204%20Transmission%20Lines(dot)pdf
Claim(s) 11 is/are rejected under 35 U.S.C. 103 as being unpatentable over Serrano-Jiménez (hereinafter Serrano), Daniel, et al. "Stability tool for electric power systems with a high penetration of electronic power converters." Electric Power Systems Research 210 (2022): 108115 in view of Saied, Noman. "Novel parallel computing decoupling methods for power system distribution networks." (2022) and in further view of Daxer at al., US 2024/0160443.
A second term in the prior art has its meaning explained by another reference (see MPEP § 2131.01) in view of Colorado State University (hereinafter Colorado), SIEMENS POWER SYSTEM SIMULATION FOR ENGINEERS® (PSS/E), Lab 2: Introduction to Slider Binary Files, accessed via WayBack machine with archive date of Apr. 2018, URL: www(dot)engr(dot)colostate(dot)edu/ECE461/FA13/LAB2/LAB2(dot)pdf
Claim(s) 9-10 is/are rejected under 35 U.S.C. 103 as being unpatentable over Serrano-Jiménez (hereinafter Serrano), Daniel, et al. "Stability tool for electric power systems with a high penetration of electronic power converters." Electric Power Systems Research 210 (2022): 108115 in view of Saied, Noman. "Novel parallel computing decoupling methods for power system distribution networks." (2022) and in further view of Daxer at al., US 2024/0160443 and in further view of Wang, L., et al. "Methods of interfacing rotating machine models in transient simulation programs." IEEE Transactions on Power Delivery 25.2 (2010): 891-903.
This action is Final
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Arguments/Amendments
Regarding the § 101 Rejection
Withdrawn in view of amendments and supporting remarks, as well as ¶ 27.
Regarding the § 102/103 Rejection
Withdrawn in view of amendments. New grounds below as necessitated by amendment – see below for how the newly added subject matter is rejected. Remarks discuss the newly added subject matter, so see below.
Claim Objections
Claims 1, 12, 20-22 are objected to because of the following informalities:
Claim 1 recites, in part: “available multipliers and adders” – Examiner notes that the term “available” may create ambiguity as to what this means as a subjective term, however the Examiner interprets this simply as being among the multipliers and adders of a parallel processing device. Examiner suggests amending to more clearly reflect this interpretation (see ¶ 27). Claims 12 and 20 objected to for similar reasons
Claims 21-22 objected to for “CPU” as this is an acronym – Examiner suggests amending to “central processing unit (CPU)”. See ¶ 59.
Appropriate correction is required.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 1-8, 12-22 is/are rejected under 35 U.S.C. 103 as being unpatentable over Serrano-Jiménez (hereinafter Serrano), Daniel, et al. "Stability tool for electric power systems with a high penetration of electronic power converters." Electric Power Systems Research 210 (2022): 108115 in view of Saied, Noman. "Novel parallel computing decoupling methods for power system distribution networks." (2022) and in further view of Daxer at al., US 2024/0160443.
When a term in the prior art has its meaning explained by another reference (see MPEP § 2131.01) in view of Webb, Kyle. ESE 470 – Energy Distribution Systems. Section 4: Transmission Lines. Lecture Notes. Last Modified: June 2022. URL: web(dot)engr(dot)oregonstate(dot)edu/~webbky/ESE470_files/Section%204%20Transmission%20Lines(dot)pdf
Regarding Claim 1
Serrano teaches:
An electrical power grid simulation method comprising: (Serrano, abstract and § I last four paragraphs, also see § 2)
receiving data describing an electric circuit of an electrical power grid, the electric circuit having nodes and branches between the nodes; (Serrano, as cited above, see § 2, subsection A , e.g. see § 3 for the use cases for the circuits , e.g. use case II for the “IEEE 5-bus benchmark system”; and also see use case II for the “CIGR´E distribution system” – e.g. fig. 9 (see accompanying description), in particular page 9 ¶¶ 1-4
generating a representation of the electrical power grid in a state-space form, the representation including one or more network equations that include a plurality of state variables each representing a respective independent storage element of in the electric circuit, and wherein generating the representation of the electrical power grid in the state-space form comprises: generating a simplified electric circuit which has only one capacitor element between each node to ground, and has only one inductor element on each branch; and generating, from the simplified electric circuit, the representation of the electrical power grid in the state-space form; and generating, based on the representation of the electrical power grid in a state-space form, a state-transition matrix model of the electrical power grid.
Serrano, as cited above, also see § 4 ¶ 2 incl.: “In the paper, the mathematical foundations of the tool that enable to automatically construct and reduce the system of equations representing a specific use case have been introduced, based on the individual - element models…” – to clarify, § 2 subsection A subsection 2 for the non-reduced state-space representation, and subsection B: “The large-signal module has two main objectives: the calculation of the time-domain response of the system and the validation of the small signal state-space model when the system is nonlinear. To perform the nonlinear simulation, the reduced system of equations in Eq. (14) is dynamically solved. – i.e. Equation 14 is the nonreduced system representation in state space
then, see subsection 3 of § 2 subsection A for the simplified circuit (i.e. the reduced form of eq. 14), in particular: “The nonreduced system representation may also contain redundant (linearly dependent) differential and algebraic equations [19]. Some typical examples where redundant variables appear are synchronous generators or electronic power converters with L or LCL filters connected in series to transformers or transmission lines, cutsets formed by inductors and/or current sources in closed loops (e.g. in meshed or ring power system topologies) [23] or the cascaded interconnection of π or T transmission line models. To systematically identify and reduce these redundancies, Eq. (14) is first represented in the matrix form as:…” – in particular, note eq. 19-20: “In the next step, the redundant states of the system are reduced and the dependencies between the variables are identified. The process consists of arranging the equations in (15) in a matrix form as follows:… This matrix can be also rewritten as the following differential and algebraic system of equations:… where xSr and zSr represent the reduced vector of states and algebraic variables, respectively” – these are examples of the generated state-transition matrix model, when this term is read in view of ¶ 25 of the specification – to further clarify, see eq. 33-35, wherein eq. 35 provides an “A” matrix: “Following the process in Appendix A, by partially differentiating the equations in Eq. (33) with respect to (34), the linearized representation of the system can be obtained:” – which is also an example of a state transition matrix
to clarify, use case III ¶ 4 as cited above: “In Variant 1 there are 62 state variables, whereas in Variant 2 there are 122. These are automatically reduced by CSTEP to a representation of 34 and 88 state variables, respectively. The reason for this significant reduction is that many currents of the system depend on other ones (e.g., the current from loads depends on the line current), and that the capacitors of adjacent π equivalent transmission lines are connected in parallel (meaning that their voltage is equal). In other tools, the construction of such state-space models would have to be done either by manually writing all the equations (grouping adjacent inductors and capacitors) or by alternatively cascading π and T line models to avoid redundant states in the first place. Another alternative is the addition of “phantom” components to avoid the appearance of redundant states [19], but these parasitic elements introduce undesired dynamics and fictitious poles in the complex plane.” – i.e. parallel capacitors of pi equivalent transmission lines (to clarify on BRI, see fig. 5A, as discussed in ¶ 35, i.e. the T-lines are represented with their pi-representation, and in Serrano when two capacitors are in parallel this is a “redundant state[]” and eliminated by automatically
to clarify on the inductor, see the example use case I: “From Fig. 2 it is evident that the current of the line and the load is the same, meaning that in Eq. (30) there are two linearly dependent (redundant) differential equations. By reducing these equations and substituting the algebraic equations from (31) and (32) the following system of equations is obtained:…” - in other words, see eq. 33 which shows that the resistors and inductors are reduced by adding them together as they were in series (i.e. only one inductors per branch)”
As a point of clarity on the cascaded pi-equivalent transmission lines of Serrano, see the meaning of this in Webb slides 17 for the circuit of the pi-equivalent transmission line model (also see slides 23-25), then see slides 26-28 for cascaded networks, i.e. the cascaded pi transmission lines equivalent models of Serrano have two capacitors in parallel as Serrano expressly discussed, and this redundant state was removed in Serrano as Serrano expressly discussed (by grouping them together into one capacitor, akin to the inductors in Serrano use case I
While Serrarno does not explicitly teach the following, Serrano in view of Saied and Daxer teaches:
executing a simulation of electric power grid behaviors by partitioning computations of
the state-transition matrix model among available multipliers and adders of a parallel processing device and executing the computations in parallel
Serrano, as cited above, for the state-transition matrix model, and for the executing of a simulation see Serrano as cited above, e.g. the abstract, e.g. § 4 conclusions: “This paper has described a new converter stability analysis tool called CSTEP to simulate and analyse the stability of power systems with a considerable penetration of converters… In the paper, the mathematical foundations of the tool that enable to automatically construct and reduce the system of equations representing a specific use case have been introduced, based on the individual element models. Moreover, the time-domain simulation module and the analysis module of CSTEP have been described. The former is useful to simulate the original nonlinear representation and the linearized small signal model of the system, which facilitates the validation of the linearized models for further analyses and provides information under large disturbances. The tool also incorporates several analysis techniques to study the stability margins of the system and to identify the influence of parameters on the dynamic behaviour of the system”
taken in view of Saied, § 2.5 including: “As mentioned in Chapter 1, power networks are decoupled topologically into smaller parts for the purpose of parallel computing…” then see § 2.5.3 incl.: “In both real-time and non-real-time applications, the SSN solver has numerous advantages over all lassical state-space methods. The SSN grouping technique reduces the size and complexity of each group's state-space equations. The groups can be solved in parallel, significantly reducing the number of pre-calculated matrix sets for the various switching topologies [14, 61]… The three-phase system depicted in Figure 2.6 has two three-phase breakers (switches S1 and S2) and two 𝜋𝜋-lines. The capacitor voltages and inductor currents are the state variables in this case. The variable 𝑚𝑚 determines the number of state variables in any system; in the given example, 𝑚𝑚=15 states. The total number of matrices (𝐴𝐴𝑘 , 𝐵𝐵𝑘 , 𝐶 𝑘 , and 𝐷𝐷𝑘 ) that must be held in memory by the state-space technique is 𝑛 =2𝑆𝑆, where 𝑆𝑆 is the total number of switches in the system, and 𝑘𝑘=1,2,⋯,𝑛 . As a result, to operate this system in real-time, the state-space solver must pre-calculate and store 64 set of matrices in memory before execution. The system can be divided into two groups using the delay-free SSN approach, as seen in Figure 2.7 by employing one 3-phase nodal connection point… With discretization of the SSN method, the state space equation will become… Where 𝑖𝑖 and 𝑗𝑗 are the indexes of the state-space matrices (the 𝑖𝑖𝑡𝑡ℎ and 𝑗𝑗𝑡𝑡ℎ permutation of switches, respectively) for groups 1 and 2… Additionally, because each SSN group has three switches, the total number of pre-calculated matrix sets to be saved has increased to 2 × 23=16 matrices. This significant reduction in pre-calculated matrices will directly affect storage complexity requirements and computational load on processor cores.” – also, see p. 29 last paragraph to p. 30, last paragraph including: “The SSN implementation handles allocation of processor cores to the SSN groups such that the total computation time is minimized. One would expect that increasing the numbers of groups and the cores allocated to them should speed up the computation as the burden on each core is reduced”
wherein, there is a distinction that Saied is partitioning to “processor cores” of a multi-core processor, but not does not explicitly teach that it is partitioning among adders and multipliers – however, see Daxer, abstract, tthen see ¶¶ 196-197, incl.: “In some embodiments, the processor may be a general purpose processor (e.g., a general-purpose microprocessor or central processing unit (CPU) of the type used in server, workstation, desktop, laptop, or other computers). Alternatively, the processor may be a special-purpose processor. Examples of suitable special-purpose processors include, but are not limited to, graphics processing units (GPUs) including general-purpose GPUs, digital signal processors (DSPs ), matrix processors, co-processors. In general, the approaches described herein may be utilized in any type of processor in which it is desirable to support complex number matrix multiplication.” – the see ¶¶ 203-204, then see ¶ 206: “The processor and/or the complex number matrix multiplication circuitry may include specific or particular logic or circuitry ( e.g., transistors, integrated circuitry, or other hardware potentially combined with firmware (e.g., instructions stored in non-volatile memory) and/or software) that is operative to perform the complex number matrix multiplication instruction. By way of example, such specific or particular logic or circuitry may include multipliers and adders ( e.g., a plurality of multipliers coupled in parallel and an adder/subtractor tree or network)… In some embodiments, the execution unit may include the example circuitry or logic shown and described for any one or more of FIGS. 19-21, although the scope of the invention is not so limited.”, e.g. cf. 19 as discussed in ¶¶ 240-241: “The real number matrix multiplication circuit configuration has four adders, each shown as a circle with a"+" inside it, coupled in a first arrangement (e.g., an adder network). The complex number matrix multiplication circuit configuration converts one of these adders to a selectable adder/subtractor, shown as a circle with a "-" inside it, and couples the three adders and the selectable adder/subtractor in a second slightly different arrangement (e.g., an adder/subtractor network). By way of example, different interconnections may be included for each of these different arrangements and selection or configuration circuitry ( e.g., multiplexers) may be included to select or configure one of these different arrangements. The complex number matrix multiplication circuit configuration has one additional accumulator register, shown as a rectangle, and one additional AND gate… As will be discussed further below, the complex number matrix multiplication circuit configuration may also be duplicated or replicated multiple times (e.g., two times, four times, sixteen times, and so on) to facilitate concurrent [parallel] complex number multiplications for increasingly large matrices.” – see ¶ 245 for more clarification
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the teachings from Serrano on a system which is solving state-space equations with the teachings from Saied on a technique for parallel computing for solving state-space equations. The motivation to combine would have been that “The groups can be solved in parallel, significantly reducing the number of pre-calculated matrix sets for the various switching topologies [14, 61]…Additionally, because each SSN group has three switches, the total number of pre-calculated matrix sets to be saved has increased to 2 × 23=16 matrices. This significant reduction in pre-calculated matrices will directly affect storage complexity requirements and computational load on processor cores” (§ 2.5.3) and “As a result, OPAL-RT developed numerous techniques to parallelize the calculations required to achieve real-time simulation [26].” (§ 2.5) and at p. 29, last paragraph: “A more accurate method that solves both steady state and transient inaccuracies is the delay-free State-Space-Nodal (SSN) real-time solver [5, 14]. The SSN method is a novel approach that decouples the network into clusters (groups) separated by preselected nodes. Each cluster is solved separately as discretized state-space equations with the unknown nodal voltages and currents implied in the equations. Each state space cluster then results in a single nodal equation which is solved simultaneously with the other clusters using nodal analysis.” – additional motivations to combine are in ¶ 207.
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the teachings from Serrano in view of Saied with the teachings from Serrano, as modified by Saied above, on a system which was doing matrix multiplication (see Saied, as cited above) with Daxer’s teachings on “A processor to perform a complex number matrix multiplication instruction” (Daxer, abstract) The motivation to combine would have been that “Complex numbers are used in a wide variety of different fields, such as, for example, signal processing, simulations or other processing of electrical circuits, computational fluid dynamics, wave processing, seismology, and the like…. Because complex numbers include both real and imaginary components, and further because the multiplication of complex numbers is different than the multiplication of real numbers, processors capable of multiplying real numbers, and matrices of real numbers, are not natively (without additional modifications) able to multiply complex numbers, and matrices of complex numbers. As a result, even modem advanced processors that include real number matrix multiplication circuitry are unable to multiply matrices of complex numbers efficiently ( e.g., there are not dedicated instructions for complex number matrix multiplication to control or cause the circuitry to perform accomplish complex number matrix multiplication). Because matrices of complex numbers are used in a number of fields there would be advantages to instructions, processors, and circuitry to perform complex number matrix multiplication. These instructions, processors, and circuitry may help to increase performance or throughput of multiplying matrices of complex numbers and/or help to reduce power consumption in multiplying matrices of complex numbers.” (Daxer, ¶ 196)
Regarding Claim 3
Serrano teaches:
The method of claim 1, wherein executing the simulation of electric power grid behaviors comprises:
executing a transient stability simulation of the electric power grid by using the state-transition matrix model to analyze the stability of the electrical power grid described in the received data. (Serrano, as cited above, taken in further view of § 4 conclusions: “This paper has described a new converter stability analysis tool called CSTEP to simulate and analyse the stability of power systems with a considerable penetration of converters… In the paper, the mathematical foundations of the tool that enable to automatically construct and reduce the system of equations representing a specific use case have been introduced, based on the individual element models. Moreover, the time-domain simulation module and the analysis module of CSTEP have been described. The former is useful to simulate the original nonlinear representation and the linearized small signal model of the system, which facilitates the validation of the linearized models for further analyses and provides information under large disturbances. The tool also incorporates several analysis techniques to study the stability margins of the system and to identify the influence of parameters on the dynamic behaviour of the system”
Regarding Claim 4
Serrano teaches:
The method of claim 1, wherein the independent storage element of in the electric circuit is a capacitor or an inductor. (Serrano, as cited above)
Regarding Claim 5
Serrano teaches:
The method of claim 4, wherein each state variable represents a voltage value of the capacitor or a current value of the inductor. (Serrano, as cited above, i.e. its circuit simulation, so the variables represent the voltages at nodes and currents in branches, i.e. “Each node has two associated variables, i.e., a potential variable (zpn) and a flow variable (zfn). In power systems, potential and flow variables are associated with voltages and currents, respectively” § 2, subsection A, subsection 1 – to clarify, see use case I in § 3, eq. 30-35), i.e. the constants are values of elements, e.g. the value of the capacitor, the inductor, and the resistor in fig. 1, and the state variables are the currents and voltages
Regarding Claim 6
Serrano teaches:
The method of claim 1, wherein generating the simplified electric circuit comprises:
removing, from the electric circuit of the electrical power grid described in the received data, any additional capacitor elements between each node to ground; and removing, from the electric circuit of the electrical power grid described in the received data, any additional inductor elements on each branch. (Serrano, as cited above, these are the “redundant states” that were removed
Regarding Claim 7
Serrano teaches:
The method of claim 1, wherein generating the representation of the electrical power grid in the state-space form comprises: generating a set of capacitor state-space equations by applying Kirchhoff s current law (KCL) on the nodes of the simplified electric circuit. (Serrano, as cited above, also see page 4 ¶ 1: “The current flow on each node of the system is defined according to Kirchhoff’s current law to obtain gS7.” As this is a circuit
Regarding Claim 8
Serrano teaches:
The method of claim 1, wherein generating the representation of the electrical power grid in the state-space form comprises: generating a set of inductor state-space equations by applying Kirchhoff s voltage law (KVL) on the branches of the simplified electric circuit. (Serrano cited above for use case one – see the equations, as POSITA would have readily inferred that these are the result of applying KVL and KCL to the branches and nodes of the circuit, e.g. see eq. 33-34.
Regarding Claims 12-20
Claims 12-20 are parallel claims to the representative claims discussed above, and as such are rejected under similar rationales as discussed above.
Regarding Claims 21-22
These are rejected in view of Serrano, as taken in combination with Saied above – Saied, as cited above, teaches this is for a multi-core CPU.
Claim(s) 11 is/are rejected under 35 U.S.C. 103 as being unpatentable over Serrano-Jiménez (hereinafter Serrano), Daniel, et al. "Stability tool for electric power systems with a high penetration of electronic power converters." Electric Power Systems Research 210 (2022): 108115 in view of Saied, Noman. "Novel parallel computing decoupling methods for power system distribution networks." (2022) and in further view of Daxer at al., US 2024/0160443.
When a term in the prior art has its meaning explained by another reference (see MPEP § 2131.01) in view of Colorado State University (hereinafter Colorado), SIEMENS POWER SYSTEM SIMULATION FOR ENGINEERS® (PSS/E), Lab 2: Introduction to Slider Binary Files, accessed via WayBack machine with archive date of Apr. 2018, URL: www(dot)engr(dot)colostate(dot)edu/ECE461/FA13/LAB2/LAB2(dot)pdf
Regarding Claim 11.
Serrano teaches:
The method of claim 1, wherein the electrical power grid is a three-phase symmetric system. (Serrano, see subsection for use case III, specifically: “The single line diagram of this use case is illustrated in Fig. 5, where the green boxes represent the sources (in this case electronic converters), and the red triangles represent the loads” – i.e. a single line representation of a three-phase symmetric system
To clarify on the meaning of “single line diagram”, see Colorado page 2 section “Introduction to One-Line Diagrams”: “A one-line diagram is a simplified graphical representation of a three phase power system, used extensively in the electrical utility industry. In power engineering, if we assume that the three phases of a system are balanced [i.e. symmetric], the 3 phase system can be represent with a single line (I.E. one line diagram) which simplifies schematics. This makes the evaluation of the system much less complicated without losing any information. Per unit voltage used extensively in one-line diagrams to further simplify the process.””
Claim(s) 9-10 is/are rejected under 35 U.S.C. 103 as being unpatentable over Serrano-Jiménez (hereinafter Serrano), Daniel, et al. "Stability tool for electric power systems with a high penetration of electronic power converters." Electric Power Systems Research 210 (2022): 108115 in view of Saied, Noman. "Novel parallel computing decoupling methods for power system distribution networks." (2022) and in further view of Daxer at al., US 2024/0160443 and in further view of Wang, L., et al. "Methods of interfacing rotating machine models in transient simulation programs." IEEE Transactions on Power Delivery 25.2 (2010): 891-903.
Regarding Claim 9
While Serrano does not explicitly teach the following taken alone, Serrano in view of
The method of claim 1, wherein generating the simplified electric circuit comprises:
replacing a load with one or more elements that define an equivalent impedance value; (Serrano, use case II: “The single line diagram of this use case is illustrated in Fig. 5, where the green boxes represent the sources (in this case electronic converters), and the red triangles represent the loads. The values of the line impedances and the passive loads are indicated in the Figure. The employed voltage and power base values are 138 kV and 100 MVA, respectively”- i.e. the loads were replaced with impedances – to clarify, use case III as well: “The transformers and loads are modelled as equivalent RL impedances.”
and replacing a generator with a controlled current or voltage source. (Serrano, as was cited above, as taken in further view of Wang abstract incl.: “…This paper provides a summary of the interfacing techniques that are utilized to integrate the general-purpose models of electrical machines with the rest of the power system network for these studies...” and § I incl.: “Rotating electrical machines…The electrical machines are used as generators and motors in numerous applications in power systems in a wide range of voltage and power levels”
then see § III.A.2: “2) Norton Current Source Method: The machine model may also be interfaced with the network as a Norton current source. This type of machine-network interface is shown in Fig. 3 [16], [35], [36].” – cf. 2-3, and see eq. 13, i.e. it’s a controlled current source with a snubber/shunt resistor (eq. 11-12 and accompanying description)
also, see fig. 11: “Fig. 11. Machine model interface in state-variable-based programs using voltage-controlled current sources.” – as discussed in § IV.A: “The machine models are very common and appear as the built-in library components in many SV simulation tools, including SimPowerSystems and PLECS. To interface the models with the external circuits, which is typically modeled in physical variables and phase coordinates, it is usually assumed that the machines are represented by voltage-controlled current sources [62], [63] as shown in Fig. 11…”
also, see § IV.B, # 2: “…As a result, the equivalent stator branches can be readily included into the external circuit as depicted in Fig. 15, thus achieving a direct interface. Unlike the interface depicted in Fig. 11, here the current-controlled voltage sources are utilized to represent the stator subtransient voltages…”
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the teachings from Serrano on a system for simulating power grids including for transients wherein the generators included ideal voltage sources (e.g. Serrano, fig. 2(b)) with the teachings from Wang on methods for interfacing rotating machine models such as for generators into power grid simulations for transients. The motivation to combine would have been that “This paper mainly considers the machine models that are based on the coupled electric circuit approach, which leads to a relatively small number of equations and have been very effectively utilized for analyzing power systems transients [1]–[4].” (Wang, § I)
In addition, the Examiner notes the KSR rationale of obvious to try applies, i.e. Wang presents a finite list of ways to interface generators with power grid simulations, and Wang’s publication is focused on: “While a large number of machine models may offer beneficial options to the user, it also creates challenges in terms of proper model selection. For example, the same machine modeled in two separate software programs would yield different results leading to much confusion during the implementation and validation stages… The objective of this task force paper is to present to the reader the various interfacing techniques used to integrate the machine models with the power system network in different simulation programs… This paper also provides numerous examples and studies that should help many engineers and researchers in correct use of various machine models and software packages.” (Wang, § I) – e.g. § IV.A notes that “The machine models are very common and appear as the built-in library components in many SV simulation tools, including SimPowerSystems and PLECS. To interface the models with the external circuits, which is typically modeled in physical variables and phase coordinates, it is usually assumed that the machines are represented by voltage-controlled current sources [62], [63] as shown in Fig. 11. in the fact that the machine model is usually formulated as a proper state-variable model with flux linkages and/or currents as internal state variables, and the machine’s terminal voltages as the inputs. Therefore, the interfacing method shown in Fig. 11 assumes a voltage-input, current-output machine model. This input–output requirement of the machine model is determined by its proper state model and results in compatible and incompatible interconnection with the external circuit system…” – see § V for a summary on when to use certain methods and when to use others, i.e. POSITA would have found it obvious to try the various interfacing techniques of Wang, and motivated to use each type of interface depending on the problem they faced, e.g. in § V ¶ 2: “Similar to the EMTP, the direct interfacing of machine models offers better numerical accuracy and can be used with much larger time-step sizes… The indirect interfacing that is achieved using artificial snubbers is a simple but yet very practical way of interconnecting otherwise input-output incompatible subsystems (i.e., the machine model and the external circuit- system).” – i.e. one is more accurate, the other is simple and practical to do. See the remaining parts of § V to clarify on a summary, and see the respective subsections of Wang for each method which discusses it in more detail
Regarding Claim 10.
Serrano in view of Wang teaches:
The method of claim 9, wherein generating the representation of the electrical power grid in the state-space form comprises:
generating a set of controlled current source state-space equations using cut-set techniques. (Serrano, as cited above for the state-space equations and representation, and further see subsection 3 in section 2: “Some typical examples where redundant variables appear are synchronous generators or electronic power converters with L or LCL filters connected in series to transformers or transmission lines, cutsets formed by inductors and/or current sources in closed loops (e.g. in meshed or ring power system topologies) [23] or the cascaded interconnection of π or T transmission line models.”
As was taken in view of Wang above for the controlled current source for the generator model, for the rationale discussed above
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to DAVID A. HOPKINS whose telephone number is (571)272-0537. The examiner can normally be reached Monday to Friday, 10AM to 7 PM EST.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Ryan Pitaro can be reached at (571) 272-4071. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/David A Hopkins/Primary Examiner, Art Unit 2188
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