Prosecution Insights
Last updated: April 19, 2026
Application No. 18/111,644

OPTIMIZING QUBIT CONSUMPTION OF QUANTUM PROGRAMS

Final Rejection §103
Filed
Feb 20, 2023
Examiner
SANKS, SCHYLER S
Art Unit
2129
Tech Center
2100 — Computer Architecture & Software
Assignee
BANK OF AMERICA CORPORATION
OA Round
2 (Final)
72%
Grant Probability
Favorable
3-4
OA Rounds
2y 11m
To Grant
88%
With Interview

Examiner Intelligence

Grants 72% — above average
72%
Career Allow Rate
362 granted / 501 resolved
+17.3% vs TC avg
Strong +16% interview lift
Without
With
+15.9%
Interview Lift
resolved cases with interview
Typical timeline
2y 11m
Avg Prosecution
40 currently pending
Career history
541
Total Applications
across all art units

Statute-Specific Performance

§101
2.6%
-37.4% vs TC avg
§103
46.7%
+6.7% vs TC avg
§102
17.1%
-22.9% vs TC avg
§112
32.2%
-7.8% vs TC avg
Black line = Tech Center average estimate • Based on career data from 501 resolved cases

Office Action

§103
Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim(s) 1-6, 8-15, and 17-19 is/are rejected under 35 U.S.C. 103 as being unpatentable over Peterson (US11494681B1) in view of Gunnels (US20200167278A1), further in view of Reinhardt (US20200117511A1). Regarding claim 1, Peterson teaches a computing platform, comprising: at least one processor (Figure 4: 402); a communication interface communicatively coupled to the at least one processor (Figure 4: 408 and 420); and a memory storing computer-readable instructions (Figure 4: 404 and 416) that, when executed by the at least one processor, cause the computing platform to: receive, from a digital computing device, a quantum program (Figure 5B: 222) of a plurality of quantum programs to be executed on target quantum hardware (Col. 6, lines 24-29, “Quantum cloud system 230 can receive any number of algorithms 222 from any number of access nodes 210 in the environment. Additionally, the quantum cloud system 230 includes functionality to execute algorithms 222 received from disparate access nodes 210 such that the algorithms 222 are executed efficiently.”); scan the quantum program and parse metadata associated with the quantum program using a first machine learning model including abstract syntax trees (“The algorithm 222 is input into a parser 510, and the parser 510 outputs an abstract syntax tree 512 (“syntax tree”). The syntax tree 512 is a representation of structurally valid classical instructions and quantum instructions included in the algorithm. The parser 510 is described in more detail in Section VII.A: Parser.”), wherein the metadata defines contextual logic of the quantum program (“As described previously, an algorithm 222 may include a set of quantum instructions (e.g., computations) that can be executed by the quantum cloud system 230.”); optimize the quantum program by modifying program code of the quantum program for minimum quantum bit (qubit) consumption (Col. 28, lines 1-51. Identity-based reduction and template-based rewriting are described.). Peterson does not teach optimizing the quantum program by modifying program code of the quantum program for minimum qubit consumption using a second machine learning model including a natural language processing model trained to modify the program code based on the contextual logic associated with the quantum program. Gunnels teaches optimizing a quantum program by modifying program code of the quantum program for minimum qubit consumption using a machine learning model including a natural language processing model trained to modify the program code based on the contextual logic associated with the quantum program (¶38 – Data accompanying the quantum program is used to modify the circuit with the natural language processing model). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to optimize the quantum program by modifying program code of the quantum program for minimum qubit consumption using a machine learning model including a natural language processing model trained to modify the program code based on the contextual logic associated with the quantum program in order to accurately compress the quantum program for its intended purpose. Peterson does not teach determining a criticality level of the quantum program based on the contextual logic associated with the quantum program; determine a priority sequence of the quantum program based on the determined criticality level, wherein the priority sequence indicates an order in which the plurality of quantum programs are to be deployed to the target quantum hardware; and transmit the quantum program to the target quantum hardware according to the priority sequence. Reinhardt teaches utilizing contextual information to determine a criticality level of the quantum program based on the contextual logic associated with the quantum program; determine a priority sequence of the quantum program based on the determined criticality level, wherein the priority sequence indicates an order in which the plurality of quantum programs are to be deployed to the target quantum hardware; and transmit the quantum program to the target quantum hardware according to the priority sequence (¶55, the user specification is contextual information of the program which is used to determine criticality and thereby priority and execution order on the target hardware, where it is pushed to the hardware according to its priority in the queue, ¶56-58). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to utilize contextual information to determine a criticality level of the quantum program based on the contextual logic associated with the quantum program; determine a priority sequence of the quantum program based on the determined criticality level, wherein the priority sequence indicates an order in which the plurality of quantum programs are to be deployed to the target quantum hardware; and transmit the quantum program to the target quantum hardware according to the priority sequence in Peterson in order to ensure that a user’s execution preferences are able to be taken into account. Regarding claim 2, Peterson as modified teaches all of the limitations of claim 1, wherein receiving the quantum program includes retrieving the quantum program by accessing the quantum program from a repository (Col. 6, lines 24-29, “…functionality to execute quantum algorithms 222 received from disparate access nodes 210”). Regarding claim 3, Peterson as modified teaches all of the limitations of claim 1, wherein scanning the quantum program to parse metadata associated with the quantum program includes scanning the quantum program at runtime or compile time (“The algorithm 222 is input into a parser 510, and the parser 510 outputs an abstract syntax tree 512 (“syntax tree”). The syntax tree 512 is a representation of structurally valid classical instructions and quantum instructions included in the algorithm. The parser 510 is described in more detail in Section VII.A: Parser.” – Parser 510 is a part of the compiler). Regarding claim 4, Peterson as modified teaches all of the limitations of claim 1, wherein the metadata associated with the quantum program includes a domain name, a task name, program details, qubit quantity information, target quantum hardware information, and priority sequence information of the quantum program (see rejection of claim 1, details of the program to be compiled can be considered “program details” and the user specification can be considered “priority sequence information”). Regarding claim 5, Peterson as modified teaches all of the limitations of claim 1, wherein optimizing the quantum program includes modifying the program code of the quantum program to consume fewer qubits as compared to a number of qubits consumed by the quantum program before the optimization (Col. 28, lines 1-22, the compressor halves the amount of qubit instructions). Regarding claim 6, Peterson as modified teaches all of the limitations of claim 1, wherein optimizing the quantum program includes automatically modifying the program code of the quantum program for minimum qubit consumption without manual intervention (Col. 28, lines 1-22, the compressor automatically halves the amount of qubit instructions). Regarding claim 8, Peterson as modified teaches all of the limitations of claim 1, wherein optimizing the quantum program includes dividing the quantum program into two or more logical portions (Col. 27, lines 46-64, the cell schedule can be considered such a division). Regarding claim 9, Peterson as modified teaches all of the limitations of claim 1, wherein the digital computing device is a computer of a developer writing one or more quantum programs (Col. 9, lines 41-52, Quil programming). Regarding claims 10-15 and 17-18, Peterson as modified according to claims 1-6 and 8-9 perform the method of the corresponding claims in claims 10-15 and 17-18 under normal operation. Regarding claim 19, Peterson as modified according to claim 1 teaches all of the limitations of claim 19, see Col. 49, lines 1-45 regarding the computer-readable storage media storing instructions that execute the claimed process. Claim(s) 7, 16, and 20 is/are rejected under 35 U.S.C. 103 as being unpatentable over Peterson (US11494681B1) in view of Gunnels (US20200167278A1), further in view of Reinhardt (US20200117511A1) as applied to claim 1, further in view of Iwanir (US20170351512A1). Regarding claim 7, Peterson as modified teaches all of the limitations of claim 1, but does not teach wherein optimizing the quantum program includes generating and sending, to the digital computing device, one or more code change recommendations for minimizing qubit consumption; and wherein the computing platform further includes instructions that, when executed, cause the computing platform to cause the digital computing device to prompt a user of the digital computing device to update the quantum program based on the one or more code change recommendations. Iwanir teaches optimizing a program wherein the optimizing comprises generating and sending, to a digital computing device, one or more code change recommendations for increasing efficiency; and wherein the computing platform further includes instructions that, when executed, cause the computing platform to cause the digital computing device to prompt a user of the digital computing device to update the program based on the one or more code change recommendations (¶55, efficiency improvements are generated and suggested to the developer). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to further include, in Peterson, generating and sending, to the digital computing device, one or more code change recommendations for minimizing qubit consumption; and wherein the computing platform further includes instructions that, when executed, cause the computing platform to cause the digital computing device to prompt a user of the digital computing device to update the quantum program based on the one or more code change recommendations in order to improve program efficiency. Regarding claims 16 and 20, Peterson as modified according to claim 7 teaches all of the limitations in these corresponding claims as noted with respect to claim 7. Response to Arguments Applicant’s remarks filed 12/22/2025 have been fully considered. Applicant has argued that Gunnels does not teach the natural language processing model as amended. ¶38 of Gunnels discuses how the natural language processing model is utilized in gate rewriting and includes determining the intended functionality from “comments and/or other text accompanying the input quantum circuit”. In this light, Gunnels can be interpreted to disclose the amended limitations. Conclusion Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to SCHYLER S SANKS whose telephone number is (571)272-6125. The examiner can normally be reached 06:30 - 15:30 Central Time, M-F. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Michael Huntley can be reached at (303) 297-4307. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /SCHYLER S SANKS/Primary Examiner, Art Unit 2129
Read full office action

Prosecution Timeline

Feb 20, 2023
Application Filed
Sep 18, 2025
Non-Final Rejection — §103
Dec 22, 2025
Response Filed
Mar 24, 2026
Final Rejection — §103 (current)

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Prosecution Projections

3-4
Expected OA Rounds
72%
Grant Probability
88%
With Interview (+15.9%)
2y 11m
Median Time to Grant
Moderate
PTA Risk
Based on 501 resolved cases by this examiner. Grant probability derived from career allow rate.

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