DETAILED ACTION
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Amendment
The amendment filed on 11/14/2025 has been entered. Claims 1-3, 5-10, 12-17, and 19-23 remain pending in this application. Applicant’s amendments to claims 3, 10, and 17 have overcome the claim objection previously set forth in the Non-Final Office Action. Therefore, Examiner withdraws the claim objection for claims 3, 10, and 17.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 1-2, 6-9, 13-16, and 20 are rejected under 35 U.S.C. 103 as being unpatentable over Ma et al. (US Pub. No. 2022/0365815 A1 hereinafter Ma) in view of Falco et al. (US Pub. No. 2013/0097615 A1 hereinafter Falco) in view of Rodrigues et al. (US Pub. No. 2011/0145835 A1 hereinafter Rodrigues).
As per claim 1, Ma teaches a method, comprising: receiving a first plurality of messages comprising a command from a queue manager to generate a ring adjustment flag (¶ [0033]-[0034], “FIG. 2 includes a high-level block diagram that illustrates how a queue manager can implement an insertion scheme to manage a primary queue buffer 202 (or simply “primary buffer”)…When the read pointer reads a queuing element in an entry in a circular buffer, the read pointer can simply progress to the next entry in the circular buffer. In contrast, if the primary buffer 202 were a non-circular buffer, then it would be necessary to shift all queuing elements when one is consumed. In protocol stacks suitable for 4G/5G network technologies, the primary buffer 202 may be used as a queue for incoming traffic following flow classifications, or the primary buffer 202 may be used as a queue for quality of service (QoS) traffic after QoS classifications.” ¶ [0039], “Insertion indicators may also be used to expand the primary buffer 202 if capacity of the primary buffer 202 exceeds a threshold. For instance, insertion indicators may be used to ensure that the primary buffer 202 does not run out of its allocated memory space. As an example, if the queue manager determines that the write pointer is in danger of overwriting an existing queuing element in the primary buffer 202, then the queue manager can delete the most recently populated queuing element from the primary buffer 202, insert an insertion indicator to expand the amount of available memory space, and then cause the deleted queuing element to be written into the secondary buffer that is pointed to by the insertion indicator.”); placing the first plurality of messages into sequential slots in a first ring queue until the command is received (¶ [0034], “The primary buffer 202 can be any region of physical memory storage in which data can be temporarily stored. For example, the primary buffer 202 may be a circular buffer (also referred to as a “cyclic buffer” or “ring buffer”) that is representative of a data structure that uses a buffer of fixed size as if it were connected end-to-end.” ¶ [0036], “The queuing elements may be stored in a contiguous memory space such that multiple queuing elements can be dequeued at once. For example, multiple queuing elements may be dequeued at once if execution of one queuing element depends on the outcome of execution of the preceding queuing element. Storing queuing elements in a contiguous memory space (e.g., a circular buffer) improves operational efficiency of the bus to which the queue manager is communicatively connected and avoids excessive delays due to latencies in accessing system data.” See also para. 0035 and 0039.); in response to receiving the command from the queue manager to generate the ring adjustment flag, placing the ring adjustment flag into a next available slot of the sequential slots in the first ring queue (¶ [0037], “Assume that the primary buffer 202 includes a sequence of queuing elements that are stored in contiguous memory space allocated for the queue. Moreover, assume that each entry is of identical size and consistent format. To implement the insertion scheme, a queue manager can insert a special queuing element in which a field is defined to be an “insertion indicator,” which is actually a pointer to a storage space where control information for a sub-queue may be stored.” ¶ [0041], “First, a secondary buffer may replace a queuing element in the primary buffer 302 at the location. In this situation, the queue manager changes the queuing element in the primary buffer 302 to a special queuing element that includes an insertion indicator, which points to the control information of the secondary buffer. Second, a secondary buffer may be inserted before a regular queuing element in the primary buffer 302. In this situation, the regular queuing element is saved to a storage space (e.g., a register) and then replaced with a special queuing element that includes an insertion indicator.”); and placing a second plurality of messages received after the command to generate the ring adjustment flag into sequential slots in a second ring queue (¶ [0038], “However, each secondary buffer 204a-b may also have a unique piece of information defined in the control information, namely, a return pointer (subq_return). The return pointer indicates where the sub-queue will return to. If the return pointer points to the control information of the primary buffer 202, then the sub-queue will return to the primary buffer 202 when all queuing elements in the sub-queue are exhaustively processed. Alternatively, the return pointer may point to the control information of another sub-queue, as further discussed below with reference to FIG. 3. Thus, insertion indicators can be used to nest sub-queues within the primary buffer 202 without limit.” See also para. 0060-0061.).
Ma teaches the command being generated by a queue manager rather than a virtual machine. Therefore, it is necessary to bring in an additional reference to show that a queue manager can operate within a virtual machine.
Accordingly, Falco teaches receiving a first plurality of messages from a virtual machine (¶ [0030], “A virtual machine 211, such as a Java Virtual Machine (JVM) includes a buffer manager 213 that maintains system memory in the form of direct byte buffers 212, which in turn are used for storing messages and message data to be transmitted (i.e., sent or received) between nodes or components via InfiniBand. The buffer manager can allocate areas (buffers) of memory within the direct byte buffers, under control of the native MessageBus implementation.”).
Ma and Falco are considered to be analogous to the claimed invention because they are in the same field of buffer/queue management. Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to substitute the queue manager of Ma with the buffer manager of Falco to arrive at the claimed invention. This substitution would have been reasonable and yielded predictable results under MPEP § 2143 as both references deal use a manager to send/receive messages from a queue/buffer.
Ma and Falco fail to explicitly teach inserting a message into the next unused slot of a queue.
However, Rodrigues teaches the well-known technique of placing a message into a next available slot of the sequential slots in a queue, wherein the next available slot is different from a filled slot (¶ [0044], “When the queue is implemented using a fixed size array, there may be times when the queue is full when the first thread is ready to insert another element into it. In an embodiment of the invention, the first thread must wait until a space becomes available in the queue before inserting the object and continuing execution.” ¶ [0046], “Similarly, in an embodiment of the invention where different parts of the data to be inserted into the data carrying object are available at different times, the first thread may check for available space in the queue before or after any data insertion.”).
Ma, Falco, and Rodrigues are all considered to be analogous to the claimed invention because they are all in the same field of queue/buffer management. Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify Ma and Falco with the well-known technique of only inserting elements into a queue if there is an available slot as taught by Rodrigues to arrive at the claimed invention. This modification would have been reasonable and yielded predictable results under MPEP § 2143 as all references deal with managing queues/buffers.
As per claim 2, Ma, Falco, and Rodrigues teach the method of claim 1. Ma also teaches wherein the second ring queue includes a different number of sequential slots in memory than the first ring queue (¶ [0038], “Each secondary buffer 204a-b may resemble the primary buffer 202 in its basic features. For example, each secondary buffer 204a-b may have its own set of read and write pointers and other status registers for control information such as size, type, etc.” See also para. 0072 & Fig. 2.).
As per claim 6, Ma, Falco, and Rodrigues teach the method of claim 1. Ma also teaches in response to receiving another command to generate a second ring adjustment flag before the first ring adjustment flag is read by a device, placing the second ring adjustment flag into a next available slot of the sequential slots in the second ring queue, wherein the second ring flags points to a third ring queue (¶ [0040], “Two insertion indicators have been inserted into the queue of one secondary buffer (i.e., secondary buffer 304a), while one insertion indicator has been inserted into the queue of the other secondary buffer (i.e., secondary buffer 304b). Each of these insertion indicators points to a different tertiary queue buffer 306a-c (or simply “tertiary buffer”).” See also Fig. 3.); and placing a third plurality of messages received after the second plurality of messages into sequential slots in the third ring queue (¶ [0041], “Before queuing elements are inserted into a sub-queue (e.g., one of the secondary buffers 304a-b or tertiary buffers 306a-c), the queue manager may initially organize those queuing elements.” See also Fig. 3.).
As per claim 7, Ma, Falco, and Rodrigues teach the method of claim 1. Ma also teaches wherein the command to generate the ring adjustment flag is received in response to a queue overflow threshold being reached (¶ [0065], “Second, the queue manager may opt to insert a secondary buffer before an existing queuing element to avoid overwriting (e.g., due to overflow). In this situation, the queue manager needs to replace the existing queuing element with a special queuing element that, when executed, routes the processor to the secondary buffer.”), further comprising: placing a second ring adjustment flag into a final available slot of the sequential slots in the second ring queue (¶ [0041], “Before queuing elements are inserted into a sub-queue (e.g., one of the secondary buffers 304a-b or tertiary buffers 306a-c), the queue manager may initially organize those queuing elements…), wherein the second ring queue is sized based on a predicted amount of overflow from the first ring queue (¶ [0066], “Initially, a queue manager can monitor available capacity of a primary buffer in which queuing elements are populated for execution by a processor (step 1201). While monitoring the available capacity, the queue manager may determine that the available capacity of the primary buffer has fallen beneath a predetermined threshold (step 1202). For example, the queue manager may continually examine an overflow (OF) indicator associated with the primary buffer to discover when all entries in the primary buffer have been populated. As another example, the queue manager may continually examine the primary buffer itself to establish when one or zero entries are unfilled.” ¶ [0068], “Said another way, since the secondary buffer is intended to be temporarily used for overflow, the queue manager may wish to release the memory space allocated for the secondary buffer responsive to determining that overflow is no longer an issue. Thus, the queue manager may monitor available capacity of the secondary buffer (step 1205). For example, the queue manager may continually examine either an underflow (UF) indicator or a not empty (NE) indicator associated with the secondary buffer.”), wherein the second ring adjustment flag points to a third ring queue (¶ [0040], “Two insertion indicators have been inserted into the queue of one secondary buffer (i.e., secondary buffer 304a), while one insertion indicator has been inserted into the queue of the other secondary buffer (i.e., secondary buffer 304b). Each of these insertion indicators points to a different tertiary queue buffer 306a-c (or simply “tertiary buffer”).” See also Fig. 3.) and placing a third plurality of messages received after the first plurality of messages into sequential slots in the third ring queue of an equal size as the first ring queue (¶ [0040]-[0041], “Two insertion indicators have been inserted into the queue of one secondary buffer (i.e., secondary buffer 304a), while one insertion indicator has been inserted into the queue of the other secondary buffer (i.e., secondary buffer 304b)…“Before queuing elements are inserted into a sub-queue (e.g., one of the secondary buffers 304a-b or tertiary buffers 306a-c), the queue manager may initially organize those queuing elements.” See also Fig. 3.). (Note: The sizes of the queues are dynamic; therefore, a first, second, and third queue could all be the same size, all be different sizes, etc.)
As per claim 8, it is a system claim comprising similar limitations to claim 1, so it is rejected for similar reasons. Ma also teaches a processor and a memory (¶ [0088], “The computing system 1400 may include a processor 1402, main memory 1406, non-volatile memory 1410…” ¶ [0090], “While the main memory 1406, non-volatile memory 1410, and storage medium 1424 are shown to be a single medium, the terms “storage medium” and “machine-readable medium” should be taken to include a single medium or multiple media that stores one or more sets of instructions 1426.”).
As per claim 9, it is a system claim comprising similar limitations to claim 2, so it is rejected for similar reasons.
As per claim 13, it is a system claim comprising similar limitations to claim 6, so it is rejected for similar reasons.
As per claim 14, it is a system claim comprising similar limitations to claim 7, so it is rejected for similar reasons.
As per claim 15, it is a device claim comprising similar limitations to claim 1, so it is rejected for similar reasons.
As per claim 16, it is a device claim comprising similar limitations to claim 2, so it is rejected for similar reasons.
As per claim 20, it is a device claim comprising similar limitations to claim 6, so it is rejected for similar reasons.
Claim(s) 3, 10, and 17 are rejected under 35 U.S.C. 103 as being unpatentable over Ma, Falco, and Rodrigues as applied to claims 1, 8, and 15 above, and further in view of Taylor et al. (US Pub. No. 2013/0159449 A1 hereinafter Taylor).
As per claim 3, Ma, Falco, and Rodrigues teach the method of claim 1. Ma also teaches wherein the second ring queue includes a different processing operation for reading messages than the first ring queue (¶ [0042], “To execute these operations, the queue manager can implement a special command to incorporate the secondary buffer. This special command may be different than the normal enqueue and dequeue commands. The special command may define the entry point in the primary buffer 302 and the special queuing element which is to be inserted. Moreover, this special command may instruct the queue manager to update the statistics for the primary buffer 302 with additional information about the secondary buffer to which the special element points.”).
Ma, Falco, and Rodrigues fail to teach the processing operation comprising checksum validation, encryption, decryption, formatting, encapsulation, or de-capsulation.
However, Taylor teaches wherein the different processing operation comprises checksum validation, decryption, formatting, encapsulation, or de-capsulation (¶ [0101], “The secondary buffer 1114 prevents the producer from overwriting the event after it has been verified but before processing has been completed by the consumer. Once the event has been copied to the secondary buffer, the event checksum can be calculated and verified against checksum 1212. An incorrect checksum indicates that the consumer was reading the event at the same time the producer was writing the event. In this situation, the consumer restarts its event processing by retrieving and validating the write pointer value. A correctly verified checksum indicates that the consumer successfully received the next event.”).
Ma, Falco, Rodrigues, and Taylor are all considered to be analogous to the claimed invention because they are all in the same field of queue/buffer management. Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify Ma, Falco, and Rodrigues with the checksum verification of Taylor to arrive at the claimed invention. The motivation to modify Ma, Falco, and Rodrigues with the teachings of Taylor is that checksum validation ensures that each message is being processed as it is received in the queue.
As per claim 10, it is a system claim comprising similar limitations to claim 3, so it is rejected for similar reasons.
As per claim 17, it is a device claim comprising similar limitations to claim 3, so it is rejected for similar reasons.
Claim(s) 5, 12, 19, and 21-23 are rejected under 35 U.S.C. 103 as being unpatentable over Ma, Falco, and Rodrigues as applied to claims 1, 8, and 15 above, and further in view of Karr (US Pub. No. 2016/0070535 A1).
As per claim 5, Ma, Falco and Rodrigues teach the method of claim 1. Ma also teaches reading the adjustment flag in the first ring queue (¶ [0037], “Assume that the primary buffer 202 includes a sequence of queuing elements that are stored in contiguous memory space allocated for the queue. Moreover, assume that each entry is of identical size and consistent format. To implement the insertion scheme, a queue manager can insert a special queuing element in which a field is defined to be an “insertion indicator,” which is actually a pointer to a storage space where control information for a sub-queue may be stored.”).
Ma, Falco, and Rodrigues fail to teach deallocating memory assigned to the first queue.
However, Karr teaches deallocating memory addresses assigned to the first ring queue (¶ [0019], “FIG. 4D depicts an example where a second overflow buffer is filling, and draining. FIG. 4E depicts an example state where a second overflow buffer is filling and draining, and previous ring buffers have been released.” ¶ [0037], “If, however, it is determined that there is only one reader and no writers at step 638, this is a condition that can indicate it may be permissible to free memory safely. Put another way, the check can establish that the head ring buffer can be released as no other process references the memory.”) and the device has been provided with each message of the first plurality of messages stored in the first ring queue (¶ [0016], “In other words, the position value stored in each bucket can represent a logical position based on continued wrapping of the ring. When front 241 logically wraps to the point that it collides with back 243, a new and larger ring can be created. New writes to the queue can occur in the new ring while reading can continue in the original ring. This can continue until the ring is empty, at which point the reads can advance to the new ring also.”).
Ma, Falco, Rodrigues, and Karr are considered to be analogous to the claimed invention because they are in the same field of buffer/queue management. Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the method for managing queues of Ma, Falco, and Rodrigues with the deallocating method of Karr to arrive at the claimed invention. The motivation to modify Ma, Falco, and Rodrigues with the teachings of Karr is that deallocating memory assigned to the first queue when the data stored in the first queue is no longer needed frees up memory that can be allocated to other processes such as additional queues.
As per claim 12, it is a system claim comprising similar limitations to claim 5, so it is rejected for similar reasons.
As per claim 19, it is a system claim comprising similar limitations to claim 5, so it is rejected for similar reasons.
As per claim 21, Ma, Falco, and Rodrigues teach the method of claim 1. Ma teaches processing a first plurality of messages stored in the first ring queue prior to the ring adjustment flag (¶ [0034], “The primary buffer 202 can be any region of physical memory storage in which data can be temporarily stored. For example, the primary buffer 202 may be a circular buffer (also referred to as a “cyclic buffer” or “ring buffer”) that is representative of a data structure that uses a buffer of fixed size as if it were connected end-to-end.” ¶ [0036], “The queuing elements may be stored in a contiguous memory space such that multiple queuing elements can be dequeued at once. For example, multiple queuing elements may be dequeued at once if execution of one queuing element depends on the outcome of execution of the preceding queuing element. Storing queuing elements in a contiguous memory space (e.g., a circular buffer) improves operational efficiency of the bus to which the queue manager is communicatively connected and avoids excessive delays due to latencies in accessing system data.” See also para. 0035 and 0039.) and in response to reaching the ring adjustment flag in the first ring queue, processing a subsequent message from the second plurality of messages stored in the second ring queue, wherein the ring adjustment flag indicates an address of a particular slot of the sequential slots of the second ring queue (¶ [0037], “Assume that the primary buffer 202 includes a sequence of queuing elements that are stored in contiguous memory space allocated for the queue. Moreover, assume that each entry is of identical size and consistent format. To implement the insertion scheme, a queue manager can insert a special queuing element in which a field is defined to be an “insertion indicator,” which is actually a pointer to a storage space where control information for a sub-queue may be stored.” ¶ [0041], “First, a secondary buffer may replace a queuing element in the primary buffer 302 at the location. In this situation, the queue manager changes the queuing element in the primary buffer 302 to a special queuing element that includes an insertion indicator, which points to the control information of the secondary buffer. Second, a secondary buffer may be inserted before a regular queuing element in the primary buffer 302. In this situation, the regular queuing element is saved to a storage space (e.g., a register) and then replaced with a special queuing element that includes an insertion indicator.”).
Ma, Falco, and Rodrigues fail to explicitly teach processing the second ring queue after the first ring queue has finished processing.
However, Karr teaches processing a subsequent message from the second plurality of messages stored in the second ring queue and to cause the subsequent messages to be accessed from the second ring queue (¶ [0016], “In other words, the position value stored in each bucket can represent a logical position based on continued wrapping of the ring. When front 241 logically wraps to the point that it collides with back 243, a new and larger ring can be created. New writes to the queue can occur in the new ring while reading can continue in the original ring. This can continue until the ring is empty, at which point the reads can advance to the new ring also.” See also para. 0019.).
Ma, Falco, Rodrigues, and Karr are considered to be analogous to the claimed invention because they are in the same field of buffer/queue management. Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to substitute the way primary and secondary queues are processed as taught in Ma, Falco, and Rodrigues with the way primary and secondary queues are processed as taught in Karr to arrive at the claimed invention. This substitution would have yielded predictable results and have been reasonable under MPEP § 2143 as the references deal with processing elements from primary and secondary queues.
As per claim 22, it is a system claim comprising similar limitations to claim 21, so it is rejected for similar reasons.
As per claim 23, it is a device claim comprising similar limitations to claim 21, so it is rejected for similar reasons.
Response to Arguments
Applicant’s arguments with respect to claim(s) 1-3, 5-10, 12-17, and 19-23 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument. Applicant has amended the claims with new limitations that change the scope of the claimed invention. Therefore, the amended claims necessitate new rejections, as addressed above. The amended claims are not allowable over prior art cited previously in the Non-Final Office Action along with additional reference, necessitated by amendment, for reasons, indicated above.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
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/J.D.E./Examiner, Art Unit 2199
/LEWIS A BULLOCK JR/Supervisory Patent Examiner, Art Unit 2199