DETAILED ACTION
Response to Amendment
This is in response to Applicants amendment filed 04/09/2026 which has been entered. Claims 1, 4, 7, 11, 14 and 17 have been amended. No Claims have been cancelled. No Claims have been added. Claims 1-19 are still pending in this application, with Claims 1 and 11 being independent.
Response to Arguments
Applicant’s arguments with respect to Claim(s) 1-19 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument.
Claim Rejections - 35 USC § 103
The text of those sections of Title 35, U.S. Code not included in this action can be found in a prior Office action.
Claim(s) 1, 3, 6, 13 and 16 are rejected under 35 U.S.C. 103 as being unpatentable over Dutta et al (2018/0288167 A1) in view of Clad et al (2020/0322264 A1).
As per Claim 1, Dutta teaches a device comprising: at least one processor performing a first set of processes for exchanging traffic with a user and a second set of processes comprising keep-alive traffic required to maintain the exchange of the first set of processes, where the second set of processes is isolated from the first set of processes (Figure 1 – References 100 and 102; Page 9, Paragraphs [0074] – [0076], [0079] – Page 10, Paragraphs [0081] and [0084]).
(Note: In paragraphs [0074], Dutta describes a network device capable of receiving and forwarding packets in the form of data packets or signaling or protocol-related packets [e.g. keep-alive packets]. The Examiner is considering data packets/signaling-related packets to be the recited first set of processes for exchanging traffic with a user and the protocol-related packets [e.g. keep-alive packets] to be keep-alive traffic required to maintain the exchange of the first set of processes)
(Note: In paragraph [0076], Dutta indicates that the network device may include one or more processors and that the processor may include single or multi-core processors. In paragraph [0077], Dutta describes host operating systems as a function of a hypervisor which facilitates management of subsystems [i.e. virtual machines - VM])
(Note: In paragraph [0079], Dutta indicates the operating system/hypervisor is divided into a kernel space and a user space and describes virtual machines as operating independently of other virtual machines executed by the network device and are also unaware of the presence of other virtual machines)
(Note: The Examiner is considering the processor to be a multi-core processor within a network device with one core being dedicated to exchanging traffic with a user and a secondary core being dedicated to keep-alive traffic; and as the virtual machine operate independently and are unaware of each other the second set of processes is isolated from the first set of processes is taught by Dutta)
Dutta does not teach a steering network capable of routing said network traffic and said keep-alive traffic to said user; wherein said network traffic is different than said keep-alive traffic; wherein said first set of processes does not exchange data with nor send data that is available to said second set of processes; and wherein said second set of processes is connected to said steering network via a path that is independent from that by which the first set of processes is connected to said steering network.
However, Clad teaches a steering network capable of routing said network traffic and said keep-alive traffic to said user; wherein said network traffic is different than said keep-alive traffic; wherein said first set of processes does not exchange data with nor send data that is available to said second set of processes; and wherein said second set of processes is connected to said steering network via a path that is independent from that by which the first set of processes is connected to said steering network (Figure 1 – Reference 140 and 160; Figure 2 – Reference 210a, 210b, 220a and 220b; Page 2, Paragraph [0020]; Page 3, Paragraphs [0027] and [0028]; Page 5, Paragraphs [0040] – [0042]).
(Note: In paragraph [0020], Clad describes services routes as paths network traffic [i.e. data packets] traverse in a network. Clad indicates that services routes may be associated with a color that indicate one or more requirements for steering the network traffic through the network. In paragraph [0027], Clad describes policies used to steer traffic through the network)
(Note: In paragraph [0028], Clad describes the classification of packets using a Forward-Class value. Clad provides an example of a router detecting and marking voice traffic with a Forward Class 1 value, while the rest of traffic is marked with a Forward Class 0 value. As a result, voice traffic is steered in a per-flow policy sent over the path defined in per-destination policy P1 while non-voice traffic is steered over a different path defined in per-destination policy P2. The Examiner is considering network traffic to be flagged with a Forward Class of 1 while keep-alive packets are flagged with a Forward Class 0 value. The combined teachings of Dutta and Clad are found to read on the recitations of the claimed language)
It would have been obvious to one of ordinary skill before the effective filing date of the claimed invention to modify the device taught by Dutta with the device taught by Clad to separate persistent low-bandwidth keep-alive sessions which enables the use of cheaper or slower network links for maintenance traffic while preserving expensive or high-speed links for revenue-generating ore high-priority traffic.
As per Claims 3 and 13, Dutta teaches where the first set of processes and the second set of processes are performed on respectively different processors as described in Claim 1. (Note: the processor described by Dutta as one or more processors; and Dutta indicates that a processor maybe single core or multi-core. In a circumstance where single core processors are being utilized having processors dedicates to a single set or processes that are independent and unaware of one another reads on the claimed language)
As per Claims 6 and 16, Dutta teaches where the first set of processes and the second set of processes are performed on a single processor as described in Claim 1.
Claim(s) 2, 4, 5, 7-12, 14, 15 and 17-19 are rejected under 35 U.S.C. 103 as being unpatentable over Dutta et al (2018/0288167 A1) in view of Clad et al (2020/0322264 A1) as applied to Claims 1 and 11 above, and further in view of Gunasekara et al (2017/0366983 A1).
As per Claims 2 and 12, the combination of Dutta and Clad teaches the device of claim 1; but does not teach the device is a Converged Cable Access Platform (CCAP). However, Gunasekara teaches the device is a Converged Cable Access Platform (CCAP) (Page 10, Paragraph [0119]).
It would have been obvious to one of ordinary skill before the effective filing date of the claimed invention to modify the device and method taught by Dutta and Clad with the device and method taught by Gunasekara to improve multi-core processor performance by maximizing cache locality, reducing synchronization overhead and freeing other core for heavy parallelizable tasks.
As per Claims 4 and 14, the combination of Dutta, Clad and Gunasekara teaches having an output selectively connectable to a transmission medium to at least one subscriber (Figures 1 and 1a – References 101 and 106; Page 4, Paragraph [0068]; Page 6, Paragraph [0090]), and said steering network is interposed between the output and the respectively different processors (Network/Backhaul: Figure 1; Figure 13 – References 1308 and 1310; Page 6, Paragraphs [0088] – [0091]; Page 19, Paragraph [0218] and [0222]).
It would have been obvious to one of ordinary skill before the effective filing date of the claimed invention to modify the device and method taught by Dutta and Clad with the device and method taught by Gunasekara to improve multi-core processor performance by maximizing cache locality, reducing synchronization overhead and freeing other core for heavy parallelizable tasks.
As per Claims 5 and 15, the combination of Dutta, Clad and Gunasekara teaches where each processor is connected to the steering network via a path independent of that of the other processor as described in Claims 1 and 4 (Gunasekara: Page 4, Paragraph [0066] and [0069]; Page 11, Paragraph [0128]). (Note: In paragraph [0128], Gunasekara indicates that the access point may offload monitoring to other devices which allows for multiple processors to have multiple paths independent of other processors)
It would have been obvious to one of ordinary skill before the effective filing date of the claimed invention to modify the device and method taught by Dutta and Clad with the device and method taught by Gunasekara to improve multi-core processor performance by maximizing cache locality, reducing synchronization overhead and freeing other core for heavy parallelizable tasks.
As per Claims 7, 8, 17 and 18, the combination of Dutta, Clad and Gunasekara teaches having an output selectively connectable to a transmission medium to at least one subscriber, and said steering network is interposed between the output and the processor; and where each process is connected to the steering network via a path independent of that of the other process as described in Claims 1 and 5.
It would have been obvious to one of ordinary skill before the effective filing date of the claimed invention to modify the device and method taught by Dutta and Clad with the device and method taught by Gunasekara to improve multi-core processor performance by maximizing cache locality, reducing synchronization overhead and freeing other core for heavy parallelizable tasks.
As per Claims 9 and 19, the combination of Dutta, Clad and Gunasekara teaches selectively steer the first set of processes to another device during a failure in the at least one active processor (Page 14, Paragraph [0169]). It would have been obvious to one of ordinary skill before the effective filing date of the claimed invention to modify the device and method taught by Dutta and Clad with the device and method taught by Gunasekara to improve multi-core processor performance by maximizing cache locality, reducing synchronization overhead and freeing other core for heavy parallelizable tasks.
As per Claim 10, the combination of Dutta, Clad and Gunasekara teaches maintain the keep-alive traffic while the at least one active processor performs a reboot of the first set of processes Remote Restart - Reboot: Page 4, Paragraph [0071]; Page 5, Paragraph [0083]). It would have been obvious to one of ordinary skill before the effective filing date of the claimed invention to modify the device and method taught by Dutta and Clad with the device and method taught by Gunasekara to improve multi-core processor performance by maximizing cache locality, reducing synchronization overhead and freeing other core for heavy parallelizable tasks.
As per Claim 11, the combination of Dutta, Clad and Gunasekara teaches a device and method performed on at least one active processor performing a first set of processes for exchanging traffic with a user and a second set of processes comprising keep-alive traffic required to maintain the exchange of the first set of processes, the method comprising: detecting a failure of the first set of processes; and performing a reboot of the first set of processes while the processor continues to perform the second set of processes as described in Claims 1 and 10.
It would have been obvious to one of ordinary skill before the effective filing date of the claimed invention to modify the device and method taught by Dutta and Clad with the device and method taught by Gunasekara to improve multi-core processor performance by maximizing cache locality, reducing synchronization overhead and freeing other core for heavy parallelizable tasks.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. STRATER et al (2022/0070723 A1), He et al (2018/0219777 A1), Johnson et al (2015/0160961 A1), KAIPPILLY et al (2022/0094750 A1), Maciocco et al (2012/0005501 A1), Straub et al (2017/0251026 A1), KACHARE et al (2020/0125157 A1) and Andreoli-Fang et al (2020/0275464 A1). Each of these describes systems and methods to maintain communication during the occurrence of network or equipment failure within a communication network.
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to KHARYE POPE whose telephone number is (571)270-5587. The examiner can normally be reached Monday - Friday 8AM - 4PM.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Ahmad Matar can be reached at 571-272-7488. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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KHARYE POPE
Primary Examiner
Art Unit 2693
/KHARYE POPE/Primary Examiner, Art Unit 2693
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