DETAILED ACTION
Response to Amendment
This is in response to Applicants amendment filed 02/24/2023 which has been entered. No Claims have been amended. No Claims have been cancelled. No Claims have been added. Claims 1-19 are still pending in this application, with Claims 1 and 11 being independent.
Response to Arguments
Applicant’s arguments with respect to Claim(s) 1-19 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claim(s) 1, 3, 6, 13 and 16 are rejected under 35 U.S.C. 102(a)(2) as being anticipated by Dutta et al (2018/0288167 A1).
As per Claim 1, Dutta teaches a device comprising: at least one processor performing a first set of processes for exchanging traffic with a user and a second set of processes comprising keep-alive traffic required to maintain the exchange of the first set of processes, where the second set of processes is isolated from the first set of processes (Figure 1 – References 100 and 102; Page 9, Paragraphs [0074] – [0076], [0079] – Page 10, Paragraphs [0081] and [0084]).
(Note: In paragraphs [0074], Dutta describes a network device capable of receiving and forwarding packets in the form of data packets or signaling or protocol-related packets [e.g. keep-alive packets]. The Examiner is considering data packets/signaling-related packets to be the recited first set of processes for exchanging traffic with a user and the protocol-related packets [e.g. keep-alive packets] to be keep-alive traffic required to maintain the exchange of the first set of processes)
(Note: In paragraph [0076], Dutta indicates that the network device may include one or more processors and that the processor may include single or multi-core processors. In paragraph [0077], Dutta describes host operating systems as a function of a hypervisor which facilitates management of subsystems [i.e. virtual machines - VM])
(Note: In paragraph [0079], Dutta indicates the operating system/hypervisor is divided into a kernel space and a user space and describes virtual machines as operating independently of other virtual machines executed by the network device and are also unaware of the presence of other virtual machines)
(Note: The Examiner is considering the processor to be a multi-core processor within a network device with one core being dedicated to exchanging traffic with a user and a secondary core being dedicated to keep-alive traffic; and as the virtual machine operate independently and are unaware of each other the second set of processes is isolated from the first set of processes is taught by Dutta)
As per Claims 3 and 13, Dutta teaches where the first set of processes and the second set of processes are performed on respectively different processors as described in Claim 1. (Note: the processor described by Dutta as one or more processors; and Dutta indicates that a processor maybe single core or multi-core. In a circumstance where single core processors are being utilized having processors dedicates to a single set or processes that are independent and unaware of one another reads on the claimed language)
As per Claims 6 and 16, Dutta teaches where the first set of processes and the second set of processes are performed on a single processor as described in Claim 1.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 2, 4, 5, 7-12, 14, 15 and 17-19 are rejected under 35 U.S.C. 103 as being unpatentable over Dutta et al (2018/0288167 A1) in view of Gunasekara et al (2017/0366983 A1).
As per Claims 2 and 12, Dutta teaches the device of claim 1; but does not teach the device is a Converged Cable Access Platform (CCAP). However, Gunasekara teaches the device is a Converged Cable Access Platform (CCAP) (Page 10, Paragraph [0119]). It would have been obvious to one of ordinary skill before the effective filing date of the claimed invention to modify the device and method taught by Dutta with the device and method taught by Gunasekara to improve multi-core processor performance by maximizing cache locality, reducing synchronization overhead and freeing other core for heavy parallelizable tasks.
As per Claims 4 and 14, the combination of Dutta and Gunasekara teaches having an output selectively connectable to a transmission medium to at least one subscriber (Figures 1 and 1a – References 101 and 106; Page 4, Paragraph [0068]; Page 6, Paragraph [0090]), and including a steering network interposed between the output and the respectively different processors (Network/Backhaul: Figure 1; Figure 13 – References 1308 and 1310; Page 6, Paragraphs [0088] – [0091]; Page 19, Paragraph [0218] and [0222]).
It would have been obvious to one of ordinary skill before the effective filing date of the claimed invention to modify the device and method taught by Dutta with the device and method taught by Gunasekara to improve multi-core processor performance by maximizing cache locality, reducing synchronization overhead and freeing other core for heavy parallelizable tasks.
As per Claims 5 and 15, the combination of Dutta and Gunasekara teaches where each processor is connected to the steering network via a path independent of that of the other processor as described in Claims 1 and 4 (Gunasekara: Page 4, Paragraph [0066] and [0069]; Page 11, Paragraph [0128]). (Note: In paragraph [0128], Gunasekara indicates that the access point may offload monitoring to other devices which allows for multiple processors to have multiple paths independent of other processors)
It would have been obvious to one of ordinary skill before the effective filing date of the claimed invention to modify the device and method taught by Dutta with the device and method taught by Gunasekara to improve multi-core processor performance by maximizing cache locality, reducing synchronization overhead and freeing other core for heavy parallelizable tasks.
As per Claims 7, 8, 17 and 18, the combination of Dutta and Gunasekara teaches having an output selectively connectable to a transmission medium to at least one subscriber, and including a steering network interposed between the output and the processor; and where each process is connected to the steering network via a path independent of that of the other process as described in Claims 1 and 5.
It would have been obvious to one of ordinary skill before the effective filing date of the claimed invention to modify the device and method taught by Dutta with the device and method taught by Gunasekara to improve multi-core processor performance by maximizing cache locality, reducing synchronization overhead and freeing other core for heavy parallelizable tasks.
As per Claims 9 and 19, the combination of Dutta and Gunasekara teaches selectively steer the first set of processes to another device during a failure in the at least one active processor (Page 14, Paragraph [0169]). It would have been obvious to one of ordinary skill before the effective filing date of the claimed invention to modify the device and method taught by Dutta with the device and method taught by Gunasekara to improve multi-core processor performance by maximizing cache locality, reducing synchronization overhead and freeing other core for heavy parallelizable tasks.
As per Claim 10, the combination of Dutta and Gunasekara teaches maintain the keep-alive traffic while the at least one active processor performs a reboot of the first set of processes Remote Restart - Reboot: Page 4, Paragraph [0071]; Page 5, Paragraph [0083]). It would have been obvious to one of ordinary skill before the effective filing date of the claimed invention to modify the device and method taught by Dutta with the device and method taught by Gunasekara to improve multi-core processor performance by maximizing cache locality, reducing synchronization overhead and freeing other core for heavy parallelizable tasks.
As per Claim 11, the combination of Dutta and Gunasekara teaches a device and method performed on at least one active processor performing a first set of processes for exchanging traffic with a user and a second set of processes comprising keep-alive traffic required to maintain the exchange of the first set of processes, the method comprising: detecting a failure of the first set of processes; and performing a reboot of the first set of processes while the processor continues to perform the second set of processes as described in Claims 1 and 10.
It would have been obvious to one of ordinary skill before the effective filing date of the claimed invention to modify the device and method taught by Dutta with the device and method taught by Gunasekara to improve multi-core processor performance by maximizing cache locality, reducing synchronization overhead and freeing other core for heavy parallelizable tasks.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. STRATER et al (2022/0070723 A1), He et al (2018/0219777 A1), Johnson et al (2015/0160961 A1), KAIPPILLY et al (2022/0094750 A1), Maciocco et al (2012/0005501 A1), Straub et al (2017/0251026 A1), KACHARE et al (2020/0125157 A1) and Andreoli-Fang et al (2020/0275464 A1). Each of these describes systems and methods to maintain communication during the occurrence of network or equipment failure within a communication network.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to KHARYE POPE whose telephone number is (571)270-5587. The examiner can normally be reached Monday - Friday 8AM - 4PM.
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KHARYE POPE
Primary Examiner
Art Unit 2693
/KHARYE POPE/Primary Examiner, Art Unit 2693