Prosecution Insights
Last updated: April 19, 2026
Application No. 18/114,221

LIGHT SOURCE DEVICE AND DISPLAY APPARATUS HAVING THE SAME

Final Rejection §103
Filed
Feb 24, 2023
Examiner
YEUNG LOPEZ, FEIFEI
Art Unit
2899
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Global Technologies Co. Ltd.
OA Round
2 (Final)
81%
Grant Probability
Favorable
3-4
OA Rounds
2y 6m
To Grant
78%
With Interview

Examiner Intelligence

Grants 81% — above average
81%
Career Allow Rate
858 granted / 1060 resolved
+12.9% vs TC avg
Minimal -3% lift
Without
With
+-3.0%
Interview Lift
resolved cases with interview
Typical timeline
2y 6m
Avg Prosecution
47 currently pending
Career history
1107
Total Applications
across all art units

Statute-Specific Performance

§101
0.4%
-39.6% vs TC avg
§103
52.0%
+12.0% vs TC avg
§102
26.1%
-13.9% vs TC avg
§112
17.6%
-22.4% vs TC avg
Black line = Tech Center average estimate • Based on career data from 1060 resolved cases

Office Action

§103
DETAILED ACTION The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Rejections - 35 USC § 103 The text of those sections of Title 35, U.S. Code not included in this action can be found in a prior Office action. Claim(s) 1,8,10-13,15,16,18 is/are rejected under 35 U.S.C. 103 as being unpatentable over Wang et al (PG Pub 2024/0172361 A1) and Iguchi (PG Pub 2018/0254226 A1). Regarding claim 1, Wang teaches an electronic unit (130, fig. 4); a driving controller (layers below the 130) provided with a control circuit to control driving of the electronic unit (paragraph [0030]); and an electrode pad (124) provided on a top surface of the driving controller so that the electronic unit is bonded and configured to transmit an electrical signal provided from the driving controller to the electronic unit (paragraph [0030] and fig. 4), an external connection pad (see EC, fig. 4 below) provided on a bottom surface of the driving controller and electrically connected to the control circuit to transmit an electrical signal (intended use; Wang device can function as claimed) provided from the outside to the control circuit; and a via plug (VP, fig. 4 above) partially passes through the driving controller, wherein the driving controller comprises a substrate (104, 106 and 108, fig. 4) on which the control circuit is disposed; a through-electrode (TE, fig. 4 above) connected to the external connection pad to pass through the substrate, and a shared connection pad (SCP, fig. 4 above) connected to the control circuit on the top surface of the substrate to electrically connect each of a lower end of the via plug and an upper end of the through-electrode to the control circuit, wherein the electrode pad is laminated on a top surface of the substrate on which the control circuit is disposed, and wherein the lower end of the via plug and the upper end of the through-electrode are misaligned (fig. 4) to be connected to top and bottom surfaces of the shared connection pad, respectively. Wang does not teach in fig. 4 that electronic unit to be a light source device comprising: a LED chip configured to emit light. Wang teaches the electronic device can be an LED (paragraph [0021]). It would have been obvious to the skilled in the art before the effective filing date of the invention to make the electronic unit an LED for the known be benefit of providing a lighting device or a display. Wang does not teach which is the light emitting direction, thus, it does not teach the driving controller is provided at an opposite side of a light emitting direction of the LED chip. It would have been obvious to the skilled in the art before the effective filing date of the invention to make the light emitting direction to be the upward direction of fig. 4, away from interconnecting wirings, for the known benefit of extracting light unobstructed by the interconnecting wirings to increase light output. Wang does not teach a test pad provided on the top surface of the driving controller so as to be electrically connected to the control circuit and configured to perform electrical measurement. In the same field of endeavor, Iguchi teaches a test pad (TGND, TE, TV, or TR, fig. 8) provided on the top surface of the driving controller (layers below LEDs) so as to be electrically connected to the control circuit (fig. 8) and configured to perform electrical measurement (paragraph [0145]), for the known benefit of ensuring proper functioning of the device. Wang in view of Iguchi teaches the via plug (VP, fig. 4 of Wang) connected to the test pad (through 124, fig. 4 of Wang) to partially pass through the driving controller, PNG media_image1.png 808 792 media_image1.png Greyscale Regarding claim 8, Iguchi teaches the light source device of claim 1, wherein the test pad (TE, for example, fig. 8) is spaced apart from the electrode pad (206) and provided on an edge portion of the top surface of the driving controller. Regarding claim 10, Wang does not teach the through-electrode has a length of 40 µm to 1,000 µm. It would have been obvious to the skilled in the art before the effective filing date of the invention to adjust the length of the through-electrode, to 40 µm to 1,000 µm, for example, by optimizing the substrate thickness and the current going through the through-electrode and other electrical characteristics, according to the intended use of the device. “[W]here the general conditions of a claim are disclosed in the prior art, it is not inventive to discover the optimum or workable ranges by routine experimentation.” In re Aller, 220 F.2d 454, 456, 105 USPQ 233, 235 (CCPA 1955). Regarding claim 11, Wang teaches the light source device of claim 3, wherein the external connection pad is provided in plurality (three ECs, only one is labeled in fig. 4 above). Wang does not teach an interval between the plurality of external connection pads ranges of 30 µm to 800 µm. It would have been obvious to the skilled in the art before the effective filing date of the invention to adjust an interval between the plurality of external connection pads, to range of 30 µm to 800 µm, for example, to optimize the size of the LED (pixel size), drive current and other electrical requirements according to the intended use of the device. Regarding claim 12, Wang teaches the light source device of claim 1, wherein the driving controller further comprises an insulating layer (122, fig. 4) disposed on the top surface of the substrate, the control circuit comprises: a line layer (116 on the right) disposed on the top surface of the substrate so as to be covered by the insulating layer; and a conductive via (fig. 4) configured to at least partially pass through the insulating layer so as to be connected to the line layer, and the electrode pad is disposed on the insulating layer so as to be connected to the conductive via. Regarding claim 13, Wang teaches the light source device of claim 1, further comprising a molding part (140, fig. 4) configured to cover the LED chip on the driving controller. Regarding claim 15, does not teach the LED chip is provided in plurality. Iguchi teaches the LED chip is provided in plurality (200, fig. 12), for the benefit of providing an image display with plural pixels (paragraph [0001]). Wang in view of Iguchi teaches the plurality of LED chips comprise first and second electrodes (132, fig. 4 of Wang), and the electrode pad comprises: a first electrode pad (124) connected to the first electrode of each of the LED chips; and a second electrode pad (124) connected to the second electrode of each of the LED chips. Regarding claim 16, Wang does not explicitly teach the light source device of claim 15, wherein each of an interval between two adjacent first electrode pads and an interval between two adjacent second electrode pads ranges of 1 µm to 300 µm. It would have been obvious to the skilled in the art before the effective filing date of the invention to adjust each of an interval between two adjacent first electrode pads and an interval between two adjacent second electrode pads range of 1 µm to 300 µm, for example, to optimize pixel density according to the intended use of the device. Regarding claim 18, Wang in view of Iguchi teaches a display apparatus comprising: a light source device of claim 1; and a circuit board (100, figs. 7, 11, and 12, paragraph [0097] of Iguchi) on which a plurality of light source devices are arranged and mounted. Claim(s) 14 is/are rejected under 35 U.S.C. 103 as being unpatentable over Wang et al (PG Pub 2024/0172361 A1) and Iguchi (PG Pub 2018/0254226 A1) as applied to claim 13 above, and further in view of Hussell et al (PG Pub 2016/0293811 A1). Regarding claim 14, the previous combination remains as applied in claim 13. The previous combination does not teach the molding part comprises a black additive, a scattering agent, or a fluorescent material. In the same field of endeavor, Hussell teaches a molding part comprises a black additive (106, fig. 1C, paragraph [0042]), for the benefit of increasing contrast (paragraph [0042]). It would have been obvious to the skilled in the art before the effective filing date of the invention to make the molding part to comprise a black additive for the benefit of increasing contrast. Claim(s) 17 is/are rejected under 35 U.S.C. 103 as being unpatentable over Wang et al (PG Pub 2024/0172361 A1) and Iguchi (PG Pub 2018/0254226 A1) as applied to claim 13 above, and further in view of Sadaka et al (PG Pub 2012/0252162 A1). Regarding claim 17, the previous combination remains as applied in claim 13. Wang does not teach each of the LED chips is flip-chip bonded. Iguchi teaches each of the LED chips is flip-chip bonded (paragraph [0129]), for the benefit of reducing the height of the device by using only a single layer of wiring (paragraph [0129]). Wang does not teach directly connecting the first electrode and the second electrode to the first electrode pad and the second electrode pad, respectively. In the same field of endeavor, Sadaka teaches direct bonding to achieve low-temperature bonding (paragraph [0051]). Thus, it would have been obvious to the skilled in the art before the effective filing date of the invention to make each of the LED chips flip-chip bond by directly connecting the first electrode and the second electrode to the first electrode pad and the second electrode pad, respectively, for the benefit of achieving low-temperature bonding. Response to Arguments Applicant's arguments filed December 19, 2025 have been fully considered but they are not persuasive because previously cited references teach the amended claims. See rejection above. Allowable Subject Matter Claim 9 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. The following is a statement of reasons for the indication of allowable subject matter: Prior art does not teach “a lower end of the through-electrode has a diameter…greater than that of an upper end of the through-electrode” (claim 9) Conclusion Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to FEIFEI YEUNG LOPEZ whose telephone number is (571)270-1882. The examiner can normally be reached M-F: 8am to 4pm EST. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Dale Page can be reached at 571 270 7877. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /FEIFEI YEUNG LOPEZ/Primary Examiner, Art Unit 2899
Read full office action

Prosecution Timeline

Feb 24, 2023
Application Filed
Sep 17, 2025
Non-Final Rejection — §103
Dec 19, 2025
Response Filed
Mar 02, 2026
Final Rejection — §103 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

3-4
Expected OA Rounds
81%
Grant Probability
78%
With Interview (-3.0%)
2y 6m
Median Time to Grant
Moderate
PTA Risk
Based on 1060 resolved cases by this examiner. Grant probability derived from career allow rate.

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