Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Authorization for Internet Communication
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Information Disclosure Statement
Applicant is respectfully reminded of the duty under 37 C.F.R. 1.56 to disclose all pertinent information and material pertaining to the patentability of the instant invention, by submitting in a timely manner PTO-1449, Information Disclosure Statement (IDS), with the filing of an application or thereafter.
For example, any art cited, or report issued, in the search or examination of the foreign application DE 102023131581 would seem to be pertinent and material.
Claim Rejections - 35 USC § 103
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
Claims 1, 2, 3, 7, 8, 12, 13, 14, 16, 19, and 20 are rejected under 35 U.S.C. 103 as being unpatentable over US 11099902 (Matthews) in view of US 5555378 (Gelman).
Regarding claims 1, 12, and 19, Matthews teaches or suggests a device comprising: interfaces configured to receive data packets from a plurality of compute nodes (83:55-84:2); and circuitry coupled to the interfaces, the circuitry to: provide data to the plurality of compute nodes to synchronize reception of data packets received from the plurality of compute nodes (7:49-67, 79:42-45);
wherein:
the circuitry comprises on-chip engines to perform in-network computation operations upon the data packets received from the plurality of compute nodes (11:36-43, 12:5-10);
the in-network computation operations are to result in generation of results that are to be distributed, via multiple copies, to the plurality of compute nodes for use in machine learning applications associated with the plurality of compute nodes (abs.); and
the processing circuitry is to be comprised in one or more switches that are to be communicatively coupled to the plurality of compute nodes (11:36-43, 12:5-10).
Matthews does not expressly disclose but Gelman teaches or suggests the reception is synchronized to provide data of the data packets to each memory slot of a memory in an order (5:35-40, 9:55-10:9, 11:10-20). It would have been obvious to a person of ordinary skill in the art, before the effective filing date of the claimed invention, to combine Matthews’ system and Gelman’s synchronization to avoid collisions and receive data in a timely manner.
Regarding claim 2, Gelman teaches or suggests
responsive to reception of a first data packet from a first compute node of the plurality of compute store the data of the first data packet in a first slot of the plurality of slots nodes (5:46-50), and transmit a pull command to a second compute node of the plurality of compute nodes to pull a data packet for storing in the first slot (9:64 et seq); and
store data of a second data packet from the first compute node in a second slot of the plurality of slots (5:46-50).
Regarding claims 3, 13, 14, and 20, Gelman teaches or suggests the synchronizing further include operations to store the data from the second compute node in the first slot, subsequent to or concurrently an operation to store the second data from the first compute node in the second slot (5:46-50); and
subsequent to the synchronizing, the circuitry is configured to perform in-network computation based on data packets received from the plurality of compute nodes in an order provided during the synchronizing (6:8-10).
Regarding claim 7, Gelman teaches or suggests the number of slots is at least the number of the plurality of computing nodes (figs. 2 and 5).
Regarding claim 8, Gelman teaches or suggests a count of the plurality of slots is based on a configuration parameter provided to the device (5:37-38).
Regarding claim 16, Gelman teaches or suggests upon detecting that data packets from each compute node has been stored into a slot, providing data packets stored in the respective slot to each of the compute nodes (9:20-59).
Claims 4-6, 15, and 17 are rejected under 35 U.S.C. 103 as being unpatentable over US 11099902 (Matthews) in view of US 5555378 (Gelman) further in view of US20050198361 (Chandra).
Regarding claims 4 and 15, Matthews does not expressly disclose but Chandra teaches or suggests to combine the data from the second compute node with data of the first data packet from the first compute node into a single packet (¶ 65). It would have been obvious to a person of ordinary skill in the art, before the effective filing date of the claimed invention, to combine Matthews’ system, Gelman’s synchronization, and Chandra’s combining in order to meet a given content throughput.
Regarding claim 5, Gelman teaches or suggests upon detecting that data packets from each compute node has been stored into a slot, providing data packets stored in the respective slot to each of the compute nodes (9:20-59).
Regarding claims 6 and 17, the aforementioned combination teaches or suggests transmit pull commands, separately and iteratively, to additional compute nodes of the plurality of compute nodes Gelman (11-26-31), such that data received from the additional compute nodes are stored and combined with other data in sequential order in the first slot of the plurality of slots (Chandra ¶ 65).
Claims 9, 10, and 18 are rejected under 35 U.S.C. 103 as being unpatentable over US 11099902 (Matthews) in view of US 5555378 (Gelman) further in view of US 9306876 (Ulman).
Regarding claims 9 and 18, Gelman does not expressly disclose but Ulman teaches or suggests an order for storing data packets of the plurality of slots is determined based upon configuration information received during a communication initialization process of the device and the plurality of compute nodes prior to the synchronizing (5:32-42, 9:43). It would have been obvious to a person of ordinary skill in the art, before the effective filing date of the claimed invention, to combine Matthews’ system, Gelman’s synchronization, and Ulman’s configuration information in order to change the order.
Regarding claim 10, Gelman teaches or suggests a first compute node is identified based on information of a first data packet, wherein the information includes a rank identification (6:54).
Claim 11 is rejected under 35 U.S.C. 103 as being unpatentable over US 11099902 (Matthews) in view of US 5555378 (Gelman) further in view of US 9306876 (Ulman) and US 20150092567 (Majd).
Gelman does not expressly disclose but Majd teaches or suggests the information includes a rank identification in a header of a first data packet (claims 2 and 10). It would have been obvious to a person of ordinary skill in the art, before the effective filing date of the claimed invention, to combine Matthews’ system, Gelman’s synchronization, Ulman’s configuration information, Majd’s identification for troubleshooting and quality improvement.
Other Art
The prior art made of record and not relied upon is considered pertinent to the instant disclosure. For example, CN 114969022 teaches writing the linked list into the memory, the linked list comprises a first node and a second node, the first node and the second node have data and pointer, and the pointer of the first node indicates the address of the second node (Specific implementation examples).
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any response to this Office action containing amended or newly presented claims should specifically point out support in the original disclosure for the new or amended claims. See MPEP § 714.02 and § 2163.06 (“Applicant should specifically point out the support for any amendments made to the disclosure.”).
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Lance Leonard Barry whose telephone number is (571)272-5856. The examiner can normally be reached M-F 700-430 ET 730-1630.
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/LANCE LEONARD BARRY/ Primary Examiner, Art Unit 2457
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