Prosecution Insights
Last updated: October 02, 2026
Application No. 18/117,343

COMMUNICATION SYSTEMS HAVING PLUGGABLE MODULES

Non-Final OA §103
Filed
Mar 03, 2023
Priority
Mar 04, 2022 — provisional 63/316,551 +1 more
Examiner
TRAN, HOANG Q
Art Unit
2874
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Ciena Corporation
OA Round
3 (Non-Final)
68%
Grant Probability
Favorable
3-4
OA Rounds
0m
Est. Remaining
99%
With Interview

Examiner Intelligence

Grants 68% — above average
68%
Career Allowance Rate
394 granted / 582 resolved
At TC average
Strong +33% interview lift
Without
With
+32.7%
Interview Lift
resolved cases with interview
Typical timeline
3y 1m
Avg Prosecution
28 currently pending
Career history
612
Total Applications
across all art units

Statute-Specific Performance

§101
0.2%
-39.8% vs TC avg
§103
61.8%
+21.8% vs TC avg
§102
29.8%
-10.2% vs TC avg
§112
3.1%
-36.9% vs TC avg
Black line = Tech Center average estimate • Based on career data from 582 resolved cases

Office Action

§103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Continued Examination Under 37 CFR 1.114 A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on 09/09/2026 has been entered. Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 1, 3-6, 15, 31, 35 are rejected under 35 U.S.C. 103 as being unpatentable over US Patent Application to Tracy 2018/0116063US in view of the US Patent to Shi 10,274,687US and further in view of the US Paten to Shahid 6,351,590US. In terms of Claim 1, 3 and 4, Tracy teaches an apparatus comprising: a pluggable optical module (Figure 1: 104) comprising: a fiber connector (Figure 1: 132) configured to be optically coupled to an optical fiber cable (Figure 1: 106); an optical module (Figure 6: 140) comprising a circuit (Figure 1: circuit made of all the parts on 222a) having a first surface (Figure 6: top surface of 206 that couples to 240), in which a plurality of optical couplers (Figure 6: connectors 240 can house multiple fibers [0039], each fibers are then coupled circuits element on 206, hence each fibers must have a coupler channel to the substrate [0039]) are provided at the first surface of the circuit (Figure 1: top surface of 206), an edge connector (Figure 1: 122a and 122b or Figure 6: 224a-b) having conductive pads ([0034]) configured to be electrically coupled to conductive pads of a receptacle when the edge connector is mated with the receptacle (Figure 4: within 149), in which the conductive pads of the edge connector are electrically coupled to the optical module (Figure 6: 224a-b couples electrical lines to components within 140). Tracy does not teach a transceiver having photonic integrated circuits, wherein the optical connector is coupled to the side of the photonic integrated circuit; wherein optical signal is interfaced between the optical integrated circuit and the optical fibers. Shi does teach a transceiver (Figure 1 or Figure 2: that’s base on AOC design, Column 6, lines 50-60) wherein the transceiver contain a PIC (circuit board 101 which contains silicon base dies, optical components such as converters waveguide, transmitter and receivers; [Column 5, 1-67 and Column 6, lines 1-40]) on the transmitter / receiver side and an optical connector is coupled to the side of the photonic circuit (Figure 1: 101 at location of 104); wherein optical signal are interfaced between the optical integrated circuit and the optical fibers (Figure 1: at 114 transmitter or laser chip and from waveguide in the laser die (column 7, lines 13-25). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the device of Tracy transceiver to include a photonic integrated circuit having optical / electrical components to send data because PIC allow for the faster transmission of data at greater data volume with lower power consumption than compared to pure electrical or discrete transceiver. Further Tracy indicated that the transceiver of Tracy has an AOC design (Tracy’s [0020]) which is compatible with the transceiver of Shi because both transceivers have an AOC design type transceiver (Shi’s Column 6, lines 50-60). Tracy and Shi do not teach wherein the optical fiber cable contains a harness which contains a fiber connector; in which the two-dimensional arrangement of fiber ports comprise at least three rows of fiber ports, and each row includes at least eight fiber ports; in which the two-dimensional arrangement of fiber ports comprise at least four rows of fiber ports, and each row includes at least eight fiber ports. Shahid does teach an optical cable having a harness (Figure 1: 10) having multiple ribbons that make up rows and columns, the ribbons can be terminated using a multi-stack connector (Figure 3:50) wherein the multiple rows and columns form a 2-D array to high density optical transmission (See 50); in which the two-dimensional arrangement of fiber ports (Figure 3: contains each row of fibers ports as shown in Figure 4) comprise at least three rows of fiber ports (Figure 3: 66), and each row includes at least eight fiber ports (Figure 4: 82); in which the two-dimensional arrangement of fiber ports comprise at least four rows of fiber ports (Figure 3: 66), and each row includes at least eight fiber ports (Figure 4: 82). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the connector and cable of Tracy / Shi to include a fiber cable harness with multiple fibers similar to 10 of Shahid and wherein the fibers are terminated at the ends with a 2-D dimension array of multiple rows and columns for large scale optical transmission wherein connection density is optimize due to lack of real estate on the PCB board. As for Claim 5, Tracy / Shi / Shahid teaches the device of Claim 1, wherein Tracy teaches in which the pluggable optical module complies with a small form factor pluggable module specification comprising at least one of SFP (small form- factor pluggable; [0019]), SFP+ ([0019]), 10 Gb SFP ([0019]), SFP28, OSFP (octal SFP), OSFP-XD (OSFP extra dense), QSFP (quad small form-factor pluggable; [0019]). As for Claim 6, Tracy / Shi / Shahid teaches the device of Claim 1, wherein Tracy teaches in which the pluggable optical module has a length not more than 200 mm, a width not more than 50 mm, and a height not more than 26 mm (Paragraph [0019] teaches the form factor can be SFP which has a length of 56mm, width of 13.5, and a height of 8.5mm). As for Claim 15, Tracy / Shi / Shahid teaches the device of Claim 1, wherein Tracy teaches in which the photonic integrated circuit (Figure 6: circuit device of 206) is configured to perform at least one of (i) convert optical signals received from the optical fiber cable to electrical signals that are transmitted to the edge connector ([0039-0040]), or (ii) convert electrical signals that are received from the edge connector to optical signals that are transmitted to the optical fiber cable ([0039-0040]). In terms of Claim 31, Tracy teaches an apparatus comprising: a pluggable optical module (Figure 1: 104) comprising: a fiber connector (Figure 1: 32) configured to be optically coupled to an optical fiber cable (Figure 1: 106); an optical module (Figure 6: 140) comprising: a circuit (Figure 6: 206 and its components make up the circuit) having a first surface (Figure 6: top surface of 206); and a first set of at least two electrical integrated circuits (Figure 6: 246) that are mounted on the first surface of the integrated circuit (Figure 6: 246 mounted to 222a of PCB 180); an edge connector (Figure 6: 224a-b) having conductive pads ([0034]) configured to be electrically coupled to conductive pads of a receptacle when the edge connector is mated with the receptacle (within 112; [0025] and [0034]), in which the conductive pads of the edge connector are electrically coupled to the optical module (224a-b are electrical coupled to 206 within module 140). Tracy does not teach a transceiver having photonic integrated circuits, wherein the optical connector is coupled to the side of the photonic integrated circuit; wherein optical signal is interfaced between the optical integrated circuit and the optical fibers. Shi does teach a transceiver (Figure 1 or Figure 2: that’s base on AOC design, Column 6, lines 50-60) wherein the transceiver contain a PIC (circuit board 101 which contains silicon base dies, optical components such as converters waveguide, transmitter and receivers; [Column 5, 1-67 and Column 6, lines 1-40]) on the transmitter / receiver side and an optical connector is coupled to the side of the photonic circuit (Figure 1: 101 at location of 104); wherein optical signal are interfaced between the optical integrated circuit and the optical fibers (Figure 1: at 114 transmitter or laser chip and from waveguide in the laser die (column 7, lines 13-25). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the device of Tracy transceiver to include a photonic integrated circuit having optical / electrical components to send data because PIC allow for the faster transmission of data at greater data volume with lower power consumption than compared to pure electrical or discrete transceiver. Further Tracy indicated that the transceiver of Tracy has an AOC design (Tracy’s [0020]) which is compatible with the transceiver of Shi because both transceivers have an AOC design type transceiver (Shi’s Column 6, lines 50-60). Tracy and Shi do not teach wherein the optical fiber cable contains a harness which contains a fiber connector; in which the two-dimensional arrangement of fiber ports comprise at least three rows of fiber ports, and each row includes at least eight fiber ports; in which the two-dimensional arrangement of fiber ports comprise at least four rows of fiber ports, and each row includes at least eight fiber ports. Shahid does teach an optical cable having a harness (Figure 1: 10) having multiple ribbons that make up rows and columns, the ribbons can be terminated using a multi-stack connector (Figure 3:50) wherein the multiple rows and columns form a 2-D array to high density optical transmission (See 50); in which the two-dimensional arrangement of fiber ports (Figure 3: contains each row of fibers ports as shown in Figure 4) comprise at least three rows of fiber ports (Figure 3: 66), and each row includes at least eight fiber ports (Figure 4: 82); in which the two-dimensional arrangement of fiber ports comprise at least four rows of fiber ports (Figure 3: 66), and each row includes at least eight fiber ports (Figure 4: 82). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the connector and cable of Tracy / Shi to include a fiber cable harness with multiple fibers similar to 10 of Shahid and wherein the fibers are terminated at the ends with a 2-D dimension array of multiple rows and columns for large scale optical transmission wherein connection density is optimize due to lack of real estate on the PCB board. As for Claim 35, Tracy / Shi / Shahid teaches the device of Claim 31, in which Tracy teaches the optical module (Figure 6: 140) comprises: a substrate or circuit board (Figure 6: 222a), in which the integrated circuit is mounted on the substrate or circuit board (242 are can be optical elements thus making photonics circuits element on 206), and a second set (242 or 246 can be electrical circuits element; [0040 and [0042]) of at least one electrical integrated circuit mounted on the substrate or circuit board (Figure 6: 242 or 246 on 206) and electrically coupled to the photonic integrated circuit through one or more signal conductors and/or traces ([0042] discuss the 242 and 246 must communicate with each other since they can be more electrical elements conductors or trances must be present to allow the communications in-between devices). Claims 7-12, 14, 16-18 are rejected under 35 U.S.C. 103 as being unpatentable over Tracy / Shi / Shahid as applied to claim 1 above, and further in view of US Application Publication to Chou 20180156990US. In regards to Claims 7 and 8, Tracy / Shi / Shahid teaches the device of Claim 1, in which Tracy teaches the pluggable optical module (Figure 1: 104) comprises a housing (housing of 140) having an inner upper wall and an inner lower wall (See Figure 4: lower inner wall below), the edge connector (Figure 4” 224a-b) has an upper surface (Figure 4 below: see upper surface of edge connector) extending along a first plane that is at a first distance d1 relative to the inner upper wall (see D1 below in the square region), the edge connector has a lower surface extending along a second plane that is at a second distance d2 relative to the inner lower wall (see d2 below in the oval region), PNG media_image1.png 315 492 media_image1.png Greyscale wherein the fiber module (housing of 240) is substantially vertically coupled to the first surface of the integrated circuit (Figure 6: 240 is coupled on top of 206; hence 240 is parallel to the top surface of 206) such that light from the fiber module (240) is directed toward the first surface of the integrated circuit (222a on pcb 180), the fiber module (240 housing) when extending from the first surface of the integrated circuit (top surface of 206); in which the housing (Figure 3: 140) has a first inner side wall (sidewall at 142) and a second inner side wall (Figure 3: sidewall at 162), the substrate or circuit board (board at element 172) is attached to the first inner side wall, wherein a distance from the first surface of the integrated circuit to the second inner side wall is d4 (distance from wall at 142 to 162). Tracy does not teach wherein fibers are bending to a direction parallel to the first surface. Chou teaches wherein optical fibers are coupled to a substrate and photonic circuit wherein fibers are bending to a direction parallel to the first surface (Figure 6: fibers 140 are bent to be parallel with the surface of 170). It would have been obvious to one of ordinary skill in the before the effective filing date to modify the fiber coupling device to allow the fibers to be bent in order to produce a small form factor package along the height direction and width direction through stacking of components. This allows the plug to be scaled up for larger density applications to maximize connection footprint. Tracy and Chou do not teach wherein light is directed at an angle 01 relative to a direction vertical to the first surface of the photonic integrated circuit the angle is between 0-10 degrees relative to vertical direction of between 240 and 206 and wherein the form factor requires a clearance distance of at least d3 so as to not damage the optical fibers in the fiber harness, and wherein dl < d3, and d2 <d3; wherein a distance from the first surface of the photonic circuit to the second inner side wall is d4 and d3 < d4. It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the angle to be between 0-10 degrees in order to optimize the optical coupling between the connector and components on 206 under 240. Further one of ordinary skill in the art would also modify the dimension of d1, d2 and d3 (clearance height of the bended fiber) with the housing of 140 and wherein dl < d3, and d2 <d3 and wherein a distance from the first surface of the photonic circuit to the second inner side wall is d4 and d3 < d4 in order to ensure the device has the small form factor possible in order to increase connection density through small form factor packaging. It has been held that where the general conditions of a claim are disclosed in the prior art, discovering the optimum or workable ranges involves only routine skill in the art, In re Aller, 105 USPQ 233 (C.C.P.A. 1955). In regard to claims 9-12, Tracy and Chou teach the device of Claim 7. Tracy does not teach in which the first surface of the photonic integrated circuit is oriented at an angle θ2 relative to the inner upper wall, and 45 degrees < θ2 < 135 degrees, 70 degrees < θ2 < 110 degrees, 80 degrees < θ2 < 100 degrees, 85 degrees < θ2 < 95 degrees. Chou does teach in which the first surface of the photonic integrated circuit is oriented at an angle θ2 relative to the inner upper wall, and 45 degrees < θ2 < 135 degrees, 70 degrees < θ2 < 110 degrees, 80 degrees < θ2 < 100 degrees, 85 degrees < θ2 < 95 degrees (See Picture below wherein the surface of the OCU relative to the upper inner wall of 120 of which is curve is between 0-90 wherein 90 is when the straight above OCU). At some point the top surface of the OCU (which is the 1st surface of the photonic integrated circuit) relative to the curve wall of 120 will meet all the claimed limitations ranges above. It would have been obvious to one of ordinary skill in art before the effective filing date of the claimed invention to modify the upper inner wall relative to the OCU top wall in order to control the curvature bend of the fibers within 110. This modification will ensure the device is optimized for bending loss. PNG media_image2.png 532 758 media_image2.png Greyscale In regards to Claim 14, Tracy / Shi / Shahid / Chou teach the device of Claim 7, wherein Tracy teaches the edge connector (Figure 6: 224a-b) has an upper surface and a lower surface (See Figure 4 above), the lower surface of the edge connector is attached to the upper surface of the substrate or circuit board (Figure 6: 224a-b and 206). Tracy does not teach in which the photonic integrated circuit is mounted on an upper surface of a substrate or circuit board, the edge connector has an upper surface and a lower surface, the lower surface of the edge connector is attached to the upper surface of the substrate or circuit board, the upper surface of the substrate or circuit board is at a distance d4 relative to the inner upper wall of the housing, and d3 < d4. Chou does teach in which the photonic integrated circuit (Figure 6: OCU) is mounted on an upper surface of a substrate or circuit board (Figure 6: 170 and OCU). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the device of Tracy at element 240 to have a PIC on the substrate a connector of OCU and 100 mainly 1112 of Chou in order to provide optical coupling in vertical manner to allow the device to have a small form factor transceiver wherein components are stacked in a vertical manner instead of being spread out. Tracy and Chou do not teach the upper surface of the substrate or circuit board is at a distance d4 relative to the inner upper wall of the housing, and d3 < d4. It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the upper surface of the substrate or circuit board is at a distance d4 relative to the inner upper wall of the housing, and d3 < d4 in order to ensure the device has the small form factor possible in order to increase connection density through small form factor packaging. It has been held that where the general conditions of a claim are disclosed in the prior art, discovering the optimum or workable ranges involves only routine skill in the art, In re Aller, 105 USPQ 233 (C.C.P.A. 1955). In regards to Claim 16-17, Tracy /Shi / Shahid / Chou teaches the device of Claim 1, in which Tracy teaches the first set of at least two electrical integrated circuits (Figure 6: 242 or 246 can be electrical components or circuits [0040 and 0042]) comprise two electrical integrated circuits (Figure 6: 242 and 240) that are positioned on opposite sides of the optical fiber connector along a plane parallel to the first surface of the integrated circuit (See Plane that separate portion 222a and 222b which is parallel to surface of 206). Tracy does not teach in which the optical module comprises a first set of at least two electrical integrated circuits that are mounted on the first surface of the photonic integrated circuit. Chou does teach in which the photonic integrated circuit (Figure 6: OCU) is mounted on an upper surface of a substrate or circuit board (Figure 6: 170 and OCU). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the device of Tracy at element 240 to have a PIC on the substrate a connector of OCU and 100 mainly 1112 of Chou in order to provide optical coupling in vertical manner to allow the device to have a small form factor transceiver wherein components are stacked in a vertical manner instead of being spread out. In regard to Claim 18, Tracy / Shi / Shahid / Chou teach the device of Claim 17. Tracy and Chou do not teach in which the first set of at least one electrical integrated circuit comprises four electrical integrated circuits that surround four sides of the optical fiber connector along the plane parallel to the first surface of the photonic integrated circuit. It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to duplicate the amount of electrical circuit components to 4 or more in order to scale the device for larger connection applications, since it has been held that mere duplication of the essential working parts of a device involves only routine skill in the art. St. Regis Paper Co. v. Bemis Co., 193 USPQ 8 (1977). Further the arrangement of the electrical chips to surround the four sides of the optical connector can also be made in order to make the device more compact and smaller. It has been held that a mere rearrangement of element without modification of the operation of the device involves only routine skill in the art. In re Japiske, 86 USPQ 70 (CCPA 1950). The rearrangement in this case does not modify the operation of the device because the electrical components will still perform its same functions. The benefits of this modification allow one of ordinary skill in the art before the effective filing date to make the device denser for larger scale application without having to increase form factor footprint. Claim 13 is rejected under 35 U.S.C. 103 as being unpatentable over Tracy / Shi / Shahid / Chou as applied to 9 above, and further in view of US Application Publication to Lytel 6,619858US. In regard to Claim 13, Tracy / Shi / Shahid / Chou teaches the device of Claim 9, wherein Chou teaches the device PIC (Figure 6: OCU) is mounted to a substrate (Figure 6: 170). Tracy and Chou do not teach wherein the circuit is electrically coupled to the edge connector by one or more flexible cables. Lytel does therein wherein the circuit (Figure 2: 220) is electrical coupled to the edge connector (Figure 2: 210) by one or more flexible cables (Figure 2: 214; Column 4, lines 5-20). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the device of Tracy and Chou wherein electrical connections are made using flexible wires because flexible wires can be easily replaced if damage over time. Further flexible wires or cables do not require expensive or complex manufacturing process to deploy. Claim 25 is rejected under 35 U.S.C. 103 as being unpatentable over Tracy / Shi / Shahid / Chou as applied to claim 9 above, and further in view of US Application Publication to Bucher 2018/0049348US. In regard to Claim 25, Tracy / Shi / Shahid teaches the device of Claim 1. Tracy does not teach comprising a second circuit board and a cage mounted on the second circuit board, in which the pluggable optical module is plugged into the cage, and the receptacle is located inside the cage (Spacing at 146 as shown in Figure 2). Bucher teaches comprising a second circuit board Figure 1: illustrates a housing that can house multiple modules 106, wherein each modules 106 contain a circuit board 138 as shown in Figure 2) and a cage mounted on the second circuit board (Figure 2: 118 is top of 138), in which the pluggable optical module (Figure 2: 106) is plugged into the cage (Figure 2: 106 and 118), and the receptacle is located inside the cage (receptacle at 146 is located inside the cage 118). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the to contain a second circuit board, a cage on top of the circuit board wherein the module is inserted into the cage in order to scale the device up to handle mass connections and to wherein cage is used to provide emi protection for the modules. Claim 46 is rejected under 35 U.S.C. 103 as being unpatentable over US Patent Application to Tracy 2018/0116063US in view of the US Paten to Shahid 6,351,590US and further in view of the US Application Publication to Chou 20180156990US. In regard to Claim 46, Tracy teaches an apparatus comprising: an optical engine (Figure 1:104) comprising: a first substrate or a first circuit board (Figure 6: 206); and a slide-in connector (Figure 6: 114a-b) configured to be electrically coupled to an edge connector of a second circuit board (Figure 1: 112 on 110). Tracy does not teach a photonic integrated circuit coupled to the first substrate or the first circuit board, wherein the photonic integrated circuit has a first surface, and a plurality of optical couplers are provided at the first surface of the photonic integrated circuit; an optical fiber connector configured to optically couple the photonic integrated circuit to a plurality of optical fibers, wherein the optical fiber connector comprises a two- dimensional arrangement of fiber ports, the two-dimensional arrangement of fiber ports and the optical couplers at the first surface of the photonic integrated circuit are configured to enable light signals to be transmitted between the photonic integrated circuit and the plurality of optical fibers. Chou does teach a photonic integrated circuit (Figure 6: OCU) coupled to the first substrate or the first circuit board (Figure 6: 170), wherein the photonic integrated circuit has a first surface (OCU), and a plurality of optical couplers (Figure 6: Po) are provided at the first surface of the photonic integrated circuit (Figure 6: OCU and Po [0022]); an optical fiber connector (Figure 6: 1112) configured to optically couple the photonic integrated circuit to a plurality of optical fibers (Figure 6: 140, OCU), wherein the optical fiber connector (1112) comprises a two-dimensional arrangement of fiber ports (Figure 1:110), the two-dimensional arrangement of fiber ports and the optical couplers at the first surface of the photonic integrated circuit are configured to enable light signals to be transmitted between the photonic integrated circuit and the plurality of optical fibers (Figure 6: 1112, LS1 and OCU). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the device of Tracy at element 240 to have a PIC on the substrate a connector of OCU and 100 mainly 1112 of Chou in order to provide optical coupling in vertical manner to allow the device to have a small form factor transceiver wherein components are stacked in a vertical manner instead of being spread out. Tracy does not teach a transceiver having photonic integrated circuits, wherein the optical connector is coupled to the side of the photonic integrated circuit; wherein optical signal is interfaced between the optical integrated circuit and the optical fibers. Tracy and Chou do not teach wherein the optical fiber cable contains a harness which contains a fiber connector; in which the two-dimensional arrangement of fiber ports comprise at least three rows of fiber ports, and each row includes at least eight fiber ports; in which the two-dimensional arrangement of fiber ports comprise at least four rows of fiber ports, and each row includes at least eight fiber ports. Shahid does teach an optical cable having a harness (Figure 1: 10) having multiple ribbons that make up rows and columns, the ribbons can be terminated using a multi-stack connector (Figure 3:50) wherein the multiple rows and columns form a 2-D array to high density optical transmission (See 50); in which the two-dimensional arrangement of fiber ports (Figure 3: contains each row of fibers ports as shown in Figure 4) comprise at least three rows of fiber ports (Figure 3: 66), and each row includes at least eight fiber ports (Figure 4: 82); in which the two-dimensional arrangement of fiber ports comprise at least four rows of fiber ports (Figure 3: 66), and each row includes at least eight fiber ports (Figure 4: 82). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the connector and cable of Tracy / Shi to include a fiber cable harness with multiple fibers similar to 10 of Shahid and wherein the fibers are terminated at the ends with a 2-D dimension array of multiple rows and columns for large scale optical transmission wherein connection density is optimize due to lack of real estate on the PCB board. Response to Arguments Applicants’ arguments with respect to claims 1, 31, 46 have been considered but are moot because the new ground of rejection does not rely on any of the combination of references applied in the prior rejection of record for any teaching or matter specifically challenged in the argument. Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. US Patent to Doerr 9874688US teaches optical PIC chip having transmitter and receiver capabilities on the same PCB. Any inquiry concerning this communication or earlier communications from the examiner should be directed to HOANG Q TRAN whose telephone number is (571)272-5049. The examiner can normally be reached 9:30 am - 5:30pm Monday - Friday. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Uyen-Chau Le can be reached at 5712722397. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /HOANG Q TRAN/Examiner, Art Unit 2874 /SUNG H PAK/Primary Examiner, Art Unit 2874
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Prosecution Timeline

Mar 03, 2023
Application Filed
Jan 15, 2026
Non-Final Rejection mailed — §103
Mar 10, 2026
Response Filed
Jun 09, 2026
Final Rejection mailed — §103
Jul 17, 2026
Response after Non-Final Action
Sep 09, 2026
Request for Continued Examination
Sep 11, 2026
Response after Non-Final Action
Sep 22, 2026
Non-Final Rejection mailed — §103 (current)

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Prosecution Projections

3-4
Expected OA Rounds
68%
Grant Probability
99%
With Interview (+32.7%)
3y 1m (~0m remaining)
Median Time to Grant
High
PTA Risk
Based on 582 resolved cases by this examiner. Grant probability derived from career allowance rate.

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