DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1, 5, 6, 15, 31, 35 are rejected under 35 U.S.C. 102a1 as being anticipated by US Patent Application to Tracy 2018/0116063US.
In terms of Claim 1, Tracy teaches an apparatus comprising: a pluggable optical module (Figure 1: 104) comprising: a fiber connector (Figure 1: 132) configured to be optically coupled to an optical fiber cable (Figure 1: 106); an optical module (Figure 6: 140) comprising a photonic integrated circuit (Figure 1: circuit made of all the parts on 222a) having a first surface (Figure 6: top surface of 206 that couples to 240), in which a plurality of optical couplers (Figure 6: connectors 240 can house multiple fibers [0039], each fibers are then coupled circuits element on 206, hence each fibers must have a coupler channel to the substrate [0039]) are provided at the first surface of the photonic integrated circuit (Figure 1: top surface of 206); a fiber harness (Figure 6: housing of 240 acts a fibers harness to house fibers [0039]) optically coupled between the fiber connector and the first surface of the photonic integrated circuit (Figure 6: 240 allows fibers to couple to 206; [0039]), in which the fiber harness (housing 240) comprises a plurality of optical fibers and an optical fiber connector (connector within 240 and fibers [0039]), the optical fiber connector is configured to optically couple the plurality of optical fibers to the first surface of the photonic integrated circuit (Figure 1: 240 and 206; [0039]), the optical fiber connector comprises a two-dimensional arrangement of fiber ports, the two-dimensional arrangement of fiber ports ([0019] discuss about form factor such as pluggable QSFP which supports quad ports that are 2D dimensional with a length and width dimensions), and the optical couplers (within 240 to allow fibers to couple light to 206; [0039]) at the first surface of the photonic integrated circuit (top surface of 206) are configured to enable light signals to be transmitted between the photonic integrated circuit and the plurality of optical fibers (0039-0040]); and an edge connector (Figure 1: 122a and 122b or Figure 6: 224a-b) having conductive pads ([0034]) configured to be electrically coupled to conductive pads of a receptacle when the edge connector is mated with the receptacle (Figure 4: within 149), in which the conductive pads of the edge connector are electrically coupled to the optical module (Figure 6: 224a-b couples electrical lines to components within 140).
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As for Claim 5, Tracy teaches the device of Claim 1, in which the pluggable optical module complies with a small form factor pluggable module specification comprising at least one of SFP (small form- factor pluggable; [0019]), SFP+ ([0019]), 10 Gb SFP ([0019]), SFP28, OSFP (octal SFP), OSFP-XD (OSFP extra dense), QSFP (quad small form-factor pluggable; [0019]).
As for Claim 6, Tracy teaches the device of Claim 1, in which the pluggable optical module has a length not more than 200 mm, a width not more than 50 mm, and a height not more than 26 mm (Paragraph [0019] teaches the form factor can be SFP which has a length of 56mm, width of 13.5, and a height of 8.5mm).
As for Claim 15, Tracy teaches the device of Claim 1, in which the photonic integrated circuit (Figure 6: circuit device of 206) is configured to perform at least one of (i) convert optical signals received from the optical fiber cable to electrical signals that are transmitted to the edge connector ([0039-0040]), or (ii) convert electrical signals that are received from the edge connector to optical signals that are transmitted to the optical fiber cable ([0039-0040]).
In terms of Claim 31, Tracy teaches an apparatus comprising: a pluggable optical module (Figure 1: 104) comprising: a fiber connector (Figure 1: 32) configured to be optically coupled to an optical fiber cable (Figure 1: 106); an optical module (Figure 6: 140) comprising: a photonic integrated circuit (Figure 6: 206 and its components make up the circuit) having a first surface (Figure 6: top surface of 206); and a first set of at least two electrical integrated circuits (Figure 6: 246) that are mounted on the first surface of the photonic integrated circuit (Figure 6: 246 on 206); a fiber harness (Figure 6: housing of 240 or recess within 206 that houses 240) optically coupled between the fiber connector (connector within 240) and the first surface of the photonic integrated circuit (top surface 206), in which the fiber harness (240) comprises a plurality of optical fibers (within 106; [0039]) optically coupled to the first surface of the photonic integrated circuit ([0039] discuss that fibers within 106 are being connected to 240 via a connector; the point at which the fiber connector interface with 240 occurs at surface. 240 is part of the integrated circuit 222a hence the coupling of connector meets the limitation of “optically coupled to the first surface of the photonic integrated circuit”); and an edge connector (Figure 6: 224a-b) having conductive pads ([0034]) configured to be electrically coupled to conductive pads of a receptacle when the edge connector is mated with the receptacle (within 112; [0025] and [0034]), in which the conductive pads of the edge connector are electrically coupled to the optical module (224a-b are electrical coupled to 206 within module 140).
As for Claim 35, Tracy teaches the device of Claim 31, in which the optical module (Figure 6: 140) comprises: a substrate or circuit board (Figure 6: 240), in which the photonic integrated circuit is mounted on the substrate or circuit board (242 are can be optical elements thus making photonics circuits element on 206), and a second set (242 or 246 can be electrical circuits element; [0040 and [0042]) of at least one electrical integrated circuit mounted on the substrate or circuit board (Figure 6: 242 or 246 on 206) and electrically coupled to the photonic integrated circuit through one or more signal conductors and/or traces ([0042] discuss the 242 and 246 must communicate with each other since they can be more electrical elements conductors or trances must be present to allow the communications in-between devices).
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 2-4, 7-12, 14, 16-18, and 46 are rejected under 35 U.S.C. 103 as being unpatentable over US Patent Application Publication to Tracy 2018/0116063US in view of the US Application Publication to Chou 20180156990US.
In regards to Claims 2-4, Tracy teaches the device of Claim 1. Tracy do not teach in which the two-dimensional arrangement of fiber ports comprises at least two rows – four rows of fiber ports, and each row includes at least eight fiber ports.
Chou does teach wherein the device contain 1 row of having at least 8 fibers ports (Figure 2: see bs2 and bs1.
It would have been obvious to one of ordinary skill in art before the effective filing date of the claimed invention to modify the device of Tracy to have 2 row, or 3 rows or 4 rows of 8 ports per row in order to scale the device to handle large amount of fiber connections, since it has been held that mere duplication of the essential working parts of a device involves only routine skill in the art. St. Regis Paper Co. v. Bemis Co., 193 USPQ 8 (1977).
In regards to Claims 7 and 8, Tracy teaches the device of Claim 1, in which the pluggable optical module (Figure 1: 104) comprises a housing (housing of 140) having an inner upper wall and an inner lower wall (See Figure 4: lower inner wall below), the edge connector (Figure 4” 224a-b) has an upper surface (Figure 4 below: see upper surface of edge connector) extending along a first plane that is at a first distance d1 relative to the inner upper wall (see D1 below in the square region), the edge connector has a lower surface extending along a second plane that is at a second distance d2 relative to the inner lower wall (see d2 below in the oval region),
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wherein the fiber harness (housing of 240) is substantially vertically coupled to the first surface of the photonic integrated circuit (Figure 6: 240 is coupled on top of 206; hence 240 is parallel to the top surface of 206) such that light from the fiber harness is directed toward the first surface of the photonic integrated circuit, the fiber harness (240 housing) when extending from the first surface of the photonic integrated circuit (top surface of 206); in which the housing (Figure 3: 140) has a first inner side wall (sidewall at 142) and a second inner side wall (Figure 3: sidewall at 162), the substrate or circuit board (board at element 172) is attached to the first inner side wall, wherein a distance from the first surface of the photonic integrated circuit to the second inner side wall is d4 (distance from wall at 142 to 162).
Tracy does not teach wherein fibers are bending to a direction parallel to the first surface.
Chou teaches wherein optical fibers are coupled to a substrate and photonic circuit wherein fibers are bending to a direction parallel to the first surface (Figure 6: fibers 140 are bended to be parallel with the surface of 170).
It would have been obvious to one of ordinary skill in the before the effective filing date to modify the fiber coupling device to allow the fibers to be bended in order to produce a small form factor package along the height direction and width direction through stacking of components. This allows the plug to be scaled up for larger density application to maximize connection footprint.
Tracy and Chou do not teach wherein light is directed at an angle 01 relative to a direction vertical to the first surface of the photonic integrated circuit the angle is between 0-10 degrees relative to vertical direction of between 240 and 206 and wherein the form factor requires a clearance distance of at least d3 so as to not damage the optical fibers in the fiber harness, and wherein dl < d3, and d2 <d3; wherein a distance from the first surface of the photonic circuit to the second inner side wall is d4 and d3 < d4.
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the angle to be between 0-10 degrees in order to optimize the optical coupling between the connector and components on 206 under 240. Further one of ordinary skill in the art would also modify the dimension of d1, d2 and d3 (clearance height of the bended fiber) with the housing of 140 and wherein dl < d3, and d2 <d3 and wherein a distance from the first surface of the photonic circuit to the second inner side wall is d4 and d3 < d4 in order to ensure the device has the small form factor possible in order to increase connection density through small form factor packaging. It has been held that where the general conditions of a claim are disclosed in the prior art, discovering the optimum or workable ranges involves only routine skill in the art, In re Aller, 105 USPQ 233 (C.C.P.A. 1955).
In regards to claims 9-12, Tracy and Chou teach the device of Claim 7. Tracy does not teach in which the first surface of the photonic integrated circuit is oriented at an angle θ2 relative to the inner upper wall, and 45 degrees < θ2 < 135 degrees, 70 degrees < θ2 < 110 degrees, 80 degrees < θ2 < 100 degrees, 85 degrees < θ2 < 95 degrees.
Chou does teach in which the first surface of the photonic integrated circuit is oriented at an angle θ2 relative to the inner upper wall, and 45 degrees < θ2 < 135 degrees, 70 degrees < θ2 < 110 degrees, 80 degrees < θ2 < 100 degrees, 85 degrees < θ2 < 95 degrees (See Picture below wherein the surface of the OCU relative to the upper inner wall of 120 of which is curve is between 0-90 wherein 90 is when the straight above OCU). At some point the top surface of the OCU (which is the 1st surface of the photonic integrated circuit) relative to the curve wall of 120 will meet all the claimed limitations ranges above.
It would have been obvious to one of ordinary skill in art before the effective filing date of the claimed invention to modify the upper inner wall relative to the OCU top wall in order to control the curvature bend of the fibers within 110. This modification will ensure the device is optimize for bending loss.
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In regards to Claim 14, Tracy and Chou teach the device of Claim 7, wherein Tracy teaches the edge connector (Figure 6: 224a-b) has an upper surface and a lower surface (See Figure 4 above), the lower surface of the edge connector is attached to the upper surface of the substrate or circuit board (Figure 6: 224a-b and 206).
Tracy does not teach in which the photonic integrated circuit is mounted on an upper surface of a substrate or circuit board, the edge connector has an upper surface and a lower surface, the lower surface of the edge connector is attached to the upper surface of the substrate or circuit board, the upper surface of the substrate or circuit board is at a distance d4 relative to the inner upper wall of the housing, and d3 < d4.
Chou does teach in which the photonic integrated circuit (Figure 6: OCU) is mounted on an upper surface of a substrate or circuit board (Figure 6: 170 and OCU).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the device of Tracy at element 240 to have a PIC on the substrate a connector of OCU and 100 mainly 1112 of Chou in order to provide optical coupling in vertical manner to allow the device to have a small form factor transceiver wherein components are stacked in a vertical manner instead of being spread out.
Tracy and Chou do not teach the upper surface of the substrate or circuit board is at a distance d4 relative to the inner upper wall of the housing, and d3 < d4.
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the upper surface of the substrate or circuit board is at a distance d4 relative to the inner upper wall of the housing, and d3 < d4 in order to ensure the device has the small form factor possible in order to increase connection density through small form factor packaging. It has been held that where the general conditions of a claim are disclosed in the prior art, discovering the optimum or workable ranges involves only routine skill in the art, In re Aller, 105 USPQ 233 (C.C.P.A. 1955).
In regards to Claim 16-18, Tracy and Chou teaches the device of Claim 1, in which the first set of at least two electrical integrated circuits (Figure 6: 242 or 246 can be electrical components or circuits [0040 and 0042]) comprise two electrical integrated circuits (Figure 6: 242 and 240) that are positioned on opposite sides of the optical fiber connector along a plane parallel to the first surface of the photonic integrated circuit (See Plane that separate portion 222a and 222b which is parallel to surface of 206).
Tracy does not teach in which the optical module comprises a first set of at least two electrical integrated circuits that are mounted on the first surface of the photonic integrated circuit.
Chou does teach in which the photonic integrated circuit (Figure 6: OCU) is mounted on an upper surface of a substrate or circuit board (Figure 6: 170 and OCU).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the device of Tracy at element 240 to have a PIC on the substrate a connector of OCU and 100 mainly 1112 of Chou in order to provide optical coupling in vertical manner to allow the device to have a small form factor transceiver wherein components are stacked in a vertical manner instead of being spread out.
In regards to Claim 18, Tracy and Chou teach the device of Claim 17.
Tracy and Chou do not teach in which the first set of at least one electrical integrated circuit comprises four electrical integrated circuits that surround four sides of the optical fiber connector along the plane parallel to the first surface of the photonic integrated circuit.
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to duplicate the amount of electrical circuit components to 4 or more in order to scale the device for larger connection applications, since it has been held that mere duplication of the essential working parts of a device involves only routine skill in the art. St. Regis Paper Co. v. Bemis Co., 193 USPQ 8 (1977).
Further the arrangement of the electrical chips to surround the four sides of the optical connector can also be made in order to make the device more compact and smaller. It has been held that a mere rearrangement of element without modification of the operation of the device involves only routine skill in the art. In re Japiske, 86 USPQ 70 (CCPA 1950). The rearrangement in this case does not modify the operation of the device because the electrical components will still perform its same functions. The benefits of this modification allow one of ordinary skill in the art before the effective filing date to make the device denser for larger scale application without having to increase form factor footprint.
In regards to Claim 46, Tracy teaches an apparatus comprising: an optical engine (Figure 1:104) comprising: a first substrate or a first circuit board (Figure 6: 206); and a slide-in connector (Figure 6: 114a-b) configured to be electrically coupled to an edge connector of a second circuit board (Figure 1: 112 on 110).
Tracy does not teach a photonic integrated circuit coupled to the first substrate or the first circuit board, wherein the photonic integrated circuit has a first surface, and a plurality of optical couplers are provided at the first surface of the photonic integrated circuit; an optical fiber connector configured to optically couple the photonic integrated circuit to a plurality of optical fibers, wherein the optical fiber connector comprises a two- dimensional arrangement of fiber ports, the two-dimensional arrangement of fiber ports and the optical couplers at the first surface of the photonic integrated circuit are configured to enable light signals to be transmitted between the photonic integrated circuit and the plurality of optical fibers.
Chou does teach a photonic integrated circuit (Figure 6: OCU) coupled to the first substrate or the first circuit board (Figure 6: 170), wherein the photonic integrated circuit has a first surface (OCU), and a plurality of optical couplers (Figure 6: Po) are provided at the first surface of the photonic integrated circuit (Figure 6: OCU and Po [0022]); an optical fiber connector (Figure 6: 1112) configured to optically couple the photonic integrated circuit to a plurality of optical fibers (Figure 6: 140, OCU), wherein the optical fiber connector (1112) comprises a two-dimensional arrangement of fiber ports (Figure 1:110), the two-dimensional arrangement of fiber ports and the optical couplers at the first surface of the photonic integrated circuit are configured to enable light signals to be transmitted between the photonic integrated circuit and the plurality of optical fibers (Figure 6: 1112, LS1 and OCU). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the device of Tracy at element 240 to have a PIC on the substrate a connector of OCU and 100 mainly 1112 of Chou in order to provide optical coupling in vertical manner to allow the device to have a small form factor transceiver wherein components are stacked in a vertical manner instead of being spread out.
Claim 13 is rejected under 35 U.S.C. 103 as being unpatentable over Tracy 2018/0116063US / Chou 20180156990US as applied to claim 9 above, and further in view of US Application Publication to Lytel 6,619858US.
In regards to Claim 13, Tracy / Chou teaches the device of Claim 9, wherein Chou teaches the device PIC (Figure 6: OCU) is mounted to a substrate (Figure 6: 170).
Tracy and Chou do not teach wherein the circuit is electrically coupled to the edge connector by on ore more flexible cables.
Lytel does therein wherein the circuit (Figure 2: 220) is electrical coupled to the edge connector (Figure 2: 210) by on ore more flexible cables (Figure 2: 214; Column 4, lines 5-20). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the device of Tracy and Chou wherein electrical connections are made using flexible wires because flexible wires can be easily replaced if damage over time. Further flexible wires or cables do not require expensive or complex manufacturing process to deploy.
Claim 25 is rejected under 35 U.S.C. 103 as being unpatentable over Tracy 2018/0116063US / Chou 20180156990US as applied to claim 9 above, and further in view of US Application Publication to Bucher 2018/0049348US.
In regards to Claim 25, Tracy teaches the device of Claim 1.
Tracy does not teach comprising a second circuit board and a cage mounted on the second circuit board, in which the pluggable optical module is plugged into the cage, and the receptacle is located inside the cage (Spacing at 146 as shown in Figure 2).
Bucher teaches comprising a second circuit board Figure 1: illustrates a housing that can house multiple modules 106, wherein each modules 106 contain a circuit board 138 as shown in Figure 2) and a cage mounted on the second circuit board (Figure 2: 118 is top of 138), in which the pluggable optical module (Figure 2: 106) is plugged into the cage (Figure 2: 106 and 118), and the receptacle is located inside the cage (receptacle at 146 is located inside the cage 118). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the to contain a second circuit board, a cage on top of the circuit board wherein the module is inserted into the cage in order to scale the device up to handle mass connections and to wherein cage is used to provide emi protection for the modules.
Response to Arguments
Applicant's arguments filed 1 and 31 have been fully considered but they are not persuasive. The applicant argued in regards to claims 1 and 31, the prior art to Tracy does not discloses a photonic integrated circuits (Claim 1 – See Remarks: Pages 8 and 9; Claim 31 – Remarks Pages 9-10) and wherein photonic integrated circuits contains a fiber harness comprises a plurality of optical fiber (See Claim 1- Remarks Page 9; Claim 31 – Remarks Pages 9 and 10).
In regards to claim 1, the examiner respectfully disagrees, because as indicated above the substrate 224 contains the surface of 222a makes up the photonic integrated circuit (fig. 6). the structure 222a/224 contains optical elements in 240 which contains optical fiber tips from cable 106 ([0039]); an optical to electrical circuit elements to convert optical signals into electrical signals; and optical fiber connector mounting components to mount connector within 240 ([0039]). These optical components within 240 are coupled or mounted to 222a to form the integrated photonic circuits. If the applicant intended for the photonic circuit to be structural different then the applicant must claim additional features to differentiate from the prior art structures of 222a/224 which contains 240. The examiner has looked into specification and has not found any special definition for the term “photonic integrated circuits”. Thus, the examiner has considered the structures of 222a/224 and all of its components are reasonable to read onto the limitation of “photonic integrated circuit” as presently claimed.
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Further, within element 240 contains a plurality of optical fibers within cable 106 ([0039]) wherein hence meeting the limitations of a “2-D array” of fibers. The housing 140 holds the circuit structure 222a/224. Figure 1: illustrates multiple housing 140/104 each having multiple ports (120a and 120b), wherein any combination of the ports will meet limitations of multiple ports as recited in claim 1 and 31.
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Hence claims 1 and 31 are maintained as detailed above. Newly added limitations to Claim 31 have been rejected as detailed above to address the newly added limitations.
In regards to claim 46, the applicant argued the prior art does not teach a 2-D of fiber ports as recited in claim 46 because the fiber ports are arranged in a single row.
The examiner respectfully disagrees because 2-D dimensional arrangement of fiber ports does not mean multiple rows of fiber as argued by the applicant. 2-D dimensional. The Cambridge dictionary defines two-dimensional as (having length and width (TWO-DIMENSIONAL | English meaning - Cambridge Dictionary). In this particular case the ports Chou (Figure 2: on 110) contains both x-y coordinates along the row H1 which makes the port 2D as claimed. If the applicant intended for limitations 2-D to mean a ports with multiple rows, the examiner suggest for the applicant to claim it positive to overcome the prior art of Chou.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to HOANG Q TRAN whose telephone number is (571)272-5049. The examiner can normally be reached 9:30 am - 5:30pm Monday - Friday.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Uyen-Chau Le can be reached at 5712722397. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/HOANG Q TRAN/Examiner, Art Unit 2874
/UYEN CHAU N LE/Supervisory Patent Examiner, Art Unit 2874
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