DETAIL ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
This Office Action is in response to Applicant’s arguments filed on 10/28/2025.
Response to Arguments
Applicant's arguments filed on 10/28/2025 have been fully considered but they are not persuasive.
Applicant main argument is regarding independent claim 1, only; wherein, independent claim 14 was merely mentioned for same reasons as claim 1. Due to amendments independent claim 18 has been allowed, wherein claim 20 depends form claim 18. Claims 10-12 remains objected for allowance, as previously mentioned and new claims 21-29 are also objected for allowance, as can be seen in below. Therefore, based on the Applicant’s provided arguments, going forward, Examiner’s response will only be regarding claim 1’s arguments.
Next, Applicant’s main argument(s), in reference to cited prior art(s) Nishijima et al. (“Nishijima”, US Pub 2018/0109173), from remarks, Pg. 14-15, are as follows,
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However, after carefully reviewing the Office Action, the Examiner respectfully disagrees.
Note that in Applicant’s own originally filed Specification, when Applicant explains ‘the overload condition, Applicant used the following limitation(s):
a) “This disclosure addresses the issue of overload protection during a condition associated with the main circuit board when the PSOFF mode is selected. This includes monitoring a magnitude of a VCC sign generated by an auxiliary winding magnetically coupled to the primary winding. More specifically, embodiments herein include an apparatus. The apparatus (such as a power converter circuit) includes a transformer and an overload protection circuit (Pg. 2 L28-Pg. 3 L5)”;
(b) “Detecting the overload condition may include: comparing the magnitude of the auxiliary voltage to a threshold level; and determining occurrence of the overload condition based on the magnitude of the auxiliary voltage being below the threshold level during a control condition in which the controller implements the first operating mode of controlling the input current for a predetermined time duration. The overload condition may be an overcurrent condition of the output voltage supplying an output current to a load. (Pg. 5 L18-27)”; and
c) use of comparators in circuit 125 for overload detection (Pg. 15), as follows,
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Above Fig. 2 & excerpt (from Pg. 15) are from Applicant’s own invention
However, note that in contrast to Specification’s explanation, Applicant never claims exactly what is being used or how exactly the overload condition is performed. Furthermore, Applicant fails to claim when detecting overload condition how is it associated with the output voltage (i.e., is it considering direct output voltage without having intervening elements or some scaled down version of output voltage?) or based on the magnitude of the auxiliary voltage received from the auxiliary winding and a mode of operating controller. Applicant also fails to claim what or how mode of operating controller is operating, except in the Spec, Applicant describes that switch S1-2 are switched during different mode of operation controller ‘141, 411’, which is then received by 125, as HBFB; wherein using 125’s ’s detected output switch S1-2 is controlled. Moreover, based on above Fig. 2 of Applicant, it appears even when considering output voltage, Applicant is considering,
a) a scaled down version of the output voltage, such as HBFB, which is compared REF 215 in comparator 251, and
b) auxiliary voltage Vcc of auxiliary winding 134 is compared separately with another threshold in comparator 213.
Since, Applicant never specifically claimed any details, as pointed in above underline conditions, therefore under broadest reasonable interpretations (BRI), the Examiner is only required to find an art, which teaches ‘detection of an overload condition’ ‘associated with the output voltage based on: the magnitude of the auxiliary voltage received from the auxiliary winding and a mode of operating the controller’, nothing more or less.
Therefore, as stated by Examiner cited, in the dated Office Action (OA), Nishijima indeed teaches (Fig. 1-2, 4-10; Para 59-92), the following,
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Above annotated Fig. 1-2 and item matching are based on Nishijima (US Pub 2018/0109173)
Furthermore, see following related excerpt from Nishijima,
[0074] As respectively illustrated in FIGS. 2 and 3, for example, the control circuit 2 includes a voltage-controlled oscillator 21 (a standard oscillating frequency) … uses the charges and discharges of a built-in capacitor (not illustrated in the figure) in the oscillator 21 to generate a triangular wave signal in which the voltage gradually increases and gradually decreases in a repeating manner and with a prescribed period as well as a rectangular wave signal that is synchronized with the triangular wave signal, for example. A PWM control comparator 22 compares the voltage of the triangular wave signal output by the oscillator 21 to the voltage V.sub.FB of the feedback signal in order to generate a control signal having a pulse width that defines the ON time Ton of the main switching device Q-m and the secondary switching device Q-s.
[0076] … a voltage induced in the auxiliary coil Tc of the transformer T as the switching devices Q are switched ON and OFF is passed through a rectifying and smoothing circuit constituted by a diode D3 and a capacitor C3 and then input to the power supply terminal VCC of the control circuit 2. Moreover, in the present embodiment, a current detection voltage Vcs that corresponds to the ON current (drain current Id) of the main switching device Q-m as detected by a shunt resistor Rs-m arranged on the current path formed by the main switching device Q-m is input to a CS terminal of the control circuit 2. Furthermore, the control circuit 2 includes a built-in shunt resistor Rs-s arranged on the current path formed by the secondary switching device Q-s. This shunt resistor Rs-s detects the current detection voltage Vcs that also corresponds to the ON current (drain current Id) of the secondary switching device Q-s.
[0077] … a start-up circuit 24 that starts the control circuit 2 when a prescribed voltage is applied to the HV terminal as well as an internal power supply 25 that uses the voltage Vcc of the auxiliary voltage applied to the power supply terminal VCC to generate an internal drive voltage (5V) that is required to drive the control circuit 2. Moreover, the control circuit 2 also includes a UVLO comparator 26 that compares the voltage Vcc of the auxiliary voltage applied to the VCC terminal to a prescribed reference voltage V.sub.UVLO (9.7V, for example) in order to prevent malfunctions of the switching power supply 1 due to abnormal decreases in the voltage Vcc of the auxiliary voltage. Upon detecting an abnormal decrease in the voltage Vcc of the auxiliary voltage, this UVLO comparator 26 sets an abnormal operation protection signal to a low level. This abnormal operation protection signal is input to the secondary driver circuit Drv-s via an AND circuit 12 to force-disable operation of the secondary driver circuit Drv-s.
[0078] The control circuit 2 further includes an overload detection comparator 27 that compares the voltage V.sub.FB of the feedback signal to a prescribed reference voltage V.sub.OLP in order to detect overloading of the switching power supply 1. Moreover, the control circuit 2 also includes an overcurrent detection comparator 28 that detects overcurrent flowing through the main switching device Q-m from the voltage input to the CS terminal upon occurring across the resistor Rs-m that is connected in series to the main switching device Q-m. The control circuit 2 further includes an overcurrent detection comparator 29 that detects overcurrent flowing through the secondary switching device Q-s from the voltage across the resistor Rs-s that is connected in series to the secondary switching device Q-s. The overcurrent detection respectively signals obtained from the comparators 28 and 29 are then input via an OR circuit 30 to an overload detection circuit 31. The overload detection signal detected by the comparator 27 is also input to the overload detection circuit 31.
[0079] Meanwhile, the control circuit 2 also includes a frequency reduction circuit 32 that voltage-controls the operation of the oscillator 21 in accordance with the voltage V.sub.FB of the feedback signal input to an FB terminal at all times (that is, not only when the overload detection circuit 31 detects overloading) in order to variably control the oscillating frequency fsw. The voltage V.sub.FB of the feedback signal changes according to the power consumption of the load (that is, the load power), and the larger the load power becomes, the higher the voltage V.sub.FB becomes.
[0080] The frequency reduction circuit 32 (a switching frequency control unit) reduces the switching frequency fsw at which the main switching device Q-m and the secondary switching device Q-s are switched ON and OFF in accordance with the voltage V.sub.FB of the feedback signal, which decreases as the power consumption of the load decreases. More specifically, the switching frequency fsw is reduced, in accordance with the voltage V.sub.FB of the feedback signal, from a maximum switching frequency fsw-max (such as 65 kHz) for when the load is heaviest to a first switching frequency fsw-min (such as 25 kHz) for when the load is lightest.
[0081] Furthermore, in normal operation mode, if the power consumption of the load becomes less than a prescribed threshold value while the main switching device Q-m is being continuously switched at the first switching frequency fsw-min, the frequency reduction circuit 32 reduces the switching frequency fsw of the main switching device Q-m and the secondary switching device Q-s to a value even less than the first switching frequency fsw-min in order to enable standby mode (two-stage switching frequency reduction control).
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
8. Claims 1-2, 6, 8-9 and 14-17 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Nishijima (US Pub 2018/0109173).
Regarding independent claim 1, Nishijima teaches an apparatus (Fig. 1-2, 4-10; Para 59-92) comprising:
a controller (Fig. 2; control circuit 2) operative to:
control input current (CS) through a primary winding (Ta) of a transformer (T), a secondary winding (Tb) of the transformer (T) magnetically coupled to the primary winding (Ta), the secondary winding (Tb) operative to produce an output voltage (Vout) based on the input current (CS) through the primary winding (Ta);
operate in a first operating mode (1st operating mode being discontinuous, stand-by or non-burst operating mode; 2nd operating mode being continuous or burst operating mode);
operate in a second operating mode different than the first operating mode (1st operating mode being discontinuous, stand-by or non-burst operating mode; 2nd operating mode being continuous or burst operating mode);
monitor (i.e., 10, 26) a magnitude of an auxiliary voltage (i.e., Vcc from Tc) received from an auxiliary winding (Tc) magnetically coupled to the secondary winding (Tb); and
detect an overload condition (i.e., combined operation of ‘10-12, 21-23, 26-32’) associated with the output voltage (Vout is provided as FB) based on: the magnitude of the auxiliary voltage (i.e., Vcc from Tc) received from the auxiliary winding (Tc) and a mode (i.e., taught 1st vs. 2nd operating mode) of operating the controller (2).
Regarding independent claim 14, Nishijima teaches a method (Fig. 1-2, 4-10; Para 59-92) comprising: via a controller (Fig. 2; control circuit 2):
controlling (Fig. 2; control circuit 2) input current (CS) through a primary winding (Ta) of a transformer (T), a secondary winding (Tb) of the transformer (T) magnetically coupled to the primary winding (Ta), the secondary winding (Tb) operative to produce an output voltage (Vout) based on the input current (CS) through the primary winding (Ta);
operating in a first operating mode (1st operating mode being discontinuous, stand-by or non-burst operating mode; 2nd operating mode being continuous or burst operating mode);
operating in a second operating mode different than the first operating mode (1st operating mode being discontinuous, stand-by or non-burst operating mode; 2nd operating mode being continuous or burst operating mode);
monitoring (i.e., 10, 26) a magnitude of an auxiliary voltage (i.e., Vcc from Tc) received from an auxiliary winding (Tc) magnetically coupled to the secondary winding (Tb); and
detecting an overload condition (i.e., combined operation of ‘10-12, 21-23, 26-32’) associated with the output voltage (Vout is provided as FB) based on the magnitude of the auxiliary voltage (i.e., Vcc from Tc) received from the auxiliary winding (Tc) and a mode (i.e., taught 1st vs. 2nd operating mode) of operating the controller (2).
Regarding claims 2, 15, Nishijima teaches wherein, to detect the overload condition (i.e., combined operation of ‘10-12, 21-23, 26-32’), the controller (2) is further operative to:
compare the magnitude of the auxiliary voltage (i.e., Vcc from Tc) to a threshold level (Vstandby or Vuvlo); and
determine occurrence of the overload condition based on the magnitude of the auxiliary voltage (i.e., Vcc from Tc) being below the threshold level (i.e., Vstandby or Vuvlo; Para 77-78) and the controller (2) operating in the first operating mode (i.e., taught 1st non-burst operating mode) for a predetermined time duration (i.e., Fig. 6-7).
Regarding claim 6, Nishijima teaches
wherein the secondary winding (Tb) is disposed in a galvanically isolated domain with respect to the primary winding (Ta), the secondary winding (Tb) having circuitry deriving a feedback signal (FB) from the output voltage (Vout); and
wherein the controller (2) is further operative to regulate a magnitude of the output voltage (Vout) based on the feedback signal (FB), the feedback signal (FB) received by the controller (2) in a galvanically isolated manner (i.e., using PC).
Regarding claim 8, Nishijima teaches
multiple switches (Qm1-2 vs. Qs1-2) controlled by the controller (2), the controller (2) operative to operate the multiple switches (Qm1-2 vs. Qs1-2) in the first operating mode and the second operating mode, the first operating mode being a non-burst mode, the second operating mode being a burst mode (1st operating mode being discontinuous, stand-by or non-burst operating mode; 2nd operating mode being continuous or burst operating mode);
wherein operation in the burst mode (2nd operating mode being continuous or burst operating mode) includes repeatedly switching of the multiple switches ON and OFF in a first sequence of multiple control cycles followed by simultaneous deactivation of the multiple switches in a break including a second sequence of multiple control cycles (Fig. 5-7; Qm vs. Qs operates alternatively; wherein when enabled, each switch is configured to repeatedly be on or off, in varied sequence, using 32); and
wherein operation in the non-burst mode (1st operating mode being discontinuous, stand-by or non-burst operating mode) includes switching of the multiple switches ON and OFF in a third sequence of multiple control cycles without implementing the break of simultaneously deactivating the multiple switches (Fig. 5-7; Qm vs. Qs operates alternatively; wherein when enabled, each switch is configured to repeatedly be on or off, in varied sequence, using 32).
Regarding claim 9, Nishijima teaches multiple switches (Qm1-2 vs. Qs1-2) controlled by the controller (2), the controller (2) operative to:
in the first operating mode (1st operating mode being discontinuous, stand-by or non-burst operating mode), implement a first sequence of switch control cycles of switching the multiple switches ON and OFF (Fig. 5-7; Qm vs. Qs operates alternatively; wherein when enabled, each switch is configured to repeatedly be on or off, in varied sequence, using 32) to increase a magnitude of the input current (CS) through the primary winding (Ta) and
in the second operating mode (2nd operating mode being continuous or burst operating mode), implement a second sequence of switch control cycles of simultaneously deactivating the multiple switches (Fig. 5-7; Qm vs. Qs operates alternatively; wherein when enabled, each switch is configured to repeatedly be on or off, in varied sequence, using 32) to decrease the magnitude of the input current (CS) through the primary winding (Ta).
Regarding claim 16, Nishijima teaches wherein the overload condition (i.e., combined operation of ‘10-12, 21-23, 26-32’) is an overcurrent condition (i.e., using 27-32; Para 78) of the output voltage (Vout) supplying an output current (current via Tb to output terminal) to a load (anticipated load to receive Vout/Iout, although not shown).
Regarding claim 17, Nishijima teaches the first operating mode is a continuous operational mode of (1st operating mode being discontinuous, stand-by or non-burst operating mode; 2nd operating mode being continuous or burst operating mode) controlling switches (Qm1-2 vs. Qs1-2) coupled to the primary winding (Ta), control of the switches (Qm1-2 vs. Qs1-2) controlling a magnitude of the input current (CS) through the primary winding (Ta).
Allowable Subject Matter
Claims 10-12 & 21-29 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Regarding claim 10, cited art(s) failed to teach “a circuit powered by the output voltage is selectable between a first output voltage mode and a second output voltage mode; wherein the circuit includes a feedback signal generator operative to produce a feedback signal based on a magnitude of the output voltage; and wherein the controller is further operative to: use the feedback signal as a basis to regulate a magnitude of the output voltage”.
Claims 11-12 are depending from claim 10.
Regarding claim 21, cited art(s) failed to teach “ wherein controlling the input current through the primary winding includes: at the controller, receiving a feedback signal from a circuit powered by the output voltage, the circuit being selectable between: i) a first output voltage mode in which the circuit generates the feedback signal based on a first gain value applied to a magnitude of the output voltage, and ii) a second output voltage mode in which the circuit derives the feedback signal supplied to the controller based on a second gain value applied to the magnitude of the output voltage”.
Claim 22 is depending from claim 21.
Regarding claim 23, cited art(s) failed to teach, “wherein operating the controller in the second operating mode includes, via the controller, controlling supply of a second magnitude of the input current through the primary winding, the second magnitude greater than the first magnitude; and wherein detecting the overload condition includes simultaneously detecting: i) execution of the controller in the second operating mode, and ii) the magnitude of the auxiliary voltage being less than a threshold level for a predetermined amount of time”.
Claim 24 is depending from claim 23.
Regarding claim 25, cited art(s) failed to teach, “wherein a circuit powered by the output voltage is selectable between: i) a first output voltage mode in which the circuit configured to derive a feedback signal supplied to the controller based on a first gain value applied to a magnitude of the output voltage, and ii) a second output voltage mode in which the circuit is configured to derive the feedback signal supplied to the controller based on a second gain value applied to the magnitude of the output voltage”.
Claim 26 is depending from claim 25.
Regarding claim 27, cited art(s) failed to teach, “ wherein a circuit powered by the output voltage is selectable between: i) a first output voltage mode in which the circuit is configured to derive a feedback signal supplied to the controller based on a first gain value applied to a magnitude of the output voltage, and ii) a second output voltage mode in which the circuit is configured to derive the feedback signal supplied to the controller based on a second gain value applied to the magnitude of the output voltage; and wherein the controller is operative to: i) during the first output voltage mode, regulate the magnitude of the output voltage to a first voltage level during the first output voltage mode, and ii) during the second output voltage mode, regulate a magnitude of the output voltage to a second voltage level, the second voltage level being less than the first voltage level”.
Regarding claim 28, cited art(s) failed to teach, “ wherein execution of the controller in the second operating mode is operative to supply a second magnitude of the input current through the primary winding, the second magnitude greater than the first magnitude; and wherein the controller is operative to detect the overload condition based on the magnitude of the auxiliary voltage being less than a threshold level for a predetermined amount of time while the controller operates in the second operating mode”.
Claim 29 is depending from claim 28.
Claims 18, 20 are allowed.
Regarding independent claim 18, cited prior art(s) failed to teach “wherein the controller is further operative to detect a first overload condition associated with output voltage based on the magnitude of the input current through the primary winding being above a current threshold value during a first output voltage mode of (non-burst continuous mode) operating a load powered by the output voltage; and wherein the controller is further operative to detect a second overload condition (burst mode) associated with output voltage based on the magnitude of the auxiliary voltage received from the auxiliary winding being less than a voltage threshold level during a second output voltage mode of operating the load powered by the output voltage”.
Claims 20 is depending from claim 18.
Conclusion
THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
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/NUSRAT QUDDUS/Examiner, Art Unit 2838
/CRYSTAL L HAMMOND/Supervisory Primary Examiner, Art Unit 2838