Prosecution Insights
Last updated: October 25, 2026
Application No. 18/120,737

NON-SEGMENTED U-SHAPED UBM FOR SHIFTED LUMINANCE

Non-Final OA §103
Filed
Mar 13, 2023
Priority
Dec 01, 2021 — provisional 63/284,851 +1 more
Examiner
KOLAHDOUZAN, HAJAR
Art Unit
2898
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Lumileds LLC
OA Round
2 (Non-Final)
74%
Grant Probability
Favorable
2-3
OA Rounds
0m
Est. Remaining
97%
With Interview

Examiner Intelligence

Grants 74% — above average
74%
Career Allowance Rate
277 granted / 372 resolved
+6.5% vs TC avg
Strong +23% interview lift
Without
With
+22.8%
Interview Lift
resolved cases with interview
Typical timeline
2y 9m
Avg Prosecution
19 currently pending
Career history
389
Total Applications
across all art units

Statute-Specific Performance

§103
59.6%
+19.6% vs TC avg
§102
30.8%
-9.2% vs TC avg
§112
8.6%
-31.4% vs TC avg
Black line = Tech Center average estimate • Based on career data from 372 resolved cases

Office Action

§103
Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Response to Arguments Applicant's arguments in “Remarks – 04/13/2026- Applicant Arguments/Remarks Made in an Amendment”, with the “Amendment/Req. Reconsideration-After Non-Final Reject -01/13/2026", have been fully considered, but they are not persuasive, because of the following: Applicant’s amendment of claims 1-20 necessitated the shift in new grounds of rejection detailed above in section below. The shift in grounds of rejection renders Applicant’s arguments moot. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim(s) 1-2, and 7-18 are rejected under 35 U.S.C. 103 as being unpatentable over Mohammed et al. (US 2014/0014894 A1; hereinafter Mohammed) in view of Na et al. (US 2013/0161585 A1; hereinafter Na). Regarding Independent Claim 1, Mohammed (Fig.1C) discloses a light emitting diode (LED) device comprising: a first doped semiconductor layer (p-layer 298 in LED stack 190 and labeled in Fig.2A); a second doped semiconductor layer (N-layer 294); a plurality of first contacts (115 connected to shorter 120/130) each electrically connected to the first doped semiconductor layer (p-layer); a plurality of edge contacts (layer 170 and the contacts underneath 170 having the top surface 160 and we hereinafter name it 160/170) each electrically connected to the second doped semiconductor layer (p-layer 298), the plurality of edge contacts (160/170) comprising a continuous non- segmented layer along at least one side of the second doped semiconductor layer (n-layer 294) with no separation by an insulating layer (the figure shows no insulation in between; also see Fig.5 top view that shows contact 170 is continuous); and an array of a plurality of vias (120/130) arranged across the device, the plurality of vias directly connecting the plurality of first contacts (115 connected to shorter 120/130) to the first doped semiconductor layer (p-layer 298), each of the plurality of vias (120/130) connecting at most one corresponding first contact (115) of the plurality of first contacts to the first doped semiconductor layer (p-layer 298). Mohammed does not particularly disclose the plurality of vias directly contacting the first doped semiconductor layer and the plurality of vias connecting the plurality of first contacts to the first doped semiconductor layer. Na (Fig.3-4) in a related art discloses a light emitting diode having first doped semiconductor layer (222), an active layer (224), a second doped semiconductor layer (226), wherein the plurality of vias (256) directly contacting the first doped semiconductor layer (222) and the plurality of vias (256) connecting the plurality of first contacts (254; fig.3) to the first doped semiconductor layer (222). Therefore, it would have been obvious in the art before the effective filling date of the application to have plurality of vias directly connecting to the first doped semiconductor layer and therefore the electrons may be uniformly injected into the first conductive-type semiconductor layer resulting in an improved LED device. Regarding Claim 2. The device of claim 1, Mohammed (Fig.1C) discloses wherein the plurality of edge contacts (160/170) are along only one side of the second doped semiconductor layer (n-layer 294). Regarding Claim 7. The device of claim 1, Mohammed (Fig.1C) discloses wherein the first doped semiconductor layer (p-layer 298) is between the plurality of first contacts (115 connected to shorter 120/130) and the second doped semiconductor layer (n-layer 294). Regarding Claim 8. The device of claim 7, Mohammed (Fig.1C) discloses further comprising an insulating layer (112/116) between the first doped semiconductor layer (p-type 298) and the plurality of first contacts (115 connected to shorter 120/130). Regarding Claim 9. The device of claim 8, Mohammed (Fig.1C) discloses wherein the plurality of vias (120/130) connected the plurality of first contacts (p-layer 298) to the first doped semiconductor layer (p-layer 298) through the insulating layer (112/116). Regarding Claim 10. The device of claim 9, Mohammed (Fig.1C) discloses further comprising an electrode layer (155) between the first doped semiconductor layer (p-layer 298) and the insulating layer (112/116) and in contact with the first doped semiconductor layer (p-layer 298), wherein the electrode layer is substantially transparent. Mohammed (Fig.1C) does not particularly disclose wherein the electrode layer is substantially transparent. Mohammed ([0034]) discloses that there is another electrode (170) on top of the device which is transparent and it discloses that this transparent electrode enhances the current spreading and therefore better light emission. Therefore, it would have been obvious in the art before the effective filing of the application to have the electrode as a transparent electrode to enhance the current spreading and therefore better light emission. Regarding Claim 11. The device of claim 10, Mohammed (Fig.1C) discloses wherein the electrode layer (155) is arranged as multiple discrete areal segments separated by electrically insulating material (150) so that transverse electrical conduction between adjacent areal segments is substantially prevented, and each areal segment of the electrode layer is connected to at most one corresponding contact of the plurality of first contacts (115 connected to shorter 140/130/120; if n-layer 294 is considered the first semiconductor layer). Regarding Claim 12. The device of claim 1, Mohammed (Fig.1C) discloses wherein the second doped semiconductor layer (if in Claim 1 the bottom semiconductor layer in LED stack 190 was considered to be the second layer P-layer 298) is between the plurality of first contacts (115 connected to shorter 140/130/120; if n-layer 294 is considered the first semiconductor layer) and the first doped semiconductor layer (if the n-layer 294 on top of the stack was considered as the first layer). Regarding Claim 13. The device of claim 12, Mohammed (Fig.1C) discloses further comprising an insulating layer (116/112) between the second doped semiconductor layer (p-layer 298 here) and the plurality of first contacts (115 connected to 120/130). Regarding Claim 14. The device of claim 13, Mohammed (Fig.1C) discloses wherein the plurality of vias (if n-layer 294 is considered the first semiconductor layer then the vias are 140/130/120) connect the plurality of first contacts (115 connected to 140/130/120) to the first doped semiconductor layer (n-layer) through the insulating layer (116/112) and the second doped semiconductor layer (p-layer 298), and the plurality of vias (140/130/120) are electrically insulated (insulated using 150) from the second doped semiconductor layer (bottom p-layer 298). Regarding Claim 15. The device of claim 1, Mohammed (Fig.1C) discloses further comprising an array of a second plurality of vias (140/130/120) arranged across the device, the second plurality of vias connecting the plurality of edge contacts (160/170) to the second doped semiconductor layer (n-layer 294). Regarding Claim 16. The device of claim 15, Mohammed (Fig.1C) discloses wherein each via (140/130/120) of the second plurality of vias connects at most one corresponding contact of the plurality of edge contacts (160/170) to the second doped semiconductor layer (n-layer 294). Regarding Independent Claim 17. Mohammed (Fig.1C) discloses a light emitting diode (LED) device comprising: a first doped semiconductor layer (p-layer 298); a second doped semiconductor layer (n-layer 294); a plurality of first contacts (115 connected to shorter 120/130) each electrically connected to the second [First] doped semiconductor layer (p-type 298); a plurality of edge contacts (160/170) each electrically connected to the second doped semiconductor layer (n-layer 294), the plurality of edge contacts (160/170) comprising a continuous non- segmented layer along at least one side of the second doped semiconductor layer (n-layer 294) with no separation by an insulating layer; and an array of a plurality of vias (120/130) arranged across the device, the plurality of vias (120/130) connecting the plurality of first contacts (115 connected to shorter 120/130) to the second semiconductor layer (n-layer 294), each of the plurality of vias (120/130) connecting at most one corresponding first contact of the plurality of first contacts (115) to the second semiconductor layer (n-layer 294). Mohammed does not particularly disclose the plurality of vias directly contacting the first doped semiconductor layer and the plurality of vias connecting the plurality of first contacts to the first doped semiconductor layer. Na (Fig.3-4) in a related art discloses a light emitting diode having first doped semiconductor layer (222), an active layer (224), a second doped semiconductor layer (226), a plurality of vias (256) wherein the plurality of vias (256) directly contacting the first doped semiconductor layer (222) and the plurality of vias (256) connecting the plurality of first contacts (254; fig.3) to the first doped semiconductor layer (222). Therefore, it would have been obvious in the art before the effective filling date of the application to have plurality of vias directly connecting to the first doped semiconductor layer and therefore the electrons may be uniformly injected into the first conductive-type semiconductor layer resulting in an improved LED device. Regarding Claim 18. The device of claim 17, Mohammed (Fig.1C) discloses wherein the plurality of edge contacts (160/170) are along only one side of the second doped semiconductor layer (n-layer 294), or wherein the plurality of edge contacts are along one side and partially along a second side adjacent the one side of the second doped semiconductor layer, or wherein the plurality of edge contacts are along one side and a second opposing side of the second doped semiconductor layer. Claim(s) 3-6 and 19-20 are rejected under 35 U.S.C. 103 as being unpatentable over Mohammed in view of Na in view of Schiaffino et al. (US 2008/0096297; hereinafter Schiaffino). Regarding Claim 3. The device of claim 1, Mohammed (Fig.1C) discloses wherein the plurality of edge contacts (160/170) are along one side but it does not particularly disclose wherein the edge contacts are partially along two sides adjacent the one side of the second doped semiconductor layer. Schiaffino (Fig.1, Fig.3) in a related art discloses a light emitting device having edge contacts (108/110/122/124; Fig.1; [0049]) along one side and partially along two sides adjacent the one side of the second doped semiconductor layer (it shows along other sides too). Therefore, it would have been obvious in the art before the effective filing of the application to have edge contacts along all sides continuously resulting in good lateral spreading of current in electrical contacts and improved device characteristics. Regarding Claim 4. The device of claim 3, Schiaffino (Fig.1, Fig.3) discloses wherein the plurality of edge contacts (108/110/122/124; Fig.1; [0049]) are along one side and completely along two sides adjacent the one side of the second doped semiconductor layer (106; Fig.2). Regarding Claim 5. The device of claim 1, Mohammed (Fig.1C) discloses wherein the plurality of edge contacts (160/170) are along one side but it does not particularly disclose wherein the edge contacts are partially along a second side adjacent the one side of the second doped semiconductor layer. Schiaffino (Fig.1, Fig.3) in a related art discloses a light emitting device having edge contacts (108/110/122/124; Fig.1; [0049]) along one side and partially along a second side adjacent the one side of the second doped semiconductor layer (it shows along other sides too). Therefore, it would have been obvious in the art before the effective filing of the application to have edge contacts along all sides continuously resulting in good lateral spreading of current in electrical contacts and improved device characteristics. Regarding Claim 6. The device of claim 1, Mohammed (Fig.1C) discloses wherein the plurality of edge contacts (160/170) are along one side but it does not particularly disclose wherein the edge contacts are along a second opposing side of the second doped semiconductor layer. Schiaffino (Fig.1, Fig.3) in a related art discloses a light emitting device having edge contacts (108/110/122/124; Fig.1; [0049]) along one side and along a second opposing side of the second doped semiconductor layer (it shows along other sides too). Therefore, it would have been obvious in the art before the effective filing of the application to have edge contacts along all sides continuously resulting in good lateral spreading of current in electrical contacts and improved device characteristics. Regarding Claim 19. The device of claim 17, Mohammed (Fig.1C) discloses wherein the plurality of edge contacts (160/170) are along one side but it does not particularly disclose wherein the edge contacts are partially along two sides adjacent the one side of the second doped semiconductor layer. Schiaffino (Fig.1, Fig.3) in a related art discloses a light emitting device having edge contacts (108/110/122/124; Fig.1; [0049]) along one side and partially along two sides adjacent the one side of the second doped semiconductor layer (it shows along other sides too). Therefore, it would have been obvious in the art before the effective filing of the application to have edge contacts along all sides continuously resulting in good lateral spreading of current in electrical contacts and improved device characteristics. Regarding Claim 20. The device of claim 19, Mohammed (Fig.1C) discloses wherein the plurality of edge contacts but it does not particularly disclose wherein the edge contacts are along one side and completely along two sides adjacent the one side of the second doped semiconductor layer. Schiaffino (Fig.1, Fig.3) in a related art discloses a light emitting device having edge contacts (108/110/122/124; Fig.1; [0049]) along one side and along one side and completely along two sides adjacent the one side of the second doped semiconductor layer (it shows along other sides too). Therefore, it would have been obvious in the art before the effective filing of the application to have edge contacts along all sides continuously resulting in good lateral spreading of current in electrical contacts and improved device characteristics. Conclusion Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to HAJAR KOLAHDOUZAN whose telephone number is (571)270-5842. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Leonard Chang can be reached on (571)270-3691. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of an application may be obtained from the Patent Application Information Retrieval (PAIR) system. Status information for published applications may be obtained from either Private PAIR or Public PAIR. Status information for unpublished applications is available through Private PAIR only. For more information about the PAIR system, see http://pair-direct.uspto.gov. Should you have questions on access to the Private PAIR system, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative or access to the automated information system, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /HAJAR KOLAHDOUZAN/ Examiner, Art Unit 2898 /Leonard Chang/ Supervisory Patent Examiner, Art Unit 2898
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Prosecution Timeline

Mar 13, 2023
Application Filed
Jan 13, 2026
Non-Final Rejection mailed — §103
Apr 13, 2026
Response Filed
Jul 28, 2026
Final Rejection mailed — §103
Sep 28, 2026
Response after Non-Final Action

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Prosecution Projections

2-3
Expected OA Rounds
74%
Grant Probability
97%
With Interview (+22.8%)
2y 9m (~0m remaining)
Median Time to Grant
Moderate
PTA Risk
Based on 372 resolved cases by this examiner. Grant probability derived from career allowance rate.

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