Prosecution Insights
Last updated: October 02, 2026
Application No. 18/125,425

SYSTEM AND METHOD FOR BATTERY MANAGEMENT

Non-Final OA §102§103
Filed
Mar 23, 2023
Priority
Apr 04, 2022 — EU 22166565.6
Examiner
KOUSAR, SADIA
Art Unit
2859
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Ge Aviation Systems Limited
OA Round
3 (Non-Final)
66%
Grant Probability
Favorable
3-4
OA Rounds
0m
Est. Remaining
78%
With Interview

Examiner Intelligence

Grants 66% — above average
66%
Career Allowance Rate
84 granted / 128 resolved
-2.4% vs TC avg
Moderate +12% lift
Without
With
+11.9%
Interview Lift
resolved cases with interview
Typical timeline
3y 3m
Avg Prosecution
25 currently pending
Career history
164
Total Applications
across all art units

Statute-Specific Performance

§101
3.0%
-37.0% vs TC avg
§103
58.3%
+18.3% vs TC avg
§102
29.5%
-10.5% vs TC avg
§112
7.9%
-32.1% vs TC avg
Black line = Tech Center average estimate • Based on career data from 128 resolved cases

Office Action

§102 §103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Continued Examination Under 37 CFR 1.114 A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on 08/24/2026 has been entered. Response to Arguments Applicant’s arguments with respect to claim(s) 1 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument. Claim Objections Claim 22 is objected to because of the following informalities: Regarding claim 22, the recitation in line 3, “sett”, can be written as , “set”. Appropriate correction is required. Claim Rejections - 35 USC § 102 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claim(s) 1-5, 7-12, 14-15, 17-22 is/are rejected under 35 U.S.C. 102(a)(1) as being unpatentable by Lee et al. (US 2011/0285538), herein after Lee. Regarding claim 1, Lee discloses a system (fig. 1), comprising: a plurality of battery cells electrically coupled together to form a battery pack (Vb1-Vb3, fig. 1); a controller (control unit 40, fig. 1); and a passive balancing electrical network (20, fig. 1), the passive balancing electrical network coupled to the plurality of battery cells and to the controller (20 is connected to the battery 10 and the control unit 40, fig. 1), the passive balancing electrical network comprising a plurality of gates (plurality of switches sw, fig. 1) that are configured to be selectively opened and closed by the controller to achieve a plurality of different gate configurations (paragraph [0016]), wherein the controller is configured to: generate a pattern of measured voltages by: for each of the plurality of different gate configurations (the control unit 40 may measure and store a voltage difference of each of the cell balancing circuits 20 corresponding to the first cell VB.sub.1 and the third cell VB.sub.3 through the voltage measuring unit 30, paragraph [0053]): set a state of the plurality of gates to be open or closed according to one of the plurality of different gate configurations; measure voltages in the passive balancing electrical network; and compare the pattern of measured voltages to a plurality of patterns of expected voltages to identify or more fault locations or no fault (the control unit 40 may turn off the cell balancing switch SW.sub.b2 of the second cell VB.sub.2, and may measure and store a voltage difference of each of the cell balancing circuits 20 corresponding to the first cell VB.sub.1 and the third cell VB.sub.3 through the voltage measuring unit 30. In this instance, control unit 40 may sequentially turn on or turn off the cell balancing switch SW.sub.b2 of the second cell VB.sub.2, paragraph [0053]);_ and determine, based at least in part on the comparison, a fault type within the passive balancing electrical network (the control unit 40 may analyze a variation pattern of the voltage difference of each of the cell balancing cells 20 corresponding to the first cell VB.sub.1 and the third cell VB.sub.3 measured when the cell balancing switch SW.sub.b2 of the second cell VB.sub.2 of the second cell VB.sub.2 is turned on or off, and may determine whether there is an abnormality in the cell balancing circuit 20 corresponding to the second cell VB.sub.2 and if any, the cause of the abnormality, based on the analysis results, paragraph [0054]), wherein the fault type is associated with a fault location, and wherein the fault type is an open circuit or a short circuit (where the abnormality is open circuit or short circuit, paragraph [0058], [0061]). Regarding claim 2, Lee further discloses the system further comprising a memory accessible by the controller, and wherein the controller is configured to retrieve the plurality of expected voltages from the memory ( the control unit 40 may measure and store a voltage difference of each of the cell balancing circuits 20 corresponding to the first cell VB.sub.1 and the third cell VB.sub.3 through the voltage measuring unit 30, paragraph [0053], paragraph [0100] also shows that the control unit has a memory to store the value). Regarding claim 3, Lee further discloses wherein the controller is configured to implement an action based on the at least one of the fault type and the fault location (the central processing module 42 may determine an abnormality in the cell balancing circuit 20 to be diagnosed and the cause of the abnormality based on a variation pattern of the voltage difference of the cell balancing circuit 20 adjacent to the cell balancing circuit 20 to be diagnosed, paragraph [0050], [0054], [0058], [0061]). Regarding claim 4, Lee further discloses wherein the action comprises discharging one or more of the plurality of battery cells (paragraph [0056]). Regarding claim 5, Lee further discloses wherein the fault type is an open circuit, a short circuit, or high resistance (Paragraph [0058], [0061]). Regarding claim 7, Lee further discloses wherein the controller sets the state of the plurality of gates to be opened or closed according to a predetermined sequence (paragraph [0053]-[0054]). Regarding claim 8, Lee further discloses wherein the predetermined sequence is dynamically changeable (paragraph [0064]). Regarding claim 9, Lee further discloses wherein the voltages are each represented as one of an open circuit, a nominal value, or a change from a nominal value (a voltage measuring unit for measuring a voltage difference of the balancing circuit corresponding to each of the battery cells, paragraph [0014]). Regarding claim 10, Lee further discloses wherein the voltages measured in the passive balancing electrical network represent voltages measured across the plurality of battery cells (a voltage measuring unit for measuring a voltage difference of the cell balancing circuit corresponding to each of the battery cells, paragraph [0023]). Regarding claim 11, Lee further discloses wherein each of the plurality of gates are connected electrically serially with a balance load (Rd is serially connected to the switch, fig. 1). Regarding claim 12, Lee discloses A controller (40, fig. 1) for managing a plurality of battery cells electrically coupled together to form a battery pack, the controller comprising: a memory (paragraph [0100]); a processor (42, fig. 2) configured to: generate, for each of a plurality of different gate configurations, a pattern of measured voltages by: i) setting a state of a plurality of gates of a passive balancing electrical network to be open or closed according to one of the plurality of different gate configurations, the passive balancing electrical network being electrically coupled with the plurality of battery cells (paragraph [0050], [0051] where the 20 is connected to 10, fig. 1); and ii) measuring voltages in the passive balancing electrical network (the control unit 40 may measure and store a voltage difference of each of the cell balancing circuits 20 corresponding to the first cell VB.sub.1 and the third cell VB.sub.3 through the voltage measuring unit 30, paragraph [0053]); and compare the pattern of measured voltages to a plurality of patterns of expected voltages, wherein the plurality of patterns of expected voltages correspond to one or more fault locations or no fault (the control unit 40 may turn off the cell balancing switch SW.sub.b2 of the second cell VB.sub.2, and may measure and store a voltage difference of each of the cell balancing circuits 20 corresponding to the first cell VB.sub.1 and the third cell VB.sub.3 through the voltage measuring unit 30. In this instance, the control unit 40 may sequentially turn on or turn off the cell balancing switch SW.sub.b2 of the second cell VB.sub.2, paragraph [0053]); and determine at least one of a fault type and a fault location within the passive balancing electrical network based on comparing the pattern of measured voltages to the plurality of patterns of expected voltages, wherein the fault type is an open circuit, a short circuit, or an unexpected impedance (paragraph [0054]- [0062]). Regarding claim 14, Lee further discloses wherein the processor is configured to implement an action based on the at least one of the fault type and the fault location (paragraph [0050]). Regarding claim 15, Lee further discloses wherein implementing the action, the processor is configured to cause discharging one or more of the plurality of battery cells (paragraph [0043]). Regarding claim 17, Lee further discloses each of the plurality of gates are connected electrically serially with a balance load (Rd is connected to SW, fig. 1). Regarding claim 18, Lee discloses A method of managing a plurality of battery cells electrically coupled together to form a battery pack (battery pack 10, fig. 1), the method comprising: generating, for each of a plurality of different gate configurations, a pattern of measured voltages by :i) setting a state of a plurality of gates of a passive balancing electrical network to be open or closed according to one of the plurality of different gate configurations, the passive balancing electrical network being electrically coupled with the plurality of battery cells(paragraph [0050], [0051] where the 20 is connected to 10, fig. 1); and ii) measuring voltages in the passive balancing electrical network(the control unit 40 may measure and store a voltage difference of each of the cell balancing circuits 20 corresponding to the first cell VB.sub.1 and the third cell VB.sub.3 through the voltage measuring unit 30, paragraph [0053]); comparing the pattern of measured voltages to a plurality of patterns of expected voltages, wherein the plurality of patterns of expected voltages correspond to one or more fault locations or no fault(the control unit 40 may turn off the cell balancing switch SW.sub.b2 of the second cell VB.sub.2, and may measure and store a voltage difference of each of the cell balancing circuits 20 corresponding to the first cell VB.sub.1 and the third cell VB.sub.3 through the voltage measuring unit 30. In this instance, the control unit 40 may sequentially turn on or turn off the cell balancing switch SW.sub.b2 of the second cell VB.sub.2, paragraph [0053]); and determine at least one of a fault type and a fault location within the passive balancing electrical network based on comparing the pattern of measured voltages to the plurality of patterns of expected voltages, wherein the fault type is an open circuit, a short circuit, or an unexpected impedance(paragraph [0054]- [0062]). Regarding claim 19, Lee further discloses wherein the fault type and the fault location are further determined based at least in part on the plurality of patterns of expected voltages at the plurality of different gate configurations (paragraph [0054]- [0062]). Regarding claim 20, Lee further discloses the method further comprising implementing an action based on comparing the pattern of measured voltages to the plurality of patterns of expected voltages, and wherein the action is implemented based on the at least one of the fault type and the fault location(paragraph [0054]- [0062]). Regarding claim 21, Lee further discloses wherein comparing the pattern of measured voltages to a plurality of patterns of expected voltages further causes the controller to use an algorithm to match the pattern of measured voltages to the plurality of patterns of expected voltages (paragraph [0089]). Regarding claim 22, Lee further discloses wherein the state of the plurality of gates of the passive balancing electrical network to be open or closed according to one of the plurality of different gate configurations are set according to a predetermined sequence(paragraph [0053]-[0054]). Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim(s) 6 is/are rejected under 35 U.S.C. 103 as being unpatentable over Lee (US 2011/0285538), and Kuroda (US 2007/0285058). Regarding claim 6, Lee discloses the system of claim 1. However, Lee is silent about the battery system is deployed on an aircraft and wherein the controller is configured to set the state of the plurality of gates during flight of the aircraft. Kuroda discloses the battery system (fig. 1) deployed on an aircraft (paragraph [0030]) and can be controlled to set the state of the plurality of gates during flight of the aircraft (paragraph [0040]-[0041]). It would have been obvious to one of the ordinary skills in the art, before the effective filing date of claimed invention to install well controlled Lee's battery system in the aircraft as taught by Kuroda, in order to enhance safety, extend battery life, and optimize performance by ensuring all cells operate within safe, uniform voltage ranges. It prevents dangerous overcharging, reduces thermal runaway risks (essential for flight safety), and maximizes usable capacity for consistent, reliable, and longer-lasting power. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to SADIA KOUSAR whose telephone number is (571)272-3386. The examiner can normally be reached M-Th 7:30am-5:30pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Julian Huffman can be reached at (571) 272-2147. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. SADIA . KOUSAR Examiner Art Unit 2859 /JULIAN D HUFFMAN/Supervisory Patent Examiner, Art Unit 2859
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Prosecution Timeline

Show 2 earlier events
Apr 02, 2026
Examiner Interview Summary
Apr 02, 2026
Applicant Interview (Telephonic)
Apr 22, 2026
Response Filed
Jun 11, 2026
Final Rejection mailed — §102, §103
Aug 24, 2026
Request for Continued Examination
Aug 26, 2026
Response after Non-Final Action
Sep 10, 2026
Non-Final Rejection mailed — §102, §103
Sep 29, 2026
Interview Requested

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

3-4
Expected OA Rounds
66%
Grant Probability
78%
With Interview (+11.9%)
3y 3m (~0m remaining)
Median Time to Grant
High
PTA Risk
Based on 128 resolved cases by this examiner. Grant probability derived from career allowance rate.

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