DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Arguments
Applicant's arguments filed 10/8/25 have been fully considered but they are not persuasive.
Regarding drawing objection, the applicant argues that “the controller is described as a component of the processing system 190. See para 27 of Specification. A computing device 200 as depicted in Figure 2 is referred to as a controller. See paras. 29-30.”
However, the examiner respectfully disagrees. Fig. 1B is shown below:
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As can be seen clearly, the processing system 190 processes loss of signal (LOS) 155. The LOS 155 is produced by the ADC or Comparator 150 as shown. Also, the specification clearly describes, “the ADC component of reference indicator 150 may convert an analog voltage signal into a digital logical signal. The digital logical signal may have either a high logic state or a low logic state. The ADC component may output a logical signal based on the voltage signal received from the signal conditioning and/or filtering unit 140. In another embodiment, the comparator component 150 may compare voltages and output a result. The result may include a high logic state if the difference is above a predetermined and adjustable, e.g., preset, voltage threshold. Alternatively, when the result is below the preset voltage threshold the comparator may output a low logic state. According to an embodiment, a low logic state may provide an indication of loss of an optical signal 155 from a transmitting terminal caused by atmospheric fade.” (see, Specification, Para. 25-26). From this description, it is clear that there is no need for a clock and data recovery (CDR) circuit since CDR is a specialized circuit that extracts the timing information (clock) from an incoming serial data stream and uses it to accurately sample and reconstruct the received data. Accordingly, Fig. 1B shows that received data signal 135 is transmitted from photodiode 130, but the data signal 135 is not inserted to processing system 190.
Regarding 103 rejection, the applicant argues “Baranowski was relied upon by the Examiner to suggest a sensor located downstream of a power supply unit. Id. However, Baranowski is entirely devoid of teaching a photodiode, or any functional relationship defining a photodiode, with respect to a power supplying unit or sensor.”
The examiner respectfully disagrees. Huang et al. discloses a photoelectric detector (PD). Huang et al. teaches that the photoelectric detector (PD) 15. The photoelectric detector is Photo Diode (see, Para. 60). Huang et al. further teaches a rechargeable battery 252 that supplies electric energy to all modules within the optical communication system via the power supplying module 26 (See, Fig. 2; Para. 68). What Huang et al. is missing is a sensor configured to monitor current of the power supply. Baranowski et al. remedies this missing claim limitation which teaches voltage regulator that monitors the current of the power supply 12 (see, Fig. 2). A voltage regulator maintains a constant output voltage despite fluctuations in the input voltage or changes in load current. It achieves this by using a feedback control loop, which continuously monitors the output voltage and adjusts a control element to correct any deviations. Contrary to the applicant’s argument, the claim recites a sensor configured to monitor the current of the power supply. This indicates that the sensor is related to the power supply rather than to a photodiode. That is, it is not required by the claimed limitation to show that the sensor that monitors current to the power supply has any functional relationship defining a photodiode. Accordingly, the cited combination discloses the claimed limitation.
Drawings
The drawings are objected to under 37 CFR 1.83(a). The drawings must show every feature of the invention specified in the claims. Therefore, the “a processing system including a controller and a clock and data recovery (CDR) circuit” must be shown or the feature(s) canceled from the claim(s). No new matter should be entered.
Corrected drawing sheets in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. The figure or figure number of an amended drawing should not be labeled as “amended.” If a drawing figure is to be canceled, the appropriate figure must be removed from the replacement sheet, and where necessary, the remaining figures must be renumbered and appropriate changes made to the brief description of the several views of the drawings for consistency. Additional replacement sheets may be necessary to show the renumbering of the remaining figures. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claim(s) 1 is/are rejected under 35 U.S.C. 103 as being unpatentable over Huang et al. (US20160134370A1) in view of Baranowski et al. (US6046574).
Regarding claim 1, Huang et al. discloses A free space optical (FSO) system (Fig. 2) comprising:
a power supply unit (Fig. 2; Para. 68; the power supplying module 26. The rechargeable battery 252 supplies electric energy to all modules within the present apparatus via the power supplying module 26); and
a photodiode located downstream (Fig. 2; Para. 60; the photoelectric detector (PD) 23. The photoelectric detector is Photo Diode (PD) and it receives power from the power supplying module 26), wherein the photodiode is configured to receive power from the power supply unit (Fig. 2; Para. 68; The rechargeable battery 252 supplies electric energy to all modules within the present apparatus via the power supplying module 26), receive an optical signal from a source, and output a second signal based on the optical signal (Fig. 2; Para. 68; the photoelectric detector 23 receives a visible light signal from the lighting facility end and converts a same into an electrical signal).
However, Huang et al. does not expressly disclose a sensor located downstream of the power supply unit, wherein the sensor is configured to monitor current of the power supply; a signal conditioning unit (SCU) located downstream of the sensor, wherein the SCU is configured to receive a first signal associated with the monitored current; a comparator located downstream of the SCU, wherein the comparator is configured to receive the first signal from the SCU and determine an indication of signal loss based upon the first signal being below a predetermined threshold.
Baranowski et al. disclose a sensor (Fig. 1; Fig. 2; the voltage regulator 26) located downstream of the power supply unit (Fig. 2; the voltage regulator 26 is located downstream from the battery 12), wherein the sensor is configured to monitor current of the power supply (Fig. 2; Column 3, lines 40-43; the voltage regulators 24 and 26 regulate the amount of voltage which battery 12 supplies to control unit 14 and A/D converter 22. (A voltage regulator maintains a constant output voltage despite fluctuations in the input voltage or changes in load current. It achieves this by using a feedback control loop, which continuously monitors the output voltage and adjusts a control element to correct any deviations));
a signal conditioning unit (SCU) located downstream of the sensor (Fig. 2; the A/D converter 22 located downstream the voltage regulator 26), wherein the SCU is configured to receive a first signal associated with the monitored current (Fig. 2; Column 3, lines 45-48; a voltage monitor such as a voltage divider 28 in parallel with battery 12 provides an analog signal to A/D converter 22 via line 29);
a comparator located downstream of the SCU (Fig. 2; the control unit 14 located downstream of A/D converter 22), wherein the comparator is configured to receive the first signal from the SCU (Fig. 2; Column 3, lines 48-50; A/D converter 22 converts the analog signal to a digital one and passes the digital signal to control unit 14) and determine an indication of signal loss based upon the first signal being below a predetermined threshold (Fig. 2; Fig. 5; Column 7, lines 19-21 and lines 26-28; Column 4, lines 27-30; In step 52, the control unit compares the scaled voltage with the known turn-off voltage to determine whether the particular application should be turned off. If the scaled voltage is approximately equal to the turn-off voltage, electronic device 10 in step 56 issues a low battery warning on display 16. The turn-off voltage is voltage at which electronic device 10 should be shut down causing the loss of signals both optical signal received or the electrical power supply to the electronic device).
It would have been obvious to one of ordinary skill in the before the effective filing date of the claimed invention to add a mechanism to monitor the power of the power supplying module, as taught by Baranowski et al., in the present system of Huang et al. in order to provide a low power warning signal so the user can quickly mitigate the effect and to take appropriate action to restore the proper operation of the optical communication system.
Claim(s) 2 and 7 is/are rejected under 35 U.S.C. 103 as being unpatentable over Huang et al. (US20160134370A1) and Baranowski et al. (US6046574) in view of Sackinger (Broadband Circuit for Optical Fiber Communication, 2002).
Regarding claim 2, the present combination discloses The FSOC system of claim 1, as described and applied above, further comprising: a processing system (Baranowski et al., Fig. 2; Column 3, lines 26-27; the control unit 14 is a microprocessor) including a controller (Baranowski et al., Fig. 2; Fig. 5; the control unit 14 controls the process of the electronic device as shown as shown in Fig. 5) wherein the comparator is configured to transmit the indication of signal loss to the processing system (Baranowski et al., Fig. 2; Fig. 5; Column 7, lines 19-21 and lines 26-28; Column 4, lines 27-30; In step 52, the control unit compares the scaled voltage with the known turn-off voltage to determine whether the particular application should be turned off. If the scaled voltage is approximately equal to the turn-off voltage, electronic device 10 in step 56 issues a low battery warning on display 16. The turn-off voltage is voltage at which electronic device 10 should be shut down causing the loss of signals both optical signal received or the electrical power supply to the electronic device).
The present invention is different from the claimed invention because the functions of controlling the process, processing instructions, and comparing are performed by a single microprocessor rather than separate elements of processing system, controller, and comparator.
However, it would have been obvious to one having ordinary skill in the art at the time the invention was made to integrate all three components of processing system, controller, and comparator into one single microprocessor, since it has been held that constructing a formerly integral structure in various elements involves only routine skill in the art. Nerwin v. Erlichman, 168 USPQ 177, 179.
However, the present combination still lacks a clock and data recovery (CDR) circuit.
Sackinger discloses a clock and data recovery (CDR) circuit (Fig. 1.1; Page 3, first paragraph; Fig. 1.1 shows a block diagram of a typical optical transceiver front-end. The received signal is fed into a Clock and Data Recovery (CDR) which extracts the clock signal and retimes the data signal).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to add a clock and data recovery circuit. One of ordinary skill in the art would have been motivated to do so because CDR is a part of a typical optical transceiver front-end. CDR allows extracting the timing information (clock) from a data stream without a separate clock signal in order for the receiver to correctly sample and interpret the data.
Regarding claim 7, the present combination discloses The FSOC system of claim 1, as described and applied above.
However, the present combination does not expressly disclose an avalanche photodiode.
Sackinger discloses an avalanche photodiode (Fig. 3.5; the avalanche photodetector is shown).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to use avalanche photodiode. One of ordinary skill in the art would have been motivated to do so is because the APD detector is one of the most commonly used photodetectors. It's also advantageous to use APD because it is designed to detect light and convert it into an electrical current with an added internal gain mechanism that significantly enhances its sensitivity.
Claim(s) 6 is/are rejected under 35 U.S.C. 103 as being unpatentable over Huang et al. (US20160134370A1) and Baranowski et al. (US6046574) in view of Leonard (4-bit DAC using op-amp, 2019).
Regarding claim 6, the present combination discloses The FSOC system of claim 1, as described and applied above.
However, the present combination does not expressly disclose an operational amplifier.
Leopard discloses an operational amplifier (Page 2; the 4 bit DAC using op-amp is shown).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the teaching of Leonard with the present combination. One of ordinary skill in the art would have been motivated to do so because, although Baranowski et al. teaches A/D converter, Baranowski et al. does not provide the details of A/D converter in a circuit level. Leonard shows that an operational amplifier (op-amp) is a crucial component in many analog-to-digital converter (ADC) circuits. Op-amps are used to buffer, amplify, or condition the analog input signal before it's converted to a digital value.
Claim(s) 8-9 and 20 is/are rejected under 35 U.S.C. 103 as being unpatentable over Huang et al. (US20160134370A1) and Baranowski et al. (US6046574) in view of Velazco (US10581525B2).
Regarding claim 8, the present combination discloses The FSOC system of claim 1, as described and applied above.
However, the present combination does not expressly disclose comments are housed in an optical receiver.
Velazco discloses comments are housed in an optical receiver (Fig. 3; Column 5, lines 51-55; an omnidirectional optical communicator 300 is shown with all the communication components housed inside a case. The omnidirectional optical communicator 300 includes receivers for detecting incoming laser beam 308, laser transmitters for transmitting laser beam 306, high aperture lens 304, and photon counting avalanche photo detectors (APD) 302).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to provide a housing to protect all the electrical components of the optical communication system. The optical communication system requires housing because the housing provides mechanical protection to delicate electronic components from physical impact, vibration, or shock. A housing acts as a physical barrier. A housing can also provide environmental protection that safeguard the internal electronics from environmental elements such as: dust, dirt, debris, moisture, humidity, water, etc.
Regarding claim 9, the present combination discloses The FSOC system of claim 1, as described and applied above.
However, the present combination does not expressly disclose optical receiver is housed in a satellite or ground station.
Velazco discloses comments optical receiver is housed in a satellite or ground station (Fig. 3; Column 5, lines 51-55; an omnidirectional optical communicator 300 is shown with all the communication components housed inside a case. The omnidirectional optical communicator 300 includes receivers for detecting incoming laser beam 308, laser transmitters for transmitting laser beam 306, high aperture lens 304, and photon counting avalanche photo detectors (APD) 302).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to provide a housing to protect all the electrical components of the optical communication system. The optical communication system requires housing because the housing provides mechanical protection to delicate electronic components from physical impact, vibration, or shock. A housing acts as a physical barrier. A housing can also provide environmental protection that safeguard the internal electronics from environmental elements such as: dust, dirt, debris, moisture, humidity, water, etc.
Regarding claim 20, the present combination discloses The system of claim 9, as described and applied above, wherein the photodiode is an avalanche photodiode (Velazco, Fig. 3; Column 5, lines 51-55; The omnidirectional optical communicator 300 includes receivers for detecting incoming laser beam 308, laser transmitters for transmitting laser beam 306, high aperture lens 304, and photon counting avalanche photo detectors (APD) 302).
Allowable Subject Matter
Claims 10-19 allowed.
Claims 3-5 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Conclusion
THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to JAI M LEE whose telephone number is (571)272-5870. The examiner can normally be reached M-F 9:5:30 PM.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Kenneth Vanderpuye can be reached at 571-272-3078. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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JAI M. LEE
Examiner
Art Unit 2634
/JAI M LEE/Examiner, Art Unit 2634