DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Amendment
Applicants’ arguments filed on 11 November 2025 have been fully considered but they are not deemed to be persuasive.
Response to Arguments
Applicant argues that Dorsey discloses only a centralized “clock manager” that globally determines safe clock frequencies for system components, and therefore does not disclose circuitry of a component that receives an indication identifying frequency ranges to be avoided and adjusts its own clock frequency. Applicant further contends that Dorsey internally computes safe frequencies rather than receiving an indication identifying frequency ranges to be avoided, and that Dorsey therefore fails to teach the recited functionality. These arguments are not persuasive. (Rem. 6-7)
First, Applicant’s arguments rely on a characterization of Dorsey as being limited to a centralized architecture in which only the clock manager performs clock adjustment functions. However, the claims do not exclude a system in which clock management circuitry operates within a centralized controller or clock management unit. Dorsey discloses a computing system including a clock manager that monitors radio operating conditions and generates control signals for adjusting system clock frequencies (Dorsey, Figs. 5 and 7; ¶¶73–74). The clock manager forms part of the system circuitry responsible for controlling clock frequencies used by system components. Accordingly, Dorsey’s disclosure of circuitry that evaluates radio operating frequencies and adjusts system clocks corresponds to circuitry configured to perform the claimed clock adjustment functions.
Second, Applicant argues that Dorsey does not disclose receiving an indication identifying frequency ranges to be avoided because Dorsey internally computes safe clock frequencies. However, Dorsey expressly teaches that the clock manager receives information describing radio operating frequencies and constraints associated with radio operation. For example, Dorsey explains that the clock manager may accept constraints such as desired operating frequencies for radios and operating policy information as inputs and may generate control signals for adjusting clocks accordingly (Dorsey ¶¶73–74). These inputs correspond to information identifying radio frequency ranges that must be considered or avoided when selecting clock frequencies.
Third, Applicant argues that Dorsey does not disclose adjusting a clock frequency in response to a determination that a clock frequency overlaps a frequency range to be avoided. This argument is inconsistent with Dorsey’s disclosure. Dorsey explains that when the clock manager determines that a processor clock frequency produces harmonics that fall within the cellular band of interest, the clock frequency may be moved to another frequency so that the clock harmonics are shifted out of the cellular band (Dorsey ¶76; claim 18). Thus, Dorsey explicitly teaches adjusting a clock frequency when it overlaps a radio operating band.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claims 1-20 are rejected under 35 U.S.C. 103 as being unpatentable over Dorsey et al (US Pub. 2009/0138745) in view of Weaver (US 2017/0102731).
Regarding claim 1, Dorsey discloses an apparatus comprising: circuitry configured to:
Dorsey teaches circuitry configured to receive an indication identifying one or more frequency ranges to be avoided based on a given radio module of a computing system, because Dorsey discloses that a clock manager may accept constraints, such as desired operating frequencies for radios and operating policy information, and may generate control signals for adjusting system clocks based on those inputs (Dorsey, Figs. 5 and 7; ¶¶73–74).
Dorsey further teaches circuitry configured to responsive to a determination that a first clock frequency used by a component of the computing system falls within any of the one or more frequency ranges, because Dorsey discloses evaluating system clock frequencies relative to radio operating bands and determining when clock harmonics associated with a system clock fall within or interfere with the cellular band of interest (Dorsey ¶¶73–76).
Dorsey further teaches circuitry configured to adjust the first clock frequency used by a component of the computing system to a second clock frequency, because Dorsey discloses that a clock manager may move a processor clock to a different frequency when the clock frequency overlaps with a radio band so that the clock harmonics are moved out of the cellular band of interest (Dorsey ¶76; claim 18). However, Dorsey does not explicitly disclose that the second clock frequency is selected by the component, as recited in claim 1.
Weaver teaches a clocking architecture in which multiple components operate using separate clock signals derived from multiple clock sources. In particular, Weaver discloses that a network device chip may include multiple subdivisions (subcomponents) that receive independent clock signals through multiple clock inputs and that the subdivisions may be clocked separately using clock signals having slightly different clock frequencies (Weaver ¶[0022]). Weaver further discloses that the clock signals may be derived from multiple clock sources and may deviate from a nominal clock frequency within a predetermined range (Weaver ¶¶[0022], [0026]). Weaver explains that distributing clock signals having slightly different frequencies to different components reduces peak electromagnetic interference emitted by the device (Weaver ¶[0025]). Thus Weaver teaches a system in which different components operate using different clock signals selected from among multiple available clock sources and frequency offsets.
It would have been obvious to one of ordinary skill in the art at the time of the invention to modify the clock management system of Dorsey to incorporate the multi-clock architecture taught by Weaver so that individual components may operate using alternative clock signals derived from different clock sources. Dorsey already teaches identifying clock frequencies that should be avoided to prevent interference with radio operation, while Weaver teaches providing multiple clock signals having slightly different frequencies to different components to mitigate electromagnetic interference. Combining these teachings would have predictably allowed a component in Dorsey’s system to operate using an alternative clock signal from among the available clock signals provided by the architecture of Weaver whose frequency lies outside the identified frequency ranges to be avoided.
Regarding claims 2, 9, and 16, Dorsey further discloses wherein the component is a memory device.(para. 38, 79)
Regarding claims 3, 10, and 18, Dorsey further discloses wherein the circuitry is further configured to determine one or more harmonic frequencies of the one or more operating frequency ranges used by the circuitry of the given radio module. (para. 6, 76)
Regarding claims 4, 11, and 19, Dorsey further discloses wherein the circuitry is further configured to replace the first clock frequency with the second clock frequency, in response to the second clock frequency overlapping any of the one or more harmonic frequencies. (para. 100, safe/unsafe frequency ranges)
Regarding claims 5, 12, Dorsey further discloses wherein the indication is received via system firmware or a network interface, and further specifies at least one harmonic range of the one or more operating frequency range.(para. 74)
Regarding claims 6, 13, and 20, Dorsey further discloses wherein the component is an access point. (para. 6, 45, IEEE 802.11)
Regarding claims 7, 14, Dorsey further discloses wherein the circuitry is further configured to:
determine one or more harmonic frequencies of operating frequency ranges used by a plurality of radio modules, in response to an indication from a power manager specifying a third clock frequency (fig. 11, element 158 identifying desired channels for operation; para. 95, 96); and
use the third clock frequency, in response to the third clock frequency not overlapping any of the one or more harmonic frequencies of operating frequency ranges used by the plurality of radio modules (fig. 11, elements 172, adjusting clocks within safe frequencies; para. 100).
Claim 8 recites a method corresponding to the apparatus of claim 1, and is thus similarly rejected.
Regarding claim 15, Dorsey discloses a computing system (fig. 2) comprising:
network interface circuitry comprising radio frequency circuitry (fig. 2, para. 42); and
a processing node comprising a plurality of components (fig. 2, para. 39); and
wherein circuitry of a given component of the plurality of components is substantially identical to the apparatus of claim 1, and is thus similarly rejected.
Regarding claim 17, Dorsey further discloses wherein the first clock frequency is a clock frequency of a clock signal conveyed to the memory device (para. 38, 79).
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to LUAT T PHUNG whose telephone number is (571)270-3126. The examiner can normally be reached on M-F 9 AM - 6 PM.
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/Luat Phung/
Primary Examiner, Art Unit 2468