DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 9 and 11-12 is/are rejected under 35 U.S.C. 103 as being unpatentable over Shioya (US 2002/0113316) in view of Dishongh (US 6,255,893).
[claim 9] Shioya discloses an integrated circuit (IC) structure (fig. 8A/8B), comprising: a feature of metal (33, fig. 8A, [0105]), wherein a top surface of the metal comprises predominantly of Cu [0105]; and dielectric material (34, fig. 8A) is in direct contact with the metal (fig. 8A), or is separated from the metal by no more than 1 nm of an intervening oxide of the metal, and wherein the dielectric material has an elastic modulus of at least 40 GPa (fig. 4, [0083]). Shioya, however, does not expressly disclose that the top surface of the metal is made of one or more of W, Mo, Co,or Ru or an alloy thereof.
Dishnogh discloses an integrated circuit and a method of making a metal feature wherein metal lines may be made of tungsten (W) (lines 30-40, col. 2).
It would have been obvious to one of ordinary skill in the art before the time of filing to made the metal feature/metal line out of tungsten (W) as tungsten has a higher melting point and better thermal stability and thus is suitable for high temperature processes during fabrication.
With this modification Shioya discloses:
[claim 11] The IC structure of claim 9, wherein the dielectric material has a relative permittivity less than 4.1 (33b is made of SiOCH which has a permittivity around 3, [0109]).
[claim 12] The IC structure of claim 9, wherein the feature of metal comprises at least one of W and Mo (made of tungsten (W) upon modification).
Claim(s) 13 is/are rejected under 35 U.S.C. 103 as being unpatentable over Shioya (US 2002/0113316) in view of Dishongh (US 6,255,893) and further in view of Futase (WO 2007/020684).
Shiyoa/Dishongh discloses the integrated circuit of claim 9 but does not expressly disclose that a transistor configuration connected to the metal feature/meat line.
Futase discloses an integrated circuit comprising a feature of metal (16, 19, fig. 17) in direct contact with a source or drain (9, 11, 12, fig. 17) of transistors (Qn/Qp, fig. 17).
It would have been obvious to one of ordinary skill in the art before the time of filing to made Futase’s transistor configuration connected to Shiyoah’s metal interconnection in order to apply Shiyoah’s metal interconnection to a specific/wider set of applications (e.g. transistors).
With this modification Shiyoah discloses:
[claim 13] The IC structure of claim 9, wherein the feature of metal (16, 19, fig. 17) is in direct contact with a source or drain of a first transistor (9 and 12, fig. 17), wherein the feature of metal is in direct contact with a source or drain of a second transistor (9 and 11, fig. 17), wherein the feature spans a space between the first transistor and the second transistor (fig. 17), and wherein a via (filled in by 36, fig. 8A) extends through the thickness of the dielectric material and is in direct contact with the metal feature (fig. 8A).
Claim(s) 10 is/are rejected under 35 U.S.C. 103 as being unpatentable over Shioya (US 2002/0113316) in view of Dishongh (US 6,255,893).
Shioya/Dishongh discloses the intergrated device of claim 9 but does not expressly disclose that the dielectric material has an electrical leakage less than 1 *10 ^-9 A/cm2 at an electric field of 11 MV/cm.
Nevertheless it would have been obvious to one of ordinary skill before the time of filing to have made the dielectric material to have an electrical leakage less than 1 *10 ^-9 A/cm2 at an electric field of 11 MV/cm, since it has been held that where the general conditions of a claim are disclosed in prior art, discovering the optimum or working ranges involves only routine skill in the art. In re Aller, 105 USPQ 233. It also been held that the normal desire of scientists or artisans to improve upon what is already generally known provides the motivation to determine where in a disclosed set of percentage ranges is the optimum combination of percentages. In re Peterson, 315 F.3d 1325, 1330 (Fed. Cir. 2003). The claimed range is a result-effective variable since the amount of electrical leakage in the dielectric material affects the amount of unwanted transfer of energy from one part of the circuit to another and thus the failure rate of the device.
Claim(s) 1 and 4-7 is/are rejected under 35 U.S.C. 103 as being unpatentable over Futase (WO 2007/020684).
[claim 1] Futase discloses an apparatus (fig. 17) comprising: a transistor (Qn/Qp, fig. 17) comprising a source (11,12, 9, fig. 17), a drain (11,12, 9, fig. 17) and a gate (7, fig. 17) ; a metal (16, 19, fig. 17) in direct contact with the source or drain (fig. 17); and a dielectric (17/18/21/23, fig. 17) material comprising predominantly silicon and oxygen (see pg. 7-13 of the translation materials are interlayer insulator 17 (SiOC)/ barrier layer 18 (SiO)/ barrier layer 21 (SiN)/ interlayer insulator 23 (SiOC)) over the metal, wherein the dielectric material is in direct contact with a top surface of the metal (fig. 17), or is separated from the top surface by no more than 1nm of an intervening oxide of the metal. Futase, however, does not expressly disclose that the dielectric material has an electrical leakage less than 1 *10 ^-9 A/cm2 at an electric field of 11 MV/cm.
Nevertheless it would have been obvious to one of ordinary skill before the time of filing to have made the dielectric material to have an electrical leakage less than 1 *10 ^-9 A/cm2 at an electric field of 11 MV/cm, since it has been held that where the general conditions of a claim are disclosed in prior art, discovering the optimum or working ranges involves only routine skill in the art. In re Aller, 105 USPQ 233. It also been held that the normal desire of scientists or artisans to improve upon what is already generally known provides the motivation to determine where in a disclosed set of percentage ranges is the optimum combination of percentages. In re Peterson, 315 F.3d 1325, 1330 (Fed. Cir. 2003). The claimed range is a result-effective variable since the amount of electrical leakage in the dielectric material affects the amount of unwanted transfer of energy from one part of the circuit to another and thus the failure rate of the device.
With this modification Futase discloses:
[claim 4] The apparatus of claim 1, wherein the dielectric material has a relative permittivity less than 4.1 (33b is made of SiOC which has a permittivity around 3, [0109]).
[claim 5] The apparatus of claim 1, wherein the dielectric material has a thickness over the metal and a carbon concentration of the dielectric material is highest within 1nm of the thickness nearest to the metal (e.g. SIOC in layer 17 is directly adjacent the metal).
[claim 6] The apparatus of claim 1, wherein carbon is substantially absent from the dielectric material beyond 2 nm of the thickness nearest to the metal (e.g. 21 is made of SiN for 75nm above the metal, see pg. 8 of the translation).
[claim 7] The apparatus of claim 1, wherein: the metal is a first metal (laminated TiN barrier of 19, fig. 17, pg. 7 of translation) ; a second metal (CU wiring of 19, fig. 17, pg. 7 of translation) is in contact with a sidewall of the first metal; and an interface between the dielectric material and a top surface of the first metal is co-planar with an interface between the dielectric material and a top surface of the second metal (fig. 17).
Claim(s) 2-3 is/are rejected under 35 U.S.C. 103 as being unpatentable over Futase (WO 2007/020684).
Futase discloses the device of claim 1 but does not expressly disclose that the dielectric material has an elastic modulus is at least 60 GPa.
Nevertheless it would have been obvious to one of ordinary skill before the time of filing to have made the dielectric material have an elastic modulus is at least 60 GPa, since it has been held that where the general conditions of a claim are disclosed in prior art, discovering the optimum or working ranges involves only routine skill in the art. In re Aller, 105 USPQ 233. It also been held that the normal desire of scientists or artisans to improve upon what is already generally known provides the motivation to determine where in a disclosed set of percentage ranges is the optimum combination of percentages. In re Peterson, 315 F.3d 1325, 1330 (Fed. Cir. 2003). The claimed range is a result-effective variable since the elastic modulus affects how the dielectric responds to electrical fields and mechanical stress.
Claim(s) 8 is/are rejected under 35 U.S.C. 103 as being unpatentable over Futase (WO 2007/020684) in Kuwajima (US 5,534,461).
Futase discloses the device of claim 7 but does not expressly disclose that the first barrier metal is W and the second metal is Mo.
Kuwajima discloses an integrated semiconductor device wherein the first barrier metal is W and the second metal is Mo (lines 8-13, col. 9).
It would have been obvious to one of ordinary skill in the art before the time of filing to have made the first barrier metal W and second metal Mo since it has been held that simple substitution of one known element (metal Mo with barrier metal W) for another (metal Cu and barrier TaN of Futase) to obtain predictable results (metal line and barrier layer) is obvious. KSR Int'l Co. v. Teleflex Inc., 550 U.S. 398, 415-421, 82 USPQ2d 1385, 1395-97 (2007).
Conclusion
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/AMAR MOVVA/Primary Examiner, Art Unit 2898
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