Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Double Patenting
The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969).
A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on nonstatutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP § 2146 et seq. for applications not subject to examination under the first inventor to file provisions of the AIA . A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b).
The filing of a terminal disclaimer by itself is not a complete reply to a nonstatutory double patenting (NSDP) rejection. A complete reply requires that the terminal disclaimer be accompanied by a reply requesting reconsideration of the prior Office action. Even where the NSDP rejection is provisional the reply must be complete. See MPEP § 804, subsection I.B.1. For a reply to a non-final Office action, see 37 CFR 1.111(a). For a reply to final Office action, see 37 CFR 1.113(c). A request for reconsideration while not provided for in 37 CFR 1.113(c) may be filed after final for consideration. See MPEP §§ 706.07(e) and 714.13.
The USPTO Internet website contains terminal disclaimer forms which may be used. Please visit www.uspto.gov/patent/patents-forms. The actual filing date of the application in which the form is filed determines what form (e.g., PTO/SB/25, PTO/SB/26, PTO/AIA /25, or PTO/AIA /26) should be used. A web-based eTerminal Disclaimer may be filled out completely online using web-screens. An eTerminal Disclaimer that meets all requirements is auto-processed and approved immediately upon submission. For more information about eTerminal Disclaimers, refer to www.uspto.gov/patents/apply/applying-online/eterminal-disclaimer.
Claims 1-16 are provisionally rejected on the ground of nonstatutory double patenting as being unpatentable over claims 1-16 of copending Application No. 18/131/194. Although the claims at issue are not identical, they are not patentably distinct from each other because all the elements are mentioned explicitly or implicitly.
This is a provisional nonstatutory double patenting rejection because the patentably indistinct claims have not in fact been patented as of the creation of this Office action.
[AltContent: textbox (Claim 1: A power management unit having battery switchover topology comprising:
a first battery in operative communication with a first battery first power switch in parallel with a first battery second power switch, the first battery in operative communication with a first battery power dump unit;
a second battery in operative communication with a second battery first power switch in parallel with a second battery second power switch, the second battery in operative communication with a second battery power dump unit;
an nth battery in operative communication with an nth battery first power switch in parallel with an nth battery second power switch; the first battery, the second battery and the nth battery are connected to a bus configured to supply an electrical load;
and the electrical load being supplied sequentially by a first battery current from the first battery, a second battery current from the second battery, and up to an nth battery current from the nth battery.)][AltContent: textbox (Claim 1: A power management unit having battery switchover topology comprising:
a first battery in operative communication with a first battery first power switch in parallel with a first battery second power switch, the first battery in operative communication with a first battery power dump unit;
a second battery in operative communication with a second battery first power switch in parallel with a second battery second power switch, the second battery in operative communication with a second battery power dump unit; …
an nth battery in operative communication with an nth battery first power switch in parallel with an nth battery second power switch; the first battery, the second battery and the nth battery are connected to a bus configured to supply an electrical load;
and the electrical load being supplied sequentially by a first battery current from the first battery, a second battery current from the second battery, and up to an nth battery current from the nth battery.)]Claim 1 of 18/131,166 Claim 1 of 18/131,194
[AltContent: textbox (Claim 2: The power management unit having battery switchover topology according to claim 1, wherein the first battery is a thermal battery, the second battery is a thermal battery up to the nth battery is a thermal battery.)][AltContent: textbox (Claim 2: The power management unit having battery switchover topology according to claim 1, wherein the first battery isa thermal battery, the second battery is a thermal battery up to the nth battery is a thermal battery.)]Claim 2 of 18/131,166 Claim 2 of 18/131,194
[AltContent: textbox (Claim 3: The power management unit having battery switchover topology according to claim 1, wherein the first battery is activated before the second battery is activated; an n-1th battery is activated before the nth battery is activated.)][AltContent: textbox (Claim 3: The power management unit having battery switchover topology according to claim 1, wherein the first battery is activated before the second battery is activated; an n-1th battery is activated before the nth battery is activated.)]Claim 3 of 18/131,166 Claim 3 of 18/131,194
[AltContent: textbox (Claim 4: The power management unit having battery switchover topology according to claim 1, wherein the first battery power dump unit is configured to pull the first battery current from the first battery until the first battery voltage reaches a target voltage of 10 percent of a full voltage value responsive to the first battery going offline.)][AltContent: textbox (Claim 4: The power management unit having battery switchover topology according to claim 1, wherein the first battery power dump unit is configured to pull the first battery current from the first battery until the first battery voltage reaches a target voltage of 10 percent of a full voltage value responsive to the first battery going offline.)]Claim 4 of 18/131,166 Claim 4 of 18/131,194
[AltContent: textbox (Claim 5: The power management unit having battery switchover topology according to claim 1, wherein the second battery power dump unit is configured to pull the second battery current from the second battery until the second battery voltage reaches a target voltage of 10 percent of a full voltage value responsive to the second battery going offline.)][AltContent: textbox (Claim 5: The power management unit having battery switchover topology according to claim 1, wherein the second battery power dump unit is configured to pull the second battery current from the second battery until the second battery voltage reaches a target voltage of 10 percent of a full voltage value responsive to the second battery going offline.)]Claim 5 of 18/131,166 Claim 5 of 18/131,194
[AltContent: textbox (Claim 6: The power management unit having battery switchover topology according to claim 1, wherein each of the first battery first power switch and the first battery second power switch; the second battery first power switch and the second battery second power switch; up to the nth battery first power switch and the nth battery second power switch are on the low side of the load.)][AltContent: textbox (Claim 6: The power management unit having battery switchover topology according to claim 1, wherein each of the first battery first power switch and the first battery second power switch; the second battery first power switch and the second battery second power switch; up to the nth battery first power switch and the nth battery second power switch are on the low side of the load.)]Claim 6 of 18/131,166 Claim 6 of 18/131,194
[AltContent: textbox (Claim 7: The power management unit having battery switchover topology according to claim 1,
wherein each of the power dump units include a dump MOSFET connected to a dump resistor.)][AltContent: textbox (Claim 1: A power management unit having battery switchover topology comprising: …
wherein each of the power dump units include a dump MOSFET connected to a dump resistor, wherein the dump resistor can be used as an electric load to measure a battery internal resistance during power delivery, such that a battery electrochemical impedance spectroscopy can be performed …)]Claim 7 of 18/131,166 Claim 1 of 18/131,194
[AltContent: textbox (Claim 8: The power management unit having battery switchover topology according to claim 1, wherein each of the battery power switches includes a FET and a diode, the battery power switches are oriented to diode steer the current.)][AltContent: textbox (Claim 8: The power management unit having battery switchover topology according to claim 1, wherein each of the battery power switches includes a FET and a diode, the battery power switches are oriented to diode steer the current.)]Claim 8 of 18/131,166 Claim 8 of 18/131,194
[AltContent: textbox (Claim 9: The power management unit having battery switchover topology according to claim 1, wherein each of the power switches are configured to be scaled.)][AltContent: textbox (Claim 9: The power management unit having battery switchover topology according to claim 1, wherein each of the power switches are configured to be scaled.)]Claim 9 of 18/131,166 Claim 9 of 18/131,194
[AltContent: textbox (Claim 10: A process for sequential battery operation utilizing a power management unit having battery switchover topology comprising:
operatively connecting a first thermal battery with a first battery first power switch in parallel with a first battery second power switch, operatively connecting the first thermal battery with a first battery power dump unit;
operatively connecting a second thermal battery with a second battery first power switch in parallel with a second battery second power switch, operatively connecting the second thermal battery with a second battery power dump unit;
operatively connecting up to an nth thermal battery in operative communication with an nth battery first power switch in parallel with an nth battery second power switch; connecting the first thermal battery, the second thermal battery and up to the nth thermal battery to a bus configured to supply an electrical load; and
suppling sequentially a first battery current from the first thermal battery to the electrical load, a second battery current from the second thermal battery to the electrical load, and up to an nth battery current from the nth thermal battery to the electrical load.)][AltContent: textbox (Claim 10: A process for sequential battery operation utilizing a power management unit having battery switchover topology comprising:
operatively connecting a first thermal battery with a first battery first power switch in parallel with a first battery second power switch, operatively connecting the first thermal battery with a first battery power dump unit;
operatively connecting a second thermal battery with a second battery first power switch in parallel with a second battery second power switch, operatively connecting the second thermal battery with a second battery power dump unit; …
operatively connecting up to an nth thermal battery in operative communication with an nth battery first power switch in parallel with an nth battery second power switch; connecting the first thermal battery, the second thermal battery and up to the nth thermal battery to a bus configured to supply an electrical load; and
suppling sequentially a first battery current from the first thermal battery to the electrical load, a second battery current from the second thermal battery to the electrical load, and up to an nth battery current from the nth thermal battery to the electrical load.)]Claim 10 of 18/131,166 Claim 10 of 18/131,194
[AltContent: textbox (Claim 11: The process of claim 10, further comprising: activating the first thermal battery before the second thermal battery is activated; activating an n-1th thermal battery before the nth thermal battery is activated; and activating the nth thermal battery last.)][AltContent: textbox (Claim 11: The process of claim 10, further comprising: activating the first thermal battery before the second thermal battery is activated; activating an n-1th thermal battery before the nth thermal battery is activated; and activating the nth thermal battery last.)]Claim 11 of 18/131,166 Claim 11 of 18/131,194
[AltContent: textbox (Claim 12: The process of claim 10, further comprising: pulling the first battery current from the first thermal battery employing the first battery power dump unit until the first thermal battery voltage reaches a target voltage of 10 percent of a full voltage value responsive to the first thermal battery going offline.)][AltContent: textbox (Claim 12: The process of claim 10, further comprising: pulling the first battery current from the first thermal battery employing the first battery power dump unit until the first thermal battery voltage reaches a target voltage of 10 percent of a full voltage value responsive to the first thermal battery going offline.)]Claim 12 of 18/131,166 Claim 12 of 18/131,194
[AltContent: textbox (Claim 13: The process of claim 10, further comprising: pulling the second battery current from the second thermal battery employing the second battery power dump unit until the second thermal battery voltage reaches a target voltage of 10 percent of a full voltage value responsive to the second thermal battery going offline.)][AltContent: textbox (Claim 13: The process of claim 10, further comprising: pulling the second battery current from the second thermal battery employing the second battery power dump unit until the second thermal battery voltage reaches a target voltage of 10 percent of a full voltage value responsive to the second thermal battery going offline.)]Claim 13 of 18/131,166 Claim 13 of 18/131,194
[AltContent: textbox (Claim 14: The process of claim 10,
wherein each of the power dump units include a dump MOSFET connected to a dump resistor.)][AltContent: textbox (Claim 10: A process for sequential battery operation utilizing a power management unit having battery switchover topology comprising: …
wherein each of the power dump units include a dump MOSFET connected to a dump resistor; adjusting the duty cycle verses time of the dump MOSFET to produce a constant current dissipation …)]Claim 14 of 18/131,166 Claim 10 of 18/131,194
[AltContent: textbox (Claim 15: The process of claim 10, wherein each of the battery power switches includes a FET and a diode, orienting the battery power switches to diode steer the current.)][AltContent: textbox (Claim 14: The process of claim 10, wherein each of the battery power switches includes a FET and a diode, orienting the battery power switches to diode steer the current.)]Claim 15 of 18/131,166 Claim 14 of 18/131,194
[AltContent: textbox (Claim 16: The process of claim 10, further comprising: configuring each of the power switches to be scaled.)][AltContent: textbox (Claim 16: The process of claim 10, further comprising: configuring each of the power switches to be scaled.)]Claim 16 of 18/131,166 Claim 16 of 18/131,194
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1 and 3-9 are rejected under 35 U.S.C. 103 as being unpatentable over Chen U.S. PGPub 2022/0393488 A1 (hereinafter Chen) in view of Kahn et al. U.S. PGPub 2022/0115879 A1 (hereinafter Kahn) and in view of Mauder et al. U.S. PGPub 2024/0113705 A1 (hereinafter Mauder) as a teaching reference.
Regarding Claim 1, Chen teaches a power management unit having battery switchover topology (Chen, Fig. 1; Para. [0002]) comprising a first battery (Chen, Fig. 1, Element 101, “Battery Module”; Para. [0040]) in operative communication with a first battery first power switch in parallel (See teaching reference Mauder below) with a first battery second power switch (Chen, Fig. 1, Element 113, “Transfer Device”; Para. [0042]. Where the Transfer Device is a pair of FETs in parallel to carry more current.), a second battery (Chen, Fig. 1, Element 102, “Battery Module”; Para. [0040]) in operative communication with a second battery first power switch in parallel (See teaching reference Mauder below) with a second battery second power switch (Chen, Fig. 1, Element 123, “Transfer Device”; Para. [0042]. Where the Transfer Device is a pair of FETs in parallel to carry more current.), an nth battery (Chen, Fig. 1, Element 109, “Battery Module”; Para. [0040]) in operative communication with an nth battery first power switch in parallel (See teaching reference Mauder below) with an nth battery second power switch (Chen, Fig. 1, Element 193, “Transfer Device”; Para. [0042]. Where the Transfer Device is a pair of FETs in parallel to carry more current.), the first battery (Chen, Fig. 1, Element 101), the second battery (Chen, Fig. 1, Element 102) and the nth battery (Chen, Fig. 1, Element 109) are connected to a bus configured to supply an electrical load (Chen, Fig. 1, Element “VOUT”; Paras. [0042] – [0044]), and the electrical load being supplied sequentially by a first battery current from the first battery, a second battery current from the second battery, and up to an nth battery current from the nth battery (Chen, Fig. 1; Para. [0008], Lines 8-12, Para. [0011], and Paras. [0036] – [0045]), but does not explicitly teach the first and second batteries being in operative communication with a battery dump unit(s).
Kahn, however, teaches the battery (Kahn, Fig. 11, Element 104) in operative communication with a battery power dump unit (Kahn, Fig. 11, Element 1182; Para. [0303], “in response to a command to discharge”, and Para. [0307], “auxiliary discharge circuit”).
It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to understand that although Chen is silent as to the option of incorporating a dump unit to assure no power is left in an expended battery, Chen would inherently incorporate some type of conventional battery safety protocols commonly understood in the art. The auxiliary discharge circuit taught by Kahn, for safely discharging a battery, teaches one of the many conventional battery discharging circuits utilized in the art for discharging a battery. A person of ordinary skill in the art would have been motivated to choose based on desirability, one of the many known conventional methods, such as the one taught by Kahn, to control the discharge of the battery within the system of Chen.
The combined teaching of the Chen and Kahn references does not explicitly teach the power switches in parallel, although it is understood by Chen paragraph [0042] “a pair of … FETs … and the like” would encompass FETs in parallel.
Mauder, however, used here as a teaching reference, teaches in the Background/Summary section, i.e. paragraph [0003], that “multiple semiconductor switches can be connected in parallel to handle more current or the same current with less conduction loss, and can be driven by a single gate driver output signal” (Mauder, Para. [0003], Lines 6-16).
It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to understand that although Chen is silent as to whether or not the FETs of the “transfer device” are connected in parallel, Chen would inherently incorporate some type of conventional configuration of the switches commonly understood in the art. The reason for connecting the FETs in parallel taught by Mauder, for reducing current through each FET or to reduce conduction loss, teaches one of the many conventional power switch configuration utilized in the art for controlling the charging current to a load. A person of ordinary skill in the art would have been motivated to choose based on desirability, one of the many known conventional methods, such as the one taught by Mauder, to control the discharge current within the system of Chen.
Regarding Claim 3, The combined teaching of the Chen and Kahn references discloses the claimed invention as stated above in claim 1. Furthermore, Chen teaches wherein the first battery is activated before the second battery is activated, an n-1th battery is activated before the nth battery is activated (Chen, Fig. 1; Paras. [0044] – [0045]).
Regarding Claim 4, The combined teaching of the Chen and Kahn references discloses the claimed invention as stated above in claim 1. Furthermore, Kahn teaches wherein the first battery power dump unit (Kahn, Fig. 11, Element 1182; Para. [0303], “in response to a command to discharge”, and Para. [0307], “auxiliary discharge circuit”. Where the auxiliary discharge circuit is in communication with each battery.) is configured to pull the first battery current from the first battery until the first battery voltage reaches a target voltage of 10 percent of a full voltage value responsive to the first battery going offline (Kahn, Para. [0307]).
Regarding Claim 5, The combined teaching of the Chen and Kahn references discloses the claimed invention as stated above in claim 1. Furthermore, Kahn teaches wherein the second battery power dump unit (Kahn, Fig. 11, Element 1182; Para. [0303], “in response to a command to discharge”, and Para. [0307], “auxiliary discharge circuit” . Where the auxiliary discharge circuit is in communication with each battery.) is configured to pull the second battery current from the second battery until the second battery voltage reaches a target voltage of 10 percent of a full voltage value responsive to the second battery going offline (Kahn, Para. [0307]).
Regarding Claim 6, The combined teaching of the Chen and Kahn references discloses the claimed invention as stated above in claim 1. Furthermore, Chen teaches wherein each of the first battery first power switch and the first battery second power switch, the second battery first power switch and the second battery second power switch, up to the nth battery first power switch and the nth battery second power switch are on the low side of the load (Chen, As illustrated in Fig. 1).
Regarding Claim 7, The combined teaching of the Chen and Kahn references discloses the claimed invention as stated above in claim 1. Furthermore, Kahn teaches each of the power dump units (Kahn, Fig. 11, Element 1182) include a dump MOSFET (Kahn, Fig. 11, Element 1186) connected to a dump resistor (Kahn, Fig. 11, Element 1184; Para. [0303]).
It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to understand that although Chen is silent as to the option of incorporating a dump unit to assure no power is left in an expended battery, Chen would inherently incorporate some type of conventional battery safety protocols commonly understood in the art. The auxiliary discharge circuit taught by Kahn, for safely discharging a battery, teaches one of the many conventional battery discharging circuits utilized in the art for discharging a battery. A person of ordinary skill in the art would have been motivated to choose based on desirability, one of the many known conventional methods, such as the one taught by Kahn, to control the discharge of the battery within the system of Chen.
Regarding Claim 8, The combined teaching of the Chen and Kahn references discloses the claimed invention as stated above in claim 1. Furthermore, Chen teaches wherein each of the battery power switches (Chen, Fig. 1, Elements 113, 123 and 193, “Transfer Device”; Para. [0042]. Where the Transfer Device is a pair of FETs in parallel to carry more current.) includes a FET and a diode, the battery power switches are oriented to diode steer the current (Chen, Fig. 3, Elements 313, 317 and 318; Para. [0061]. Where the steering diodes are illustrated).
Regarding Claim 9, The combined teaching of the Chen and Kahn references discloses the claimed invention as stated above in claim 1. Furthermore, Chen teaches wherein each of the power switches are configured to be scaled (Chen, Fig. 3; Para. [0042]).
Claims 10-16 are rejected under 35 U.S.C. 103 as being unpatentable over Chen U.S. PGPub 2022/0393488 A1 (hereinafter Chen) in view of Kahn et al. U.S. PGPub 2022/0115879 A1 (hereinafter Kahn) and Ayd, III et al. U.S. Patent 3,639,773 (hereinafter Ayd) and in view of Mauder et al. U.S. PGPub 2024/0113705 A1 (hereinafter Mauder) as a teaching reference.
Regarding Claim 10, Chen teaches a process for sequential battery operation utilizing a power management unit having battery switchover topology (Chen, Fig. 1; Para. [0002]) comprising operatively connecting a first thermal battery (Chen, Fig. 1, Element 101, “Battery Module”; Para. [0040]) with a first battery first power switch in parallel (See teaching reference Mauder below) with a first battery second power switch (Chen, Fig. 1, Element 113, “Transfer Device”; Para. [0042]. Where the Transfer Device is a pair of FETs in parallel to carry more current.), operatively connecting a second thermal battery (Chen, Fig. 1, Element 102, “Battery Module”; Para. [0040]) with a second battery first power switch in parallel (See teaching reference Mauder below) with a second battery second power switch (Chen, Fig. 1, Element 123, “Transfer Device”; Para. [0042]. Where the Transfer Device is a pair of FETs in parallel to carry more current.), operatively connecting up to an nth thermal battery (Chen, Fig. 1, Element 109, “Battery Module”; Para. [0040]) in operative communication with an nth battery first power switch in parallel (See teaching reference Mauder below) with an nth battery second power switch (Chen, Fig. 1, Element 193, “Transfer Device”; Para. [0042]. Where the Transfer Device is a pair of FETs in parallel to carry more current.), connecting the first thermal battery (Chen, Fig. 1, Element 101), the second thermal battery (Chen, Fig. 1, Element 102) and up to the nth thermal battery (Chen, Fig. 1, Element 109) to a bus configured to supply an electrical load (Chen, Fig. 1, Element “VOUT”; Paras. [0042] – [0044]), and suppling sequentially a first battery current from the first thermal battery to the electrical load, a second battery current from the second thermal battery to the electrical load, and up to an nth battery current from the nth thermal battery to the electrical load (Chen, Fig. 1; Para. [0008], Lines 8-12, Para. [0011], and Paras. [0036] – [0045]), but does not explicitly teach the first and second batteries being in operative communication with a battery dump unit(s).
Kahn, however, teaches operatively connecting the battery (Kahn, Fig. 11, Element 104) with a battery power dump unit (Kahn, Fig. 11, Element 1182; Para. [0303], “in response to a command to discharge”, and Para. [0307], “auxiliary discharge circuit”).
It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to understand that although Chen is silent as to the option of incorporating a dump unit to assure no power is left in an expended battery, Chen would inherently incorporate some type of conventional battery safety protocols commonly understood in the art. The auxiliary discharge circuit taught by Kahn, for safely discharging a battery, teaches one of the many conventional battery discharging circuits utilized in the art for discharging a battery. A person of ordinary skill in the art would have been motivated to choose based on desirability, one of the many known conventional methods, such as the one taught by Kahn, to control the discharge of the battery within the system of Chen.
The combined teaching of the Chen and Kahn references does not explicitly teach the battery type.
Ayd, however, teaches wherein the first, second and nth batteries (Ayd, Fig. 1, Elements B1, B2 and B4) are thermal batteries (Ayd, Col. 1, Lines 4-31).
It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to understand that although Chen is silent as to the type of battery used in the invention, Chen would inherently incorporate some type of conventional battery type commonly understood in the art. The battery type taught by Ayd, for providing long lasting batteries, teaches one of the many conventional battery types utilized in the art for powering a system. A person of ordinary skill in the art would have been motivated to choose based on desirability, one of the many known conventional methods, such as the one taught by Ayd, to control the discharge of the battery within the system of Chen.
The combined teaching of the Chen, Kahn and Ayd references does not explicitly teach the power switches in parallel, although it is understood by Chen paragraph [0042] “a pair of … FETs … and the like” would encompass FETs in parallel.
Mauder, however, used here as a teaching reference, teaches in the Background/Summary section, i.e. paragraph [0003], that “multiple semiconductor switches can be connected in parallel to handle more current or the same current with less conduction loss, and can be driven by a single gate driver output signal” (Mauder, Para. [0003], Lines 6-16).
It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to understand that although Chen is silent as to whether or not the FETs of the “transfer device” are connected in parallel, Chen would inherently incorporate some type of conventional configuration of the switches commonly understood in the art. The reason for connecting the FETs in parallel taught by Mauder, for reducing current through each FET or to reduce conduction loss, teaches one of the many conventional power switch configurations utilized in the art for controlling the charging current to a load. A person of ordinary skill in the art would have been motivated to choose based on desirability, one of the many known conventional methods, such as the one taught by Mauder, to control the discharge current within the system of Chen.
Regarding Claim 11, The combined teaching of the Chen, Kahn and Ayd references discloses the claimed invention as stated above in claim 10. Furthermore, Chen teaches further comprising activating the first thermal battery before the second thermal battery is activated, activating an n-1th thermal battery before the nth thermal battery is activated, and activating the nth thermal battery last (Chen, Fig. 1; Paras. [0044] – [0045]).
Regarding Claim 12, The combined teaching of the Chen, Kahn and Ayd references discloses the claimed invention as stated above in claim 10. Furthermore, Kahn teaches further comprising pulling the first battery current from the first thermal battery employing the first battery power dump unit (Kahn, Fig. 11, Element 1182; Para. [0303], “in response to a command to discharge”, and Para. [0307], “auxiliary discharge circuit” . Where the auxiliary discharge circuit is in communication with each battery.) until the first thermal battery voltage reaches a target voltage of 10 percent of a full voltage value responsive to the first thermal battery going offline (Kahn, Para. [0307]). Furthermore, Ayd teaches the battery type being thermal (Ayd, Col. 1, Lines 4-31).
Chen as modified by Kahn and Ayd discloses the claimed invention except for the percentage of full voltage where the battery is considered depleted. It would have been obvious to one having ordinary skill in the art to determine the value to be 10%, since it has been held that discovering an optimum value of a result effective variable involves only routine skill in the art.
It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to understand that although Chen is silent as to the option of incorporating a dump unit to assure no power is left in an expended battery, Chen would inherently incorporate some type of conventional battery safety protocols commonly understood in the art. The auxiliary discharge circuit taught by Kahn, for safely discharging a battery, teaches one of the many conventional battery discharging circuits utilized in the art for discharging a battery. A person of ordinary skill in the art would have been motivated to choose based on desirability, one of the many known conventional methods, such as the one taught by Kahn, to control the discharge of the battery within the system of Chen.
It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to understand that although Chen is silent as to the type of battery used in the invention, Chen would inherently incorporate some type of conventional battery type commonly understood in the art. The battery type taught by Ayd, for providing long lasting batteries, teaches one of the many conventional battery types utilized in the art for powering a system. A person of ordinary skill in the art would have been motivated to choose based on desirability, one of the many known conventional methods, such as the one taught by Ayd, to control the discharge of the battery within the system of Chen.
Regarding Claim 13, The combined teaching of the Chen, Kahn and Ayd references discloses the claimed invention as stated above in claim 10. Furthermore, Kahn teaches further comprising pulling the second battery current from the second thermal battery employing the second battery power dump unit (Kahn, Fig. 11, Element 1182; Para. [0303], “in response to a command to discharge”, and Para. [0307], “auxiliary discharge circuit” . Where the auxiliary discharge circuit is in communication with each battery.) until the second thermal battery voltage reaches a target voltage of 10 percent of a full voltage value responsive to the second thermal battery going offline (Kahn, Para. [0307]). Furthermore, Ayd teaches the battery type being thermal (Ayd, Col. 1, Lines 4-31).
Chen as modified by Kahn and Ayd discloses the claimed invention except for the percentage of full voltage where the battery is considered depleted. It would have been obvious to one having ordinary skill in the art to determine the value to be 10%, since it has been held that discovering an optimum value of a result effective variable involves only routine skill in the art.
It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to understand that although Chen is silent as to the option of incorporating a dump unit to assure no power is left in an expended battery, Chen would inherently incorporate some type of conventional battery safety protocols commonly understood in the art. The auxiliary discharge circuit taught by Kahn, for safely discharging a battery, teaches one of the many conventional battery discharging circuits utilized in the art for discharging a battery. A person of ordinary skill in the art would have been motivated to choose based on desirability, one of the many known conventional methods, such as the one taught by Kahn, to control the discharge of the battery within the system of Chen.
It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to understand that although Chen is silent as to the type of battery used in the invention, Chen would inherently incorporate some type of conventional battery type commonly understood in the art. The battery type taught by Ayd, for providing long lasting batteries, teaches one of the many conventional battery types utilized in the art for powering a system. A person of ordinary skill in the art would have been motivated to choose based on desirability, one of the many known conventional methods, such as the one taught by Ayd, to control the discharge of the battery within the system of Chen.
Regarding Claim 14, The combined teaching of the Chen, Kahn and Ayd references discloses the claimed invention as stated above in claim 10. Furthermore, Kahn teaches wherein each of the power dump units (Kahn, Fig. 11, Element 1182) include a dump MOSFET (Kahn, Fig. 11, Element 1186) connected to a dump resistor (Kahn, Fig. 11, Element 1184; Para. [0303]).
It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to understand that although Chen is silent as to the option of incorporating a dump unit to assure no power is left in an expended battery, Chen would inherently incorporate some type of conventional battery safety protocols commonly understood in the art. The auxiliary discharge circuit taught by Kahn, for safely discharging a battery, teaches one of the many conventional battery discharging circuits utilized in the art for discharging a battery. A person of ordinary skill in the art would have been motivated to choose based on desirability, one of the many known conventional methods, such as the one taught by Kahn, to control the discharge of the battery within the system of Chen.
Regarding Claim 15, The combined teaching of the Chen, Kahn and Ayd references discloses the claimed invention as stated above in claim 10. Furthermore, Chen teaches wherein each of the battery power switches (Chen, Fig. 1, Elements 113, 123 and 193, “Transfer Device”; Para. [0042]. Where the Transfer Device is a pair of FETs in parallel to carry more current.) includes a FET and a diode, orienting the battery power switches to diode steer the current (Chen, Fig. 3, Elements 313, 317 and 318; Para. [0061]. Where the steering diodes are illustrated).
Regarding Claim 16, The combined teaching of the Chen, Kahn and Ayd references discloses the claimed invention as stated above in claim 10. Furthermore, Chen teaches further comprising configuring each of the power switches to be scaled (Chen, Fig. 3; Para. [0042]).
Claim 2 is rejected under 35 U.S.C. 103 as being unpatentable over Chen U.S. PGPub 2022/0393488 A1 (hereinafter Chen) in view of Kahn et al. U.S. PGPub 2022/0115879 A1 (hereinafter Kahn) and in view of Mauder et al. U.S. PGPub 2024/0113705 A1 (hereinafter Mauder) as a teaching reference as applied to claim 1 above, and further in view of Ayd, III et al. U.S. Patent 3,639,773 (hereinafter Ayd).
Regarding Claim 2, The combined teaching of the Chen and Kahn references discloses the claimed invention as stated above in claim 1, but does not teach the battery type.
Ayd, however, teaches wherein the first, second and nth batteries (Ayd, Fig. 1, Elements B1, B2 and B4) are thermal batteries (Ayd, Col. 1, Lines 4-31).
It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to understand that although Chen is silent as to the type of battery used in the invention, Chen would inherently incorporate some type of conventional battery type commonly understood in the art. The battery type taught by Ayd, for providing long lasting batteries, teaches one of the many conventional battery types utilized in the art for powering a system. A person of ordinary skill in the art would have been motivated to choose based on desirability, one of the many known conventional methods, such as the one taught by Ayd, to control the discharge of the battery within the system of Chen.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
Bogue et al. U.S. Patent 3,693,068 teaches a power supply comprising sequentially activated batteries.
O’Donnell et al. U.S. PGPub 2022/0220867 teaches a thermal energy storage assembly.
Miller, Jr. et al. U.S. Patent 10,529,995 teaches a missile battery.
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/JERRY D ROBBINS/ Examiner, Art Unit 2859