DETAILED ACTION
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claims 1-22 are pending in this Application and are subject to examination.
Drawings Objections
The drawings are objected to as failing to comply with 37 CFR 1.84(p)(5) because they do not include the following reference sign(s) mentioned in the description:
The published disclosure paragraph [0212] mentions the reference number 100, 122, and 140 and which are not shown in Fig. 12. This paragraph recites “In the illustrated embodiment of FIG. 12, the hierarchical structure of the system 100 may facilitate communications between controllers of the system 100 with respect to bidding and control over power transfer. For instance, the SSPS controller 112 may communicate a price signal to a lower-level controller, such as …the node controller 122, or a SUPER 140…”. Is I to note that 112 is an upper level controller SSPS but the same number is used as the HUB/NODE/Super controller below.
Also, reference numbers “…1103, 1104…in Fig. 29” (see disclosure [0253] “A method of operation for a SUPER controller 142 in accordance with one embodiment is shown in FIG. 29 … Steps 1102, 1103, 1104”).
The drawings are objected to as failing to comply with 37 CFR 1.84(p)(5) because they include the following reference character(s) not mentioned in the description:
1132, 1132, 1134, 1135 in Fig. 29 are not mentioned in the disclosure.
Corrected drawing sheets in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance.
Claim Objections
Claim 15 is objected to because of the following informalities:
Claim 15 recites “…the AC power…” This limitation lacks of antecedent basis in the claim.
For purposes of Examination claim 15 will be interpreted as:
“15. wherein AC power is single-phase or three-phase power.
Appropriate correction is required.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 4-10 and 15 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Claims 4-6 and 8 recites the limitation "the first communication link" in line 1. There is insufficient antecedent basis for this limitation in the claim. It is unclear if the first communication link refers back to the first communication channel recited in claim 1 or 3 (for claim 8). The context of disclosure suggests that channel and link refer to two different elements (see Published disclosure 0228).
For purposes of Examination claims 4-6 will be interpreted as:
--4. wherein a first communication link corresponds to a serial peripheral interface.--
--5. wherein a first communication link is established via optical fiber.--
--6. wherein communications transmitted via a first communication link are transferred via a physical medium.—
--8, wherein communications are transmitted via a first communication link according to a message frame.--
Appropriate correction is required.
As to claim 7-10, and 15, these claims depend on claim 3, 4, and 6 respectively, they are rejected for the same reasons mutatis mutandis as their parent claim since it inherits the same error.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 1-3, 5-8, 11, 13-14, 16-19 and 21 are rejected under 35 U.S.C. 103 as being unpatentable over Fishman et al (US 20130249300) in view of Chinthavali et al (Standard Modular Architecture for Consumer End Plug and Play Interfaces”, cited in the IDS as ref #21).
As per claim 1, Fishman teaches a solid-state power substation (SSPS) (see Fig. 1 and Fig. 6 ) comprising:
a plurality of smart universal power electronic regulators (SUPERs) (see Fig. 1 plurality of 27 devices and see Fig. 2c the SUPER 27; also, see [0039] “…in FIG. 1. Each SPOT 27 in FIG. 2(c) comprises the combination of a step-up voltage regulator (STEP-UP VOLT) and a rectifier DC-to-DC (DC/DC) converter, which is referred to as an integral step-up DC-to-DC converter (SU-DDC)…”), each SUPER including an intelligent power stage (IPS) operable to control power transferred through the SUPER from a power input (see Fig. 2C 27a acts as an IPS; also, see Fig. 1 and 2a-c power input of 27 which is connected to solar sources 30), to a power output (see Fig. 1 and Fig. 2a-c power output of 27 which includes DC link 22 feeder), the plurality of SUPERs including multiple SUPERs each configured according to one of a plurality of converter classes (see 27a in Fig.2c includes DC-DC converter, Inverter (also known as DC-AC converter) and rectifier (also known as AC-DC converter));
wherein the plurality of converter classes includes a DC load interface (DCLI) (DC load interface which is at the output of 27 in Fig.1 and 2c) and an AC load interface (ACLI) (see Fig. 8 AC converter classes);
a feeder operable to supply or receive power from a SUPER of the plurality of SUPERs (see fig. 1 and Fig. 2C feeder 22 );
wherein each of the plurality of SUPERs is configured to control a characteristic of the power transferred from the power input to the power output (see Fig. 1 and 2c and see [0043] “… The input current (Idc) and voltage (E) are measured by processor 20b in FIG. 2(c), which processor adjusts the duty cycle (that is, the ratio of Q.sub.5 time-on to time off) of the step-up voltage regulator so that the maximum power is harvested from each solar photovoltaic module string. The function of disconnect DS is to interrupt the flow of current in the event that the SU-DDC is removed from the system, for example, for maintenance of the SU-DDC.”; also, see and [0045] “…The output currents and voltages on the SU-DDC output terminals (positive terminal 3 (+Vout) and negative terminal 4 (-Vout)) are controlled by the microprocessor 20b through variation of the duty cycle D of the transistor Q.sub.5 in the step-up voltage regulator 27a' and frequency of the series resonant full bridge inverter section 27b'. The operating frequency of the resonant inverter used in the DC-to-DC converter is varied near resonance, to adjust the output power magnitude at negative output terminal 4 and equalize it to the power magnitude at positive output terminal 3”; also, se [0048]); and
wherein each of the plurality of SUPERs includes a controller operable to transmit and receive communications from an upper level control system (see Fig. 2C SUPERs comprise controller 20b which communicate with monitoring and control system 16, see [0012] “a centralized grid synchronized multiphase regulated current source inverter system; and a virtual immersion monitoring system and central control system for monitoring and controlling the high voltage,..”; 0028] “..virtual immersion monitoring and control system 16…”; also, see [0035] “…Transceiver 20c transmits power system data to the virtual immersion monitoring and control system if used in a particular example of the invention. The power system data can include: string voltage magnitudes; string current magnitudes; string power magnitudes; SPOT output current magnitudes; SPOT operating temperatures; and SPOT operational status data, such as whether the SPOT is operating at full maximum input power from all of the input photovoltaic strings, or limited maximum input power from at least some of the input photovoltaic strings. Transceiver 20c receives power system data that can include power system limit command data and power system ON or OFF status or control. Power system ON or OFF status can be determined…”),
wherein the controller of each of the plurality of SUPERs is operable to communicate with the IPS according to first (see Fig. 2C suggest at least one channel/link which is shown),
While Fishman teaches or suggests at least one link of communication which suggests at least one channel (the medium or link can hold one or more channels of communication as suggested in the current application), Fishman does not explicitly teach a second communication channel, wherein the first and second communication channels are synchronized according to a synchronization signal.
However, Chinthavali teaches a system comprising one or more SUPER controllers (see Fig.2 ) capable of being configured as a DC load interface (DCLI) (see Fig. 2) and an AC load interface (ACLI) (see Fig. 2), wherein the SUPER includes one or more IPSs (see Fig. 1 and Fig. 8), wherein the controller of each of the plurality of SUPERs is operable to communicate with the IPS according to first and second communication channels (see Fig. 1 and Fig. 8 one data channel and one control channel), wherein the first and second communication channels are synchronized according to a synchronization signal (see Fig. 8 synchronization signal; also, see table II in page 2109).
Therefore, it would have been obvious to one of ordinary skilled in the art before effective filing date of the claimed invention to which said subject matter pertains to have modified Fishman’s invention to include one or more SUPER controllers configured as a DC load interface (DCLI) and an AC load interface (ACLI), wherein each SUPER includes one or more IPSs, wherein the controller of each of the plurality of SUPERs is operable to communicate with the IPS according to first and second communication channels, wherein the first and second communication channels are synchronized according to a synchronization signal as taught by Chinthavali in order to meet interoperability requirement between two devices (see page 2106 Col 1 par. 1) and to avoid corruption of the data and maintain stability and data integrity.
As per claim 2, Fishman-Chinthavali teaches the SSPS of claim 1, Fishman further teaches wherein the controller is operable to receive and operate according to SUPER constraints received from the upper level control system (see 0035 “…Transceiver 20c receives power system data that can include power system limit command data and power system ON or OFF status or control….”; see 0053 “…controlling a set DC input current magnitude delivered to each grid inverter package module where the set DC input current magnitude is set to match the supply of electrical current produced by harvesting 12 system with the demand by the conversion 14 system; and control the phase of the AC current injected into the grid relative to the phase of the AC grid voltage.”), and wherein the controller is operable to transmit sensor information to the upper level control system (see [0035] “Transceiver 20c transmits power system data to the virtual immersion monitoring and control system if used in a particular example of the invention. The power system data can include: string voltage magnitudes;…” and 0053]).
Chinthavali also teaches the limitations of claim 2 (see page 2108 Col 1 “SUPER receives setpoints/commands from a hierarchical controller at the grid node through the SUPER agent. The hierarchical node controller constitutes the highest level of the control hierarchy in the node as in Fig. 2, and hosts the system level objectives including optimization algorithms for economic operation and various functions like voltage, frequency regulation etc… Based on the negotiations with the ADMS and the system configuration, the hierarchical node controller estimates the P, Q setpoints for the various converters in the system under normal conditions. The SUPER agent translates the setpoints, regulation curves, control modes etc. as detailed in [12] to the SUPER controller…”; also, see Fig. 4 sensed information (health, status, measurements) and control information (see setpoints, commands) is shared between the SUPER and the upper level control system).
As per claim 3, Fishman-Chinthavali teaches the SSPS of claim 1, Fishman further teaches wherein communications according to the first communication channel are transmitted via a first communication link between the controller and the IPS (see Fig. 2c link between the controller 20b and IPS comprises a link; also, see 0033, 0034, and 0048).
Chinthavali also teaches a first communication link between the controller and the IPS (see Fig. 8 and Fig. 4).
As per claim 5, Fishman-Chinthavali teaches the SSPS of claim 1, Fishman dos not explicitly teach wherein the first communication link is established via optical fiber.
Chinthavali further teaches the system comprising the first communication link is established via optical fiber (see page 2111 Col 2 par. 1 “The control channel communication which is the critical link between the SUPER & IPS was validated using a testbed with the SUPER and IPS controllers and the fiber optic interfaces as shown in Fig. 11…”)
Therefore, it would have been obvious to one of ordinary skilled in the art before effective filing date of the claimed invention to which said subject matter pertains to have modified Fishman-Chinthavali’s combination to include the first communication link is established via optical fiber as taught by Chinthavali in order to transmit data at higher speeds, higher bandwidth, and resistant to electromagnetic interference (these are very well known characteristics of transmitting data over fiber optic; also, see page 2108 last par. to page 2109 pr. 1 “The communication and the synchronization channels are designed to be fiber-based links to lower any additional latencies, avoid loss of data packets and enhance noise immunity”).
As per claim 6, Fishman-Chinthavali teaches the SSPS of claim 1, Fishman further teaches or suggests wherein communications transmitted via the first communication link are transferred via a physical medium (see Fig. 2a the controller 20a is connected to IPS 20a via a physical link).
Chinthavali further teaches the system comprising the first communication link is established via a physical medium including optical fiber (see page 2111 Col 2 par. 1 “The control channel communication which is the critical link between the SUPER & IPS was validated using a testbed with the SUPER and IPS controllers and the fiber optic interfaces as shown in Fig. 11…”)
Therefore, it would have been obvious to one of ordinary skilled in the art before effective filing date of the claimed invention to which said subject matter pertains to have modified Fishman-Chinthavali’s combination to include the first communication link is established via a physical medium including optical fiber as taught by Chinthavali in order to transmit data at higher speeds, higher bandwidth, and resistant to electromagnetic interference (these are very well known characteristics of transmitting data over fiber optic; also, see page 2108 last par. to page 2109 pr. 1 “The communication and the synchronization channels are designed to be fiber-based links to lower any additional latencies, avoid loss of data packets and enhance noise immunity”).
As per claim 7, Fishman-Chinthavali teaches the SSPS of claim 6, Fishman suggests wherein the physical medium corresponds to a wired connection (see Fig. 2a the controller 20a is connected to IPS 20a via a physical link such as wire).
Chinthavali further teaches the system comprising the first communication link is established via a physical medium corresponding to a wired connection (see page 2111 Col 2 par. 1 “The control channel communication which is the critical link between the SUPER & IPS was validated using a testbed with the SUPER and IPS controllers and the fiber optic interfaces as shown in Fig. 11…”, see Fig. 11 the wire connection is optical).
Therefore, it would have been obvious to one of ordinary skilled in the art before effective filing date of the claimed invention to which said subject matter pertains to have modified Fishman-Chinthavali’s combination to include the first communication link is established via a physical medium corresponding to a wired connection as taught by Chinthavali in order to transmit data at higher speeds, higher bandwidth, and resistant to electromagnetic interference (these are very well known characteristics of transmitting data over fiber optic; also, see page 2108 last par. to page 2109 pr. 1 “The communication and the synchronization channels are designed to be fiber-based links to lower any additional latencies, avoid loss of data packets and enhance noise immunity”).
As per claim 8, Fishman-Chinthavali teaches the SSPS of claim 3, Chinthavali further teaches wherein communications are transmitted via the first communication link according to a message frame (see Fig. 11 communication link and see table II frame message; also, see Fig. 12 and see page 2111 Col 2 par. 1).
Therefore, it would have been obvious to one of ordinary skilled in the art before effective filing date of the claimed invention to which said subject matter pertains to have modified Fishman-Chinthavali’s combination as taught about to include wherein communications are transmitted via the first communication link according to a message frame as taught by Chinthavali in order to transmit data between two controllers to increase network efficiency, reliability and speed (see page 2105 Col2 par. 1-2 “…Thus, with the objective to develop more resilient, reliable, and cost-effective PE interfaces, the paper proposes the concept of advanced fundamental building blocks (FBBs) with grid support functions, provisions for advanced features and hierarchical control and coordination…”)
As per claim 11, Fishman-Chinthavali teaches the SSPS of claim 1, Chinthavali further teaches wherein communications according to the second communication channel are transmitted via a second communication link between the controller and the IPS (see Fig. 1 and Fig. 8 one data channel/second channel and one control channel/first channel, wherein the data channel has a second communication link).
Therefore, it would have been obvious to one of ordinary skilled in the art before effective filing date of the claimed invention to which said subject matter pertains to have modified Fishman’s invention to include wherein communications according to the second communication channel are transmitted via a second communication link between the controller and the IPS as taught by Chinthavali in order to meet interoperability requirement between two devices (see page 2106 Col 1 par. 1 and see page 2108 Col 2 par. 3 “…To meet the interoperability and scalability requirements, SUPER and IPS are designed with two communication channels and a synchronization channel as shown in Fig. 8.) and to avoid corruption of the data and maintain stability and data integrity.
As per claim 13, Fishman-Chinthavali teaches the SSPS of claim 1,
wherein the plurality of converter classes includes an AC source interface (ACSI) and a DC source interface (DCSI) (see Fig. 1 DC source interface of each 14a-14d connected to 12; also, see Fig. 2a DC source interface connected to 30; also, see Fig. 8 AC source interface 40). Also, Chinthavali further teaches wherein the plurality of converter classes includes an AC source interface (ACSI) and a DC source interface (DCSI) (see page 2106 Col 1 par. 4 “The FBBs are to be used to build various PE interfaces such as DC load interfaces (DCLI), AC load interfaces (ACLI), DC source interfaces (DCSI), AC source interfaces (ACSI) and grid interfaces (GI) [10]…”).
As per claim 14, Fishman-Chinthavali teaches the SSPS of claim 1, Fishman further teaches wherein the IPS is operable to receive DC power at a power input and to generate AC power at the power output (see Fig. 8 inverter 14a). Also, Chinthavali further teaches wherein the IPS is operable to receive DC power at a power input and to generate AC power at the power output (see page 2106 Col 1 par. 4 “The FBBs are to be used to build various PE interfaces such as DC source interfaces (DCSI), …”; also, see Fig. 4 and table I DCSI convert battery DC power to AC voltage/grid).
As per claim 16, Fishman-Chinthavali teaches the SSPS of claim 1, Chinta Vali further teaches wherein the IPS is configured to communicate IPS sensor information to the controller via the second communication channel (see Fig. 1, Fig. 4 and Fig. 8 the data channel is used to send information from the IPS to the controller of the SUPER, the information including measurements; also, see page 2108 Col 2 last par. “..The data channel (operates at a slower rate than control channel) is used for miscellaneous messages including health, status, setpoints, warnings. The data framework or the messages in the data channel is designed to support advanced features like health monitoring”), and wherein the controller is configured to determine the sensor information based on the IPS sensor information (see Fig. 1 and 4 the Super receives data of several IPS controllers, thus, the sensor data is determined according to the IPS).
Therefore, it would have been obvious to one of ordinary skilled in the art before effective filing date of the claimed invention to which said subject matter pertains to have modified Fishman’s invention as taught above to include wherein the IPS is configured to communicate IPS sensor information to the controller via the second communication channel, and wherein the controller is configured to determine the sensor information based on the IPS sensor information as taught by Chinthavali in order to monitor and diagnose the system based on the received data and control the system accordingly (see page 2108 Col 2 par. 2 “..The SUPER controller responds to abnormalities in the converter operating conditions and will meet the ride through requirements for grid-connected systems… An example of such a
coordination between the SUPER and IPS is shown in Fig. 7. Scenarios like loss of communication, internal faults in the IPS will be relayed to the agents via SUPER controller using the communication links.”).
As per claim 17, Fishman teaches an SSPS for a power distribution system (see Fig. 1 and Fig. 6), the SSPS comprising:
a plurality of smart universal power electronic regulators (SUPERs) (see Fig. 1 plurality of 27 devices and see Fig. 2c the SUPER 27; also, see [0039] “…in FIG. 1. Each SPOT 27 in FIG. 2(c) comprises the combination of a step-up voltage regulator (STEP-UP VOLT) and a rectifier DC-to-DC (DC/DC) converter, which is referred to as an integral step-up DC-to-DC converter (SU-DDC)…”), each SUPER including an intelligent power stage (IPS) operable to control power transferred through the SUPER from a power input to a power output (see Fig. 2C 27a acts as an IPS; also, see Fig. 1 and 2a-c power input of 27 which is connected to solar sources 30), to a power output (see Fig. 1 and Fig. 2a-c power output of 27 which includes DC link 22 feeder), the plurality of SUPERs including multiple SUPERs each configured according to one of a plurality of converter classes (see 27a in Fig.2c includes DC-DC converter, Inverter (also known as DC-AC converter) and rectifier (also known as AC-DC converter)), the plurality of SUPERs including a standardized input interface (a standardized input interface used by 20b or 20c in Fig.2c and/or a standardized input interface used by corresponding one of 14a-14d) and a standardized output interface for all of the plurality of converter classes (see a standardized output interface used by 20b or 20c in Fig.2c and/or a standardized output interface used by corresponding one of 14a-14d; 27 includes DC-DC converter, Inverter (also known as DC-AC converter) and rectifier (also known as AC-DC converter) as shown in Fig.2c and 14 includes DC-AC converter);
wherein the plurality of converter classes includes a DC load interface (DCLI) and an AC load interface (ACLI) (see DC load interface which is at the output of 27 in Fig.1 and 2c and see Fig. 8 AC converter classes);
wherein each of the plurality of SUPERs is configured to control a characteristic of the power transferred from the power input to the power output (see Fig. 1 and 2c and see [0043] “… The input current (Idc) and voltage (E) are measured by processor 20b in FIG. 2(c), which processor adjusts the duty cycle (that is, the ratio of Q.sub.5 time-on to time off) of the step-up voltage regulator so that the maximum power is harvested from each solar photovoltaic module string. The function of disconnect DS is to interrupt the flow of current in the event that the SU-DDC is removed from the system, for example, for maintenance of the SU-DDC.”; also, see and [0045] “…The output currents and voltages on the SU-DDC output terminals (positive terminal 3 (+Vout) and negative terminal 4 (-Vout)) are controlled by the microprocessor 20b through variation of the duty cycle D of the transistor Q.sub.5 in the step-up voltage regulator 27a' and frequency of the series resonant full bridge inverter section 27b'. The operating frequency of the resonant inverter used in the DC-to-DC converter is varied near resonance, to adjust the output power magnitude at negative output terminal 4 and equalize it to the power magnitude at positive output terminal 3”; also, se [0048]) in accordance with commands received via the standardized input interface (see [0035] “…Transceiver 20c transmits power system data to the virtual immersion monitoring and control system if used in a particular example of the invention. The power system data can include: string voltage magnitudes; string current magnitudes; string power magnitudes; SPOT output current magnitudes; SPOT operating temperatures; and SPOT operational status data, such as whether the SPOT is operating at full maximum input power from all of the input photovoltaic strings, or limited maximum input power from at least some of the input photovoltaic strings. Transceiver 20c receives power system data that can include power system limit command data and power system ON or OFF status or control. Power system ON or OFF status can be determined…”; also, see [0053]); and
wherein each of the plurality of SUPERs includes a controller operable to transmit and receive communications from an upper level control system (see Fig. 2C SUPERs comprise controller 20b which communicate with monitoring and control system 16, see [0012], [0028], [0035], and [0053]),
wherein the controller of each of the plurality of SUPERs is operable to communicate with the IPS according to first (see Fig. 2C suggest at least one channel/link which is shown),
While Fishman teaches or suggests at least one link of communication which suggests at least one channel (the medium or link can hold one or more channels of communication as suggested in the current application), Fishman dos not explicitly teach a second communication channel, wherein the first and second communication channels are synchronized according to a synchronization signal.
However, Chinthavali teaches a system comprising one or more SUPER controllers (see Fig.2 ) capable of being configured as a DC load interface (DCLI) (see Fig. 2) and an AC load interface (ACLI) (see Fig. 2), the SUPERs including a standardized input interface and a standardized output interface for all of the plurality of converter classes (see page 2106 Col1 Par. 2 “Coordination of multiple FBBs calls for standardization of interfaces and interconnections. Besides, standardization of communication protocols, messages between the different entities, control coordination, synchronization of the different entities,…” and see Col 2 las par. “In a SUPER, the interfaces for communication, controls, protection, and filters are standardized for interoperability and scalability.), wherein the SUPER includes one or more IPSs (see Fig. 1 and Fig. 8), wherein the controller of each of the plurality of SUPERs is operable to communicate with the IPS according to first and second communication channels (see Fig. 1 and Fig. 8 one data channel and one control channel), wherein the first and second communication channels are synchronized according to a synchronization signal (see Fig. 8 synchronization signal; also, see table II in page 2109).
Therefore, it would have been obvious to one of ordinary skilled in the art before effective filing date of the claimed invention to which said subject matter pertains to have modified Fishman’s invention to include one or more SUPER controllers configured as a DC load interface (DCLI) and an AC load interface (ACLI), the SUPERs including a standardized input interface and a standardized output interface for all of the plurality of converter classes, wherein each SUPER includes one or more IPSs, wherein the controller of each of the plurality of SUPERs is operable to communicate with the IPS according to first and second communication channels, wherein the first and second communication channels are synchronized according to a synchronization signal as taught by Chinthavali in order to meet interoperability requirement between two devices (see page 2106 Col 1 par. 1) and to avoid corruption of the data and maintain stability and data integrity and including standardized interfaces for interoperability and scalability (see page 2106 last par.) and reduce high associated
balance of system (BOS) cost (see page 2105 Col 1 to Col 2).
As per claim 18, Fishman-Chinthavali teaches the SSPS of claim 17, Fishman further teaches wherein the controller is operable to receive and operate according to SUPER constraints received from the upper level control system (see 0035 “…Transceiver 20c receives power system data that can include power system limit command data and power system ON or OFF status or control….”; see 0053 “…controlling a set DC input current magnitude delivered to each grid inverter package module where the set DC input current magnitude is set to match the supply of electrical current produced by harvesting 12 system with the demand by the conversion 14 system; and control the phase of the AC current injected into the grid relative to the phase of the AC grid voltage.”), and
wherein the controller is operable to transmit sensor information to the upper level control system in accordance with the standardized output interface (see [0035] and [0053]).
Chinthavali also teaches the limitations of claim 2 (see page 2108 Col 1 “SUPER receives setpoints/commands from a hierarchical controller at the grid node through the SUPER agent. The hierarchical node controller constitutes the highest level of the control hierarchy in the node as in Fig. 2, and hosts the system level objectives including optimization algorithms for economic operation and various functions like voltage, frequency regulation etc… Based on the negotiations with the ADMS and the system configuration, the hierarchical node controller estimates the P, Q setpoints for the various converters in the system under normal conditions. The SUPER agent translates the setpoints, regulation curves, control modes etc. as detailed in [12] to the SUPER controller…”; also, see Fig. 4 sensed information (health, status, measurements) and control information (see setpoints, commands) is shared between the SUPER and the upper level control system).
As per claim 19, Fishman-Chinthavali teaches the SSPS of claim 17, Fishman further teaches wherein communications according to the first communication channel are transmitted via a first communication link between the controller and the IPS (see Fig. 2c link between the controller 20b and IPS comprises a link; also, see 0033, 0034, and 0048). Chinthavali also teaches a first communication link between the controller and the IPS (see Fig. 8 and Fig. 4).
As per claim 21, Fishman-Chinthavali teaches the SSPS of claim 17,
Chinthavali further teaches wherein the synchronization signal is provided via a third communication channel (see Fig. 8 three channels, one for the sync signal; also, see page 2108 col 2 par. 3 “ the communication speed/channel capacity in bits per second (bps) decreases from IPS to higher level controller with increase in the control and protection response timings. To meet the interoperability and scalability requirements, SUPER and IPS are designed with two communication channels and a synchronization channel as shown in Fig. 8.”), and wherein operation according to the first, second, and third communication channels enable efficient communication and operation of the IPS (this is an intended use of using three channels. See page 2111 “Conclusion The paper proposes a novel architecture of FBBs for consumer end grid interfaces with an objective to improve grid reliability, resiliency, power quality, efficiency, cost, and security. The architecture was developed with an integrated approach that includes features like interoperability, scalability, modularity”; ).
Therefore, it would have been obvious to one of ordinary skilled in the art before effective filing date of the claimed invention to which said subject matter pertains to have modified Fishman-Chinthavali’s combination as taught about to include wherein the synchronization signal is provided via a third communication channel, and wherein operation according to the first, second, and third communication channels enable efficient communication and operation of the IPS as taught by Chinthavali in order to transmit data between two controllers to increase network efficiency, reliability and speed (see page 2105 Col 2 par. 1-2 “…Thus, with the objective to develop more resilient, reliable, and cost-effective PE interfaces, the paper proposes the concept of advanced fundamental building blocks (FBBs) with grid support functions, provisions for advanced features and hierarchical control and coordination…”).
Claim(s) 4 and 15 are rejected under 35 U.S.C. 103 as being unpatentable over Fishman et al (US 20130249300) in view of Chinthavali et al (Standard Modular Architecture for Consumer End Plug and Play Interfaces”, cited in the IDS as ref #21) as applied to claim 1 above, and further in view of Kalkunte et al (US 11172542).
As per claim 4, Fishman-Chinthavali teaches the SSPS of claim 1, While Chinthavali teaches a serail interface (SCI) ((see page 2109 table II channels use SCI interface and see page 2111 Col “…The SCI peripheral in the SUPER controller was used for the control channel communication…”), Fishman-Chinthavali does not explicitly teach wherein the first communication link corresponds to a serial peripheral interface (the serial peripheral interface has ben interpreted as an SPI interface which is distinct than a SCI interface).
However, Kalkunte teaches a system comprising two devices communicating over a first communication link, wherein the first communication link corresponds to a serial peripheral interface (see Col 14 line 65 to Col 15 line 12 “the processor 202 may be further configured to access a Serial Peripheral Interface (SPI) between a modem and the radio (e.g., the front-end RF section) of each of the plurality of edge devices 104 (i.e., one or more edge devices arranged at each vehicle and/or the second type of edge devices 104B, such as the plurality of RSU devices 114). The SPI may be a full-duplex bus interface used to send data between a control circuitry (e.g., a microcontroller or DSP) and other peripheral components,…”).
Therefore, it would have been obvious to one of ordinary skilled in the art before effective filing date of the claimed invention to which said subject matter pertains to have modified Fishman’s invention to include a first communication link that corresponds to a serial peripheral interface as taught by Kalkunte in order to transmit data, between a SUPER and an IPS of Fishman-Chinthavali, since the SPI interface supports very high speeds and throughput and is suitable for handling a lot of data (see Col 15 lines 8-11).
As per claim 15, Fishman-Chinthavali-Kalkunte teaches the SSPS of claim 4, Fishman further teaches wherein the AC power is single-phase or three-phase power (see [0053] “…control the phase of the AC current injected into the grid relative to the phase of the AC grid voltage”, thus, a single phase is suggested; the output of 14a-14d is one phase). Chinthavali also teaches wherein the AC power is single-phase or three-phase power (see Fig. 2 120AC is single phase AC power; also, see Fig. 9 C is a three phase SUPER, see page 2110 Col 1 par. 3-4 “The corresponding three-phase grid currents following the start-up ramp is shown in Fig. 9(c)… As discussed in the previous section, loss of control channel communication significantly impacts the three-phase grid currents. Such a loss event was simulated to understand the impact on the AC output.”; also, see Fig. 10 and page 2111 Col 1 par. 1).
Therefore, it would have been obvious to one of ordinary skilled in the art before effective filing date of the claimed invention to which said subject matter pertains to have modified Fishman-Chinthavali-Kalkunte’s combination as taught above to include SUPER connected to AC power, wherein the AC power is single-phase or three-phase power as taught by Chinthavali in order to control monito and regulate single phase and three phase AC power.
Claim(s) 9-10 and 20 are rejected under 35 U.S.C. 103 as being unpatentable over Fishman et al (US 20130249300) in view of Chinthavali et al (Standard Modular Architecture for Consumer End Plug and Play Interfaces”, cited in the IDS as ref #21) as applied to claim 3 above, and further in view of Gurr et al (US 4419666).
As per claim 9, Fishman-Chinthavali teaches the SSPS of claim 8, Chinthavali further teaches wherein: each message frame comprises (see Fig. 8 synchronization signal; also, see table II in page 2109); each message frame includes a first message transmitted via the first communication channel (see Table II and see Fig. 8 the first channel (control channel) uses a first channel or link and comprises a first message; also, see page 2111 Col 2).
Therefore, it would have been obvious to one of ordinary skilled in the art before effective filing date of the claimed invention to which said subject matter pertains to have modified Fishman’s invention to include each message frame comprises (see page 2106 Col 1 par. 1) and to avoid corruption of the data and maintain stability and data integrity (also, see page 2111 Col 2).
The instant disclosure suggest that the sync signal precedes the message frame (see Fig. 18), and while the instant disclosure does not define the term proceeded, this has been interpreted in the BRI as a signal that comes after a frame data, Fishman-Chinthavali dos not explicitly tech each message frame is proceeded by a synchronization signal.
However, Gurr teaches a method and apparatus for transmitting data comprising each message frame is proceeded by a synchronization signal (see Col 46-52 “…At the end of the message block is a frame sync character which preferably comprises an ASCII end of test character…”; also, see Col 9 lines 1-10; also, see Col 8 lines 53-to-Col 9 line 10 ).
Therefore, it would have been obvious to one of ordinary skilled in the art before effective filing date of the claimed invention to which said subject matter pertains to have modified Fishman-Chinthavali’s combination as taught above to include including each message frame proceeded by a synchronization signal as taught by Gurr in order identify the end of a message and turn off the communication of a device (see Fig. 2 carrier off/device off after the proceeded frame sync, see Col 9 lines 7-9).
As per claim 10, Fishman-Chinthavali-Gurr teaches the SSPS of claim 9, Fishman further teaches wherein the first message is a type of control message including a directive for operation of the IPS (see [0033], [0034], [0038] and [0053], Thus, the controller 20b controls the IPS for operation of the IPS). Also, Chinthavali further teaches further teaches wherein the first message is a type of control message including a directive for operation of the IPS (see table II the messages are sent to the IPS and they comprise control signals/directives. These messages comprises commands/directives to control the operation of the IPS and inverter, see page 2108 Col 2 par. 5 “The control channel is dedicated to transmitting the AC voltage references or the duty ratios from the SUPER to IPS…”).
As per claim 20, Fishman-Chinthavali teaches the SSPS of claim 19, Chinthavali further teaches wherein: communications are transmitted via the first communication link according to a message frame (see Fig. 11 communication link and see table II frame message; also, see Fig. 12 and see page 2111 Col 2 par. 1), each message frame comprises (see Fig. 8 synchronization signal; also, see table II in page 2109); each message frame includes a first message transmitted via the first communication channel (see Table II and see Fig. 8 the first channel (control channel) uses a first channel or link and comprises a first message; also, see page 2111 Col 2).
Therefore, it would have been obvious to one of ordinary skilled in the art before effective filing date of the claimed invention to which said subject matter pertains to have modified Fishman-Chinthavali’s combination as taught above to include wherein communications are transmitted via the first communication link according to a message frame, each message frame comprises a synchronization signal and each message frame includes a first message transmitted via the first communication channel as taught by Chinthavali in order to transmit data between two controllers to increase network efficiency, reliability and speed (see page 2105 Col2 par. 1-2 “…Thus, with the objective to develop more resilient, reliable, and cost-effective PE interfaces, the paper proposes the concept of advanced fundamental building blocks (FBBs) with grid support functions, provisions for advanced features and hierarchical control and coordination…”) in order to meet interoperability requirement between two devices (see page 2106 Col 1 par. 1) and to avoid corruption of the data and maintain stability and data integrity (also, see page 2111 Col 2).
The instant disclosure suggest that the sync signal precedes the message frame (see Fig. 18), and while the instant disclosure does not define the term proceeded, this has been interpreted in the BRI as a signal that comes after a frame data, Fishman-Chinthavali dos not explicitly tech each message frame is proceeded by a synchronization signal.
However, Gurr teaches a method and apparatus for transmitting data comprising each message frame is proceeded by a synchronization signal (see Col 46-52 “…At the end of the message block is a frame sync character which preferably comprises an ASCII end of test character…”; also, see Col 9 lines 1-10; also, see Col 8 lines 53-to-Col 9 line 10 ).
Therefore, it would have been obvious to one of ordinary skilled in the art before effective filing date of the claimed invention to which said subject matter pertains to have modified Fishman-Chinthavali’s combination as taught above to include including each message frame proceeded by a synchronization signal as taught by Gurr in order identify the end of a message and turn off the communication of a device (see Fig. 2 carrier off/device off after the proceeded frame sync, see Col 9 lines 7-9).
Claim(s) 12 and 22 are rejected under 35 U.S.C. 103 as being unpatentable over Fishman et al (US 20130249300) in view of Chinthavali et al (Standard Modular Architecture for Consumer End Plug and Play Interfaces”, cited in the IDS as ref #21) as applied to claim 3 above, and further in view of Kanamarlapudi et al (US 20160302100).
As per claim 12, Fishman-Chinthavali teaches the SSPS of claim 11, Chinthavali further teaches wherein: a second message is transmitted via the second communication link (see Fig. 1 and Fig. 8 one data channel/second channel and one control channel/first channel, wherein the data channel has a second communication link).
Therefore, it would have been obvious to one of ordinary skilled in the art before effective filing date of the claimed invention to which said subject matter pertains to have modified Fishman’s invention to include wherein communications according to the second communication channel are transmitted via a second communication link between the controller and the IPS as taught by Chinthavali in order to meet interoperability requirement between two devices (see page 2106 Col 1 par. 1 and see page 2108 Col 2 par. 3 “…To meet the interoperability and scalability requirements, SUPER and IPS are designed with two communication channels and a synchronization channel as shown in Fig. 8.) and to avoid corruption of the data and maintain stability and data integrity.
However, Fishman-Chinthavali does not explicitly teach the second message is a data message with a priority lower than communications transmitted via the first communication channel and the second message is transmitted by one of the controller and the IPS in response to being polled for the second message from the other of the controller and the IPS.
However, Kanamarlapudi teaches a method and system comprising a communication system comprising transmitting a second message, wherein the second message is a data message with a priority lower than communications transmitted via the first communication channel (fig. 3a a message/data unit received over a first channel with lower priority; also, see [0008] “a user equipment (UE) determining that at least one data unit to be received over a first logical channel is yet to be received by the UE. In an aspect, the method also includes the UE determining that there is on-going data traffic over a second logical channel, and the first logical channel has a lower priority than the second logical channel. In another aspect, the method also includes the UE delaying initiation of an RLC reset on a condition that the UE determines that the at least one data unit is yet to be received over the first logical channel and there is data traffic over the second logical channel”; see [0009] “….wherein the first logical channel having a lower priority than the second logical channel…,; also, see [0010-0011]) and the second message is transmitted by one of a first controller and a second controller in response to being polled for the second message from the other of the first controller and the second controller (see [0005] “The transmitting entity (e.g., an UE or a network device) may request a peer RLC entity for a status report by transmitting or retransmitting a data unit querying for status (e.g., a Data PDU with Polling Bit set, a Poll SUFI PDU, or a status request)”; also, see [0025] “ an aspect, data traffic from a Radio Bearer is usually prioritized for transmission based on associated logical channel priority. If data (e.g., Control PDUs or Status PDUs) are scheduled to be transmitted on other radio bearers at a lower priority, the data may be missed or not be considered. A receiving entity (e.g., an UE or a network device) may keep transmitting requests for status…”; also, see [0026]).
Therefore, it would have been obvious to one of ordinary skilled in the art before effective filing date of the claimed invention to which said subject matter pertains to have modified Fishman-Chinthavali’s combination as taught above to include a communication system comprising transmitting a second message, wherein the second message is a data message with a priority lower than communications transmitted via the first communication channel and the second message is transmitted by one of a first controller and a second controller in response to being polled for the second message from the other of the first controller and the second controller as taught by Kanamarlapudi in order to transmit messages of different priorities through the different communication channels and allow a channel with lower priority to receive a message by triggering a delay of an RLC reset, thus, allowing mor time to the channel to receive the packet/message (see Fig. 0054 and see Fig. 3B. “At block 310, RLC reset controller 126 may delay initiation of an RLC reset, which may, for example, provide additional opportunity to the first logical channel with a lower priority to receive the at least one data unit from network entity 180 which is not yet received; [0005] an RLC reset will cause a drop).
As per claim 22, Fishman-Chinthavali teaches the SSPS of claim 21,
Chinthavali further teaches wherein data transmitted via the first communication channel is synchronized with the synchronization signal (see Fig. 8 synchronization signal; also, see table II in page 2109);
Fishman-Chinthavali does not explicitly teach wherein data transmitted via the second communication channel is transmitted in response to a polling request.
However, Kanamarlapudi teaches a method and system comprising a communication system comprising transmitting data via a second communication channel, wherein data transmitted via the second communication channel is transmitted in response to a polling request (see [0005] “The transmitting entity (e.g., an UE or a network device) may request a peer RLC entity for a status report by transmitting or retransmitting a data unit querying for status (e.g., a Data PDU with Polling Bit set, a Poll SUFI PDU, or a status request)”; also, see [0025] “ an aspect, data traffic from a Radio Bearer is usually prioritized for transmission based on associated logical channel priority. If data (e.g., Control PDUs or Status PDUs) are scheduled to be transmitted on other radio bearers at a lower priority, the data may be missed or not be considered. A receiving entity (e.g., an UE or a network device) may keep transmitting requests for status…”; also, see [0026]).
Therefore, it would have been obvious to one of ordinary skilled in the art before effective filing date of the claimed invention to which said subject matter pertains to have modified Fishman-Chinthavali’s combination as taught above to include a communication system comprising transmitting data via a second communication channel, wherein data transmitted via the second communication channel is transmitted in response to a polling request as taught by Kanamarlapudi in order to transmit messages of different priorities through the different communication channels based on polling (see 0005 “The transmitting entity (e.g., an UE or a network device) may request a peer RLC entity for a status report by transmitting or retransmitting a data unit querying for status (e.g., a Data PDU with Polling Bit set, a Poll SUFI PDU, or a status request)”; also, see Fig. 0054 and see Fig. 3B. “At block 310, RLC reset controller 126 may delay initiation of an RLC reset, which may, for example, provide additional opportunity to the first logical channel with a lower priority to receive the at least one data unit from network entity 180 which is not yet received), allowing controller to receive data at any desired time on demand.
Conclusion
The prior art made of record and not relied upon, as cited in PTO form 892, is considered pertinent to applicant's disclosure.
Trim et al (US 20230099750) teaches a system where priority is given to messages and/or channels, and polling is used to retrieve data from other devices (see 0051 The multiplexer polls other transport channels for non-critical priority packets with permissible delay.).
Smith et al (US 20150263738) teaches an inverter/IPS controller, and system controller/SUPER, hierarchical controllers 124.
Examiner respectfully requests, in response to this Office action, support be shown for language added to any original claims on amendment and any new claims. That is, indicate support for newly added claim language by specifically pointing to page(s) and line number(s) in the specification and/or drawing figure(s). This will assist Examiner in prosecuting the application.
When responding to this Office Action, Applicant is advised to clearly point out the patentable novelty which he or she thinks the claims present, in view of the state of the art disclosed by the references cited or the objections made. Applicant must also show how the amendments avoid or differentiate from such references or objections. See 37 CFR 1.111 (c).
Any inquiry concerning this communication or earlier communications from the examiner should be directed to OLVIN LOPEZ ALVAREZ whose telephone number is (571) 270-7686 and fax (571) 270-8686. The examiner can normally be reached Monday thru Friday from 9:00 A.M. to 6:00 P.M.
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/O. L./
Examiner, Art Unit 2117
/ROBERT E FENNEMA/Supervisory Patent Examiner, Art Unit 2117