DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
Response to Arguments
Applicant’s arguments, filed on 12/15/2025, with respect to amended independent claim(s) 1 have been fully considered and are persuasive. Therefore, the rejection has been withdrawn. However, upon further consideration, a new ground(s) of rejection is made in view of Ishida et al. and Okabe, and response to the arguments have been fully incorporated into the claim rejection set forth below in this office action.
Applicant’s arguments with respect to amended independent claim(s) 7 have been fully considered and are persuasive. The Examiner’s basis for allowability for amended independent claim(s) 7 is the same as those set forth within that Response. Thereby, after conducting an updated search none of the prior arts of record, alone or in combination, discloses the claimed invention of amended independent claim(s) 7. Claims 7 and 11-12 are allowed.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim 1-2 and 4-5 are rejected under 35 U.S.C. 103 as being unpatentable over Ishida et al. (US publication 2018/0196294 A1), hereinafter referred to as Ishida294, and further in view of Okabe (US publication 2012/0146037 A1), hereinafter referred to as Okabe037.
Regarding claim 1, Ishida294 teaches a thin film transistor (TFT) (fig. 3 or fig. 4 and related text), comprising: a gate electrode (2, [0054]); an insulating layer (3, [0054]) on the gate electrode; and an active layer (5/6/7, [0054-0056]) on the insulating layer, the insulating layer being between the gate electrode and the active layer (fig. 3 or 4); wherein the active layer comprises an annealed layer (5) and an amorphous silicon (a-Si) layer (6), the annealed layer is between the a-Si layer and the insulating layer (fig. 3 or 4), and the annealed layer is made of a-Si material by excimer laser annealing ([0077-0079]).
Ishida294 does not explicitly teach and an average size of grains of the annealed layer is in a range of 100 nm to 180 nm.
Okabe037 teaches an average size of grains of the annealed layer is in a range of 100 nm to 180 nm ([0079]).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the teachings of Ishida294 with that of Okabe037 so that an average size of grains of the annealed layer is in a range of 100 nm to 180 nm to decrease the OFF current and to provide a TFT having the large on-off ratio ([0010]).
Regarding claim 2, Ishida294 teaches wherein a material of the annealed layer is microcrystalline silicon or polycrystalline silicon ([0077-0079]).
Regarding claim 4, Ishida294 teaches a thin film transistor (TFT) array substrate (a display apparatus will have an array of TFTs on a substrate, [0045-0054]), comprising: a substrate ([0054]); and a plurality of thin film transistors (TFTs) on the substrate ([0045-0054]), each of the plurality of TFTs comprising a gate electrode (2, [0054]), an insulating layer (3, [0054]) on the gate electrode, and an active layer (5/6/7, [0054-0056]) on the insulating layer, the insulating layer being between the gate electrode and the active layer (fig. 3 or 4); wherein the active layer comprises an annealed layer (5) and an amorphous silicon (a-Si) layer (6), the annealed layer is between the a-Si layer and the insulating layer (fig. 3 or 4), and the annealed layer is made of amorphous silicon a-Si material by excimer laser annealing ([0077-0079]).
Regarding claim 5, Ishida294 teaches wherein a material of the annealed layer is microcrystalline silicon or polycrystalline silicon ([0077-0079]).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim 3 and 6 are rejected under 35 U.S.C. 103 as being unpatentable over Ishida294 in view of Okabe037, as applied to claim 1 or 4 above, and further in view of Kim et al. (US publication 2021/0193697 A1), hereinafter referred to as Kim697.
Regarding claim 3, Ishida294 and Okabe037 disclos all the limitations of claim 1 as discussed above on which this claim depends.
Ishida294 also teaches wherein the active layer further comprises an n+-type silicon layer (7, [0056]), and the n+-type layer is on a side of the a-Si layer away from the annealed layer (fig. 3 or 4).
Ishida294 and Okabe037 do not explicitly teach an n+-type hydrogenated amorphous silicon (n+a-Si:H) layer.
Kim697 teaches an n+-type hydrogenated amorphous silicon (n+a-Si:H) layer (163/165, [0076-0077]).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the teachings of Ishida294 and Okabe037 with that of Kim697 so that wherein the active layer further comprises an n+-type hydrogenated amorphous silicon (n+a-Si:H) layer for ohmic contact for improved electrical connection.
Regarding claim 6, Ishida294 and Okabe037 disclose all the limitations of claim 4 as discussed above on which this claim depends.
Ishida294 also teaches wherein the active layer further comprises an n+-type silicon layer (7, [0056]), and the n+-type layer is on a side of the a-Si layer away from the annealed layer (fig. 3 or 4).
Ishida294 and Okabe037 do not explicitly teach an n+-type hydrogenated amorphous silicon (n+a-Si:H) layer.
Kim697 teaches an n+-type hydrogenated amorphous silicon (n+a-Si:H) layer (163/165, [0076-0077]).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the teachings of Ishida294 and Okabe037 with that of Kim697 so that wherein the active layer further comprises an n+-type hydrogenated amorphous silicon (n+a-Si:H) layer for ohmic contact for improved electrical connection.
Allowable Subject Matter
Claims 7 and 11-12 are allowed.
The following is a statement of reasons for the indication of allowable subject matter:
Claim 7 is allowable primarily because the prior arts of record, singly or in combination, neither anticipates nor render obvious the following limitations when taken in combinations with all other limitations:
“…wherein performing the ELA process further comprises determining an optimum energy density (OED) of the first a-Si layer, determining the OED of the first a-Si layer; and adjusting energy density of laser light: the method further comprises: acquiring an image of grains of the annealed layer after performing the ELA process; and in case that an average size of the grains is in a range of 100 nm to 180 nm, determining that energy density of laser light during the ELA process is at the OED; and confirming whether hydrogen explosion occurs during the ELA process; and in case that no hydrogen explosion during the ELA process has occurred is confirmed, determining that the energy density of the laser light is at the OED”.
The depended claims 11-12 are allowed for their dependency to claim 7
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any extension fee pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Mohammed R Alam whose telephone number is 469-295-9205 and can normally be reached between 8:00am-6:00pm (M-F) or by e-mail via Mohammed.Alam1@uspto.gov.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Jacob Choi can be reached on 469-295-9060. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/MOHAMMED R ALAM/Primary Examiner, Art Unit 2897