Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claim(s) 1-6, 9-13, 16-21 and 24-25 is/are rejected under 35 U.S.C. 103 as being unpatentable over Coleman et al., US PGPub 2021/0011647, in view of Sela et al., US PGPub 2021/0357148, further in view of Scholbrock et al., US PGPub 2023/0085040.
With respect to claim 1, Coleman teaches a system, comprising;
memory (par. 37, storage drives 171A-F, which may be flash memory); and
processing circuitry to:
receive a read request from a host (par. 23, the read request from a host system),
determine that data at a first address of the memory associated with the read request is susceptible to a read disturb (par. 25, data susceptible to read disturb is identified as “hot data”);
in response to the determination that the first data at the address associated with the read request is susceptible to a read disturb, cause the data to be relocated (par. 25, relocating the hot data).
Coleman fails to teach the use of write streams. Sela teaches to:
select a write stream selected from a plurality of write streams based on a characteristic of the data (pars. 78-79, assigning data to a write stream for hot data (“Stream A”) or a write stream for cold data (“Stream B”)), and
cause the data to be relocated using the write stream (par. 79, relocating Stream A data from host memory to the appropriate hot location in system memory, and relocating Stream B data from host memory to the appropriate cold location in system memory).
Coleman teaches relocating the data from an address on a first memory to an address on a second memory. Coleman and Sera fail to teach relocating the data from a first address at the memory to a second address of the same memory. Scholbrock teaches:
cause the data to be relocated to a second address of the memory (pars. 251-256 and fig. 4, a triggering event occurs, such as a read count exceeding a threshold, at a first block with a first address, and data is relocated to a second block with a second address, at the same storage device, to mitigate errors such as read disturb).
It would have been obvious to one of ordinary skill in the art, having the teachings of Coleman and Sela before him before the earliest effective filing date, to modify the data relocation system of Coleman with the data relocation system of Sela, in order to store hot data into an area of memory suited to be accessed and/or changed/updated frequently, improving performance, as taught by Sela in par. 77. Further, it would have been obvious, also having the teachings of Scholbrock before him before the earliest effective filing date, to modify the data relocation system of Coleman and Sela with the data relocation system of Scholbrock, as it would be obvious to try. The three references seek to relocate hot data from one location to another. One of ordinary skill in the art has the options of relocating the data to a different memory device, or to a different area of the same memory device. Both solutions would result in moving the hot data away from the hot area, and thus choosing to move to a different area of the same device, as in Scholbrock, is akin to choosing from a finite number of identified, predictable solutions, with a reasonable expectation of success.
With respect to claim 2, Coleman, Sela and Scholbrock teach all limitations of the parent claim. Sela further teaches the system of claim 1, wherein the memory comprises indirect addressing memory (par. 56, the use of a logical-to-physical map to address memory is an example of indirect addressing).
With respect to claim 3, Coleman, Sela and Scholbrock teach all limitations of the parent claims. Sela further teaches the system of claim 2, wherein the memory comprises solid state drive memory (par. 49, the storage is an SSD).
With respect to claim 4, Coleman, Sela and Scholbrock teach all limitations of the parent claims. Sela further teaches the system of claim 2, wherein the memory comprises flash memory (par. 44, the memory is flash).
With respect to claim 5, Coleman, Sela and Scholbrock teach all limitations of the parent claims. Sela further teaches the system of claim 2, wherein the memory comprises Universal Serial Bus drive memory (par. 51 and fig. 2A, the bus used to connect the memory is USB).
With respect to claim 6, Coleman, Sela and Scholbrock teach all limitations of the parent claim. Sela further teaches the system of claim 1, wherein the write stream is selected based on an age of the data (pars. 77-78, where the stream is selected based on whether the data is hot or cold. Scholbrock teaches identifying hot data based on age in par. 50, so the combination of Sela and Scholbrock teaches this).
Claims 9-13 are a method that corresponds to claims 1-6 and are rejected using similar logic.
Claims 16-21 are a non-transitory computer readable medium that corresponds to claims 1-6 and are rejected using similar logic.
With respect to claim 24, Coleman, Sela and Scholbrock teach all limitations of the parent claim. Coleman further teaches the system of claim 1, wherein to determine that data at an address of the memory associated with the read request is susceptible to a read disturb, the processing circuitry is to determine that data at the first address of the memory associated with the read request is susceptible to a read disturb based on a number of read operations performed on the first address of the memory associated with the read request compared to a preset number of read operations performed on a memory address before expecting a read disturb (par. 25, the number of reads are tracked to identify the hot data susceptible to read disturb).
With respect to claim 25, Coleman, Sela and Scholbrock teach all limitations of the parent claim. Scholbrock further teaches the system of claim 1, wherein the processing circuitry is to cause the data to be relocated to a next available physical memory address, of the write stream, corresponding to the second address of the memory (par. 109, which describes the use of indirection to spread files to disparate physical locations).
Claim(s) 1-13, 15-21 and 23-25 is/are rejected under 35 U.S.C. 103 as being unpatentable over Coleman et al., US PGPub 2021/0011647, in view of Sela et al., US PGPub 2021/0357148, further in view of Camp et al., US PGPub 2016/0179678.
With respect to claim 1, Coleman teaches a system, comprising;
memory (par. 37, storage drives 171A-F, which may be flash memory); and
processing circuitry to:
receive a read request from a host (par. 23, the read request from a host system),
determine that data at a first address of the memory associated with the read request is susceptible to a read disturb (par. 25, data susceptible to read disturb is identified as “hot data”);
in response to the determination that the first data at the address associated with the read request is susceptible to a read disturb, cause the data to be relocated (par. 25, relocating the hot data).
Coleman fails to teach the use of write streams. Sela teaches to:
select a write stream selected from a plurality of write streams based on a characteristic of the data (pars. 78-79, assigning data to a write stream for hot data (“Stream A”) or a write stream for cold data (“Stream B”)), and
cause the data to be relocated using the write stream (par. 79, relocating Stream A data from host memory to the appropriate hot location in system memory, and relocating Stream B data from host memory to the appropriate cold location in system memory).
Coleman teaches relocating the data from an address on a first memory to an address on a second memory. Coleman and Sera fail to teach relocating the data from a first address at the memory to a second address of the same memory. Camp teaches:
cause the data to be relocated to a second address of the memory using the write stream (pars. 101-102, using one of the data streams for writing).
It would have been obvious to one of ordinary skill in the art, having the teachings of Coleman and Sela before him before the earliest effective filing date, to modify the data relocation system of Coleman with the data relocation system of Sela, in order to store hot data into an area of memory suited to be accessed and/or changed/updated frequently, improving performance, as taught by Sela in par. 77. Further, it would have been obvious, also having the teachings of Camp before him before the earliest effective filing date, to modify the data relocation system of Coleman and Sela with the data relocation system of Camp, as the heat segregation of Camp results is reduced write amplification, as well as improving the lifetime of a given storage system, as taught by Camp in pars. 50-51.
With respect to claim 2, Coleman, Sela and Camp teach all limitations of the parent claim. Sela further teaches the system of claim 1, wherein the memory comprises indirect addressing memory (par. 56, the use of a logical-to-physical map to address memory is an example of indirect addressing).
With respect to claim 3, Coleman, Sela and Camp teach all limitations of the parent claims. Sela further teaches the system of claim 2, wherein the memory comprises solid state drive memory (par. 49, the storage is an SSD).
With respect to claim 4, Coleman, Sela and Camp teach all limitations of the parent claims. Sela further teaches the system of claim 2, wherein the memory comprises flash memory (par. 44, the memory is flash).
With respect to claim 5, Coleman, Sela and Camp teach all limitations of the parent claims. Sela further teaches the system of claim 2, wherein the memory comprises Universal Serial Bus drive memory (par. 51 and fig. 2A, the bus used to connect the memory is USB).
With respect to claim 6, Coleman, Sela and Camp teach all limitations of the parent claim. Camp further teaches the system of claim 1, wherein the write stream is selected based on an age of the data (par. 102, data for the streams is chosen based on the heat level of the data).
With respect to claim 8, Coleman, Sela and Camp teach all limitations of the parent claim. Camp further teaches the system of claim 1, wherein the plurality of write streams comprises a hot data write stream, a warm data write stream, and a cold data write stream (par. 101, the three unique data streams 702, 704, and 706 having heat values of “cold,” “warm” and “hot,” respectively);
Claims 9-13 and 15 are a method that corresponds to claims 1-6 and 8 and are rejected using similar logic.
Claims 16-21 and 23 are a non-transitory computer readable medium that corresponds to claims 1-6 and 8 and are rejected using similar logic.
With respect to claim 24, Coleman, Sela and Camp teach all limitations of the parent claim. Coleman further teaches the system of claim 1, wherein to determine that data at an address of the memory associated with the read request is susceptible to a read disturb, the processing circuitry is to determine that data at the first address of the memory associated with the read request is susceptible to a read disturb based on a number of read operations performed on the first address of the memory associated with the read request compared to a preset number of read operations performed on a memory address before expecting a read disturb (par. 25, the number of reads are tracked to identify the hot data susceptible to read disturb).
With respect to claim 25, Coleman, Sela and Camp teach all limitations of the parent claim. Camp further teaches the system of claim 1, wherein the processing circuitry is to cause the data to be relocated to a next available physical memory address, of the write stream, corresponding to the second address of the memory (pars. 102-103, valid and fill pointers are used to select the first available address for the stream to write).
Claim(s) 7, 14 and 22 is/are rejected under 35 U.S.C. 103 as being unpatentable over Coleman, Sela and Camp, as applied to claims 1, 9, and 16 above, in view of Zhang, US PGPub 2016/0179386.
With respect to claim 7, Coleman, Sela and Camp teach all limitations of the parent claim, but fail to teach that the relocation is based on an amount of invalid data in the data. Zhang further teaches the system of claim 1, wherein the write stream is selected based on an amount of invalid data in the data (pars. 71, the stream is selected based on the staleness of blocks, the higher staleness blocks having more invalid data).
It would have been obvious to one of ordinary skill in the art, having the teachings of Coleman, Sala, Camp and Zhang before him before the earliest effective filing date, to modify the memory writing system of Coleman, Sela and Camp, with the memory writing system of Zhang, in order to perform garbage correction when there is a high amount of invalid data, which restores system storage capacity, as taught by Zhang in par. 64.
It would have been obvious to one of ordinary skill in the art, having the teachings of Coleman, Sala, Camp and Zhang before him before the earliest effective filing date, to modify the memory writing system of Coleman, Sela and Camp, with the memory writing system of Zhang, in order to have a third stream classified as “warm” as an intermediate case, which allows an improved garbage collection to restore system storage capacity, as taught by Zhang in pars. 63-64.
Claim 14 is a method that corresponds to claims 7-8 and are rejected using similar logic.
Claims 22 is a non-transitory computer readable medium that corresponds to claims 7-8 and are rejected using similar logic.
Claim(s) 7, 14 and 22 is/are rejected under 35 U.S.C. 103 as being unpatentable over Coleman, Sela and Scholbrock, as applied to claims 1, 9, and 16 above, in view of Zhang, US PGPub 2016/0179386.
With respect to claim 7, Coleman, Sela and Scholbrock teach all limitations of the parent claim, but fail to teach that the relocation is based on an amount of invalid data in the data. Zhang further teaches the system of claim 1, wherein the write stream is selected based on an amount of invalid data in the data (pars. 71, the stream is selected based on the staleness of blocks, the higher staleness blocks having more invalid data).
It would have been obvious to one of ordinary skill in the art, having the teachings of Coleman, Sala, Scholbrock and Zhang before him before the earliest effective filing date, to modify the memory writing system of Coleman, Sela and Scholbrock, with the memory writing system of Zhang, in order to perform garbage correction when there is a high amount of invalid data, which restores system storage capacity, as taught by Zhang in par. 64.
It would have been obvious to one of ordinary skill in the art, having the teachings of Coleman, Sala, Scholbrock and Zhang before him before the earliest effective filing date, to modify the memory writing system of Coleman, Sela and Scholbrock, with the memory writing system of Zhang, in order to have a third stream classified as “warm” as an intermediate case, which allows an improved garbage collection to restore system storage capacity, as taught by Zhang in pars. 63-64.
Claim 14 is a method that corresponds to claims 7-8 and are rejected using similar logic.
Claims 22 is a non-transitory computer readable medium that corresponds to claims 7-8 and are rejected using similar logic.
Response to Arguments
Applicant’s arguments, see pre-appeal brief, filed 11/10/2025, with respect to the rejection(s) of claim(s) 8, 15 and 23 under 35 USC 103 have been fully considered and are persuasive. Therefore, the rejection has been withdrawn. However, upon further consideration, a new ground(s) of rejection is made in view of 35 U.S.C. 103 as being unpatentable over Coleman et al., US PGPub 2021/0011647, in view of Sela et al., US PGPub 2021/0357148, further in view of Camp et al., US PGPub 2016/0179678. Zhang is no longer being relied upon to teach “a warm data write stream.”
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Pandurangan, US PGPub 2017/0242625 teaches hot, warm, and cold data streams. Lazo, US PGPub 2017/0371585 teaches data streams for hot data, warm data, and cold data.
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/RYAN DARE/Examiner, Art Unit 2132
/HOSAIN T ALAM/Supervisory Patent Examiner, Art Unit 2132
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