Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
DETAILED ACTION
The action is in response to claims dated 4/26/2023
Claims pending in the case: 1-20
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claim(s) 1-20 rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor, or for pre-AIA the applicant regards as the invention.
Claim(s) 1 in the relevant part read: “receive, at the quantum computing platform, application programming interface (API) information”. APIs as understood as intermediaries, enabling seamless integration between applications, platforms, and devices and API information may be anything related to the API such as endpoints, data stream, speed among other variables. As such, a person of reasonable skill in the art would not be apprised of the metes and bounds of the invention.
For the purpose of examination, the limitation is interpreted as data stream from an API.
Claim(s) 1 in the relevant part read: “convert the API information to a two qubit state”. Based on the claim language, it is unclear what process is being used to convert API information to a two qubit state. Since the conversion depends on the data being received and how the data is being used which is not specified in the limitation, a person of reasonable skill in the art would not be apprised of the metes and bounds of the invention.
For the purpose of examination, the limitation is interpreted as qubit implementation of an algorithm.
All claims dependent on this/these claim(s) are also rejected under 35 U.S.C. 112(b) due to the virtue of their respective direct and indirect dependencies.
Claim(s) 7 in the relevant part read: “process the portion of the API information as an alternative to the quantum computing platform”. Based on the claim language, it is unclear what is being referred to “as an alternative to the quantum computing platform”. Based on the parent claim, the quantum computing platform is being used to only rout the API information. Thus it is not clear which quantum computing platform is being referred to in this limitation and what is the alternative. Thus a person of reasonable skill in the art would not be apprised of the metes and bounds of the invention.
For the purpose of examination, the limitation is interpreted as processing overflow data.
All claims dependent on this/these claim(s) are also rejected under 35 U.S.C. 112(b) due to the virtue of their respective direct and indirect dependencies.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 1-4, 7, 10-12, 16, 19-20 is/are rejected under 35 U.S.C. 103 as being unpatentable over Cella (US 20230176550) in view of Hidary (Quantum Computing: An applied approach).
Regarding Claim 1, Cella teaches, A quantum computing platform comprising: at least one processor; a communication interface communicatively coupled to the at least one processor; and memory storing computer-readable instructions that, when executed by the at least one processor, cause the quantum computing platform to:
receive, at the quantum computing platform, application programming interface (API) information (Cella: [342, 395, 422, 2678-2679]: receive input data based on which model may be run on quantum computing system (input data may be from API));
convert the API information to a … qubit state (Cella: [2671-2672, 26-74-2675]: implement in a quantum device);
apply, to the converted API information, a controlled-not (CNOT) gate, wherein applying the CNOT gate produces a trip wire flag value of zero (0) or one (1) (Cella: [2670-2671]: “computation performed by manipulating qubits with quantum logic gates” (CNOT gate is one of the basic operators in quantum computing); The limitation claims the basic function of CNOT gate which is well known in the art; [2685]: quantum control system for implementing the operations); and
based on identifying a trip wire flag value of…, activate a quantum trip wire, wherein activating the quantum trip wire causes at least a portion of the API information to be routed to an overflow processing system (Cella: [622, 633, 648, 651]: detect system overload (flag); response taken may be switching);
However, Cella does not specifically teach,
a two qubit state; a controlled-not (CNOT) gate, wherein applying the CNOT gate produces a trip wire flag value of zero (0) or one (1);
Hidary teaches a two qubit state; a controlled-not (CNOT) gate, wherein applying the CNOT gate produces a trip wire flag value of zero (0) or one (1) (Hidary: Pg. 34: two qubit states as CNOT gate using input and control signals to output values of zero or one); The examiner finds that It would have been obvious to one skilled in the art that the status flag value may be a binary flag generated by using a CNOT gate.
It would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to combine the teachings of Cella and Hidary because the combination would enable using a CNOT gate in the circuit implementation. One of ordinary skill in the art would have been motivated to combine the teachings because the combination would enable one skilled in the art to use the quantum equivalent of the semiconduction gates in implementing a quantum circuit. The combination enables using knowledge common in the art to implement a function for quantum computing.
Regarding claim 2, Cella and Hidary teach the invention as claimed in claim 1 above and,
wherein the API information comprises a plurality of different information streams (Cella: Fig. 139, [342, 395, 422, 1680]: receive data streams from API), and
wherein activating the quantum trip wire comprises activating, for a single information stream of the plurality of different information streams, the quantum trip wire (Cella: [622, 633, 648, 651]: detect system overload for different sensor data and provide action based on the stream that is overloaded).
Regarding claim 3, Cella and Hidary teach the invention as claimed in claim 1 above and,
wherein the API information comprises one or more of: consumer API data, small business API data, merchant API data, payment API data, or digital services API data (Cella: [342, 2101]: receive data streams from API for a wide range of data types which may be transactional data).
Regarding claim 4, Cella and Hidary teach the invention as claimed in claim 1 above and, wherein converting the API information to the two qubit state comprises:
rotating, around a Z axis and using a quantum gate, a state vector representative of: an incoming trip wire webservice volume corresponding to the API information (Cella: [2671-2672, 26-74-2675]: implement in a quantum device; [2670-2671]: “computation performed by manipulating qubits with quantum logic gates”; [622, 633, 648, 651]: detect system overload (status of incoming volume)) (Hidary: Pg. 27 section “Quantum circuit diagrams”: quantum circuit generated using operators on qubits; Pg. 34: circuit with two qubit states as CNOT gate using input and control signals to output values of zero or one; Pg. 24 [4-5]: qubit states are represented by vectors; rotation by operators or gates; Pg 29: different operators rotates the state vector about an axis – Z operator rotates the state vector about the z axis); and represented by an X axis, and
a trip wire status, indicating whether or not the quantum trip wire has been activated, represented by a Y axis, wherein the Z axis is representative of the trip wire flag value (Hidary: Pg. 38 section 3.5: states represented by the Bloch sphere using XYZ axis); It would have been obvious to one skilled in the art that the signals being used in the circuit will be represented by the Bloch Sphere.
It is further noted that this representation of data in a space is not functionally involved in the steps recited. Thus, this descriptive material will not distinguish the claimed invention from the prior art in terms of patentability.
Regarding claim 7, Cella and Hidary teach the invention as claimed in claim 1 above and,
wherein the overflow processing system is configured to process the portion of the API information as an alternative to the quantum computing platform (Cella: [622, 633, 648, 651]: detect system overload and provide appropriate action).
Regarding Claim(s) 10-12, 16, this/these claim(s) is/are similar in scope as claim(s) 1-3, 7 respectively. Therefore, this/these claim(s) is/are rejected under the same rationale.
Regarding Claim(s) 19-20, this/these claim(s) is/are similar in scope as claim(s) 1-2 respectively. Therefore, this/these claim(s) is/are rejected under the same rationale.
Claim(s) 5, 14 is/are rejected under 35 U.S.C. 103 as being unpatentable over Cella (US 20230176550) and Hidary (Quantum Computing: An applied approach) in view of Pillar (US 6501762).
Regarding claim 5, Cella and Hidary teach the invention as claimed in claim 1 above and, wherein the overflow processing system comprises an processing system, …(Cella: [622, 633, 648, 651]: detect system overload for different sensor data and provide action which may be switching or queuing);
Cella and Hidary do not specifically recite, configured to store the portion of the API information;
Pillar teaches, configured to store the portion of the API information (Pillar: col 6 lines 6-12, col 7 lines 34-38: dataflow management by storing portions of data);
It would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to combine the teachings of Cella, Hidary and Pillar because the combination would enable using a queuing system for efficient data transmission without loss of information.
Regarding Claim(s) 14, this/these claim(s) is/are similar in scope as claim(s) 5 respectively. Therefore, this/these claim(s) is/are rejected under the same rationale.
Claim(s) 6, 8-9, 15, 17-18, is/are rejected under 35 U.S.C. 103 as being unpatentable over Cella (US 20230176550) and Hidary (Quantum Computing: An applied approach) in view of Szeteli (US 20240270564).
Regarding claim 6, Cella and Hidary teach the invention as claimed in claim 5 above and,
wherein the memory stores additional computer readable instructions that, when executed by the at least one processor, cause the quantum computing platform to:
continue monitoring the trip wire flag value; and based on identifying that the trip wire flag value has changed …, redirect the portion of the API information from the overflow processing system to the quantum computing platform (Cella: [2106]: monitor and redirect as per status information (flag));
Hidary further teaches a controlled-not (CNOT) gate, wherein applying the CNOT gate produces flag value of zero (0) or one (1) (Pg. 34: two qubit states with CNOT gate using input and control signals to output values of zero or one);
Although Cella and Hidary do not specifically recite, it would have been obvious to one skilled in the art that the status flag value may be a binary flag by using a CNOT gate.
Nonetheless, Szeteli teaches, flag value has changed to one (1) (Szeteli: [55-56]: binary status signal for fault detection);
It would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to combine the teachings of Cella, Hidary and Szeteli because the combination would enable using a binary signal for fault detection. One of ordinary skill in the art would have been motivated to combine the teachings because the combination would enable one skilled in the art to simplify a detection system by using binary outputs indicating an anomaly as is common in the art.
Regarding claim 8, Cella and Hidary teach the invention as claimed in claim 7 above and,
wherein the memory stores additional computer readable instructions that, when executed by the at least one processor, cause the quantum computing platform to: continue monitoring the trip wire flag value; and based on identifying that the trip wire flag value has changed …, cease redirection of the portion of the API information to the overflow processing system (Cella: [622, 633, 648, 651]: detect system overload status and provide appropriate action which may be switching and redirecting); It would have been obvious to one skilled in the art that a status signal may be binary in nature.
Szeteli further teaches, flag value has changed to one (1) (Szeteli: [55-56]: binary status signal for fault detection);
The same motivation to combine stated above applies.
Regarding claim 9, Cella and Hidary teach the invention as claimed in claim 1 above and,
wherein the memory stores additional computer readable instructions that, when executed by the at least one processor, cause the quantum computing platform to:
based on identifying a value of the status, process the API information, wherein processing the API information comprises processing one or more requests corresponding to the API information (Cella: [622, 633, 648, 651]: detect system overload status and process data accordingly by switching and redirecting).
Szeteli further teaches, status value of one (1) (Szeteli: [55-56]: binary status signal for fault detection);
The same motivation to combine stated above applies.
Regarding Claim(s) 15, 17-18, this/these claim(s) is/are similar in scope as claim(s) 6, 8-9 respectively. Therefore, this/these claim(s) is/are rejected under the same rationale.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure in attached 892.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to MANDRITA BRAHMACHARI whose telephone number is (571)272-9735. The examiner can normally be reached Monday to Friday, 11 am to 8 pm EST.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Tamara Kyle can be reached at 571 272 4241. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/Mandrita Brahmachari/Primary Examiner, Art Unit 2144