Prosecution Insights
Last updated: April 17, 2026
Application No. 18/140,384

OPTICAL LOGIC CIRCUIT DEVICES AND METHODS THEREOF

Final Rejection §103
Filed
Apr 27, 2023
Examiner
PATEL, PREET BAKUL
Art Unit
2874
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
unknown
OA Round
2 (Final)
20%
Grant Probability
At Risk
3-4
OA Rounds
2y 6m
To Grant
-13%
With Interview

Examiner Intelligence

Grants only 20% of cases
20%
Career Allow Rate
1 granted / 5 resolved
-48.0% vs TC avg
Minimal -33% lift
Without
With
+-33.3%
Interview Lift
resolved cases with interview
Typical timeline
2y 6m
Avg Prosecution
28 currently pending
Career history
33
Total Applications
across all art units

Statute-Specific Performance

§103
55.2%
+15.2% vs TC avg
§102
16.8%
-23.2% vs TC avg
§112
28.0%
-12.0% vs TC avg
Black line = Tech Center average estimate • Based on career data from 5 resolved cases

Office Action

§103
Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Response to Amendment Applicant’s amendments filed on December 10th, 2025 have been full considered and entered by the examiner. The rejection to claims 1-20 under 35 USC 112 have been withdrawn in light of applicant’s amendment. The rejections to claims 1, 10, 12-17 under 35 USC 102 have been withdrawn in light of applicant’s amendment, but incorporated into a new rejection under 35 USC 103 and new grounds necessitated by that amendment. Response to Arguments Applicant's arguments filed December 10 have been fully considered and entered, and they are not fully persuasive. Applicant argues that the rejections of 1, 10, and 12-17 under 35 USC 102 require geometry that goes beyond what is disclosed in He et al. The examiner acknowledges this discrepancy. In view of applicant’s amendment elucidating this matter, the 102 rejection is withdrawn. However, applicant’s amendment necessitates a new ground of rejection under 35 USC 103, as set forth in the rejections below. Applicant argues (Remarks, pp. 5-8) that He et al. and Feng et al. operate on incompatible physical principles and that their combination cannot produce the claimed invention. Specifically, applicant contends that He et al. uses a valley-Hall photonic crystal slab relying on Bragg scattering with broken inversion symmetry, while Feng et al. concerns PT-symmetric optical lattices with balanced gain and loss, and that the present invention instead uses a passive, reciprocal symmetric ring resonator lattice generating synthetic magnetic flux through controlled phase accumulation. Applicant arguments are not persuasive. The examiner respectfully disagrees. Under the 103 analyses, the test for obviousness is not whether the features of a secondary reference may be bodily incorporated into the structure of the primary reference, nor is it that the claimed invention must be expressly suggested in any one or all of the references. Rather, the test is what the combined teachings of the references would have suggested to those of ordinary skill in the art. The examiner does not propose grafting of He et al.’s valley-Hall physics onto Feng et al.’s gain/loss architecture. Rather, He et al. is relied upon for teaching an optical logic circuit device that functions as a topologically protected beam splitter/logic gate with input ports, an output port, and waveguide arrangements supporting topologically protected edge states. Feng et al. is relied upon for teaching a symmetric arrangement of waveguides comprising a plurality of site rings and a plurality of link rings separated by a gap – a coupled ring resonator lattice architecture. The specific physical mechanism by which topological protection is achieved in the primary reference is not essential to the 103 combinations; what matters is that a skilled artisan recognizes the functional requirements (topological logic gates using waveguide arrangements with topologically protected edge states), and how to implement them on multiple photonic platforms, including coupled ring resonator lattices. Mittal et al. (2016, newly cited and incorporated) confirms that passive silicon ring resonator lattices with uniform coupling parameters support topologically protected edge states with robust, disorder-tolerant signal transport, without magnetooptic materials, temporal modulation, or gain/loss engineering, and while demonstrating the feasibility and motivation for using such a platform to implement the topological logic gate of He et al. Applicant argues that neither He et al. nor Feng et al. teaches robust, disorder-tolerant transport without magneto-optics, temporal modulation, or gain/loss engineering. Examiner states that as these requirements are not commensurate with the scope of the claims, this argument is not persuasive. In response to applicant's argument that the references fail to show certain features of the invention, it is noted that the features upon which applicant relies (i.e., disorder-tolerant transport without magneto-optics, temporal modulation, or gain/loss engineering) are not recited in the rejected claim(s). Although the claims are interpreted in light of the specification, limitations from the specification are not read into the claims. See In re Van Geuns, 988 F.2d 1181, 26 USPQ2d 1057 (Fed. Cir. 1993). Applicant argues that the remaining claims (2-9, 11, and 18-20) depend on the aforementioned claims, and are allowable for the reasons argued. Examiner states that as the rejections of the base claims are maintained (in modified form), these arguments are not persuasive. Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim(s) 1, 10, and 12-17 is/are rejected under 35 U.S.C. 103 as being unpatentable over He et al. (2020, Optics Express, “Topologically protected beam splitters and logic gates based on two-dimensional silicon photonic crystal slabs”) in view of Mittal et al. (2016, Nature Photonics, “Measurement of topological invariants in a 2D photonic system”). Regarding claim 1; He et al. (2020) discloses an optical logic circuit device (Title and Abstract, “Topologically protected photonic logic gates based on two-dimensional silicon photonic crystal slabs”) comprising; A first input port and a second input port (Figure 3a, 3g depict this explicitly); A symmetric arrangement of waveguides (Figure 2a depicts the device being a symmetric 2-D photonic crystal slab, a lattice of waveguides) coupled to the first input port and the second input port (Figures 3a, 3d-f, and 3g depict the input ports, as well as how they couple to the waveguide array/lattice which propagates the signal forwards), the symmetric arrangement of waveguides having a pair of topologically protected edge states that provide propagation paths through the symmetric arrangement of waveguides (page 3, “by using the ABC-type edge state, we propose the [band structure], whose schematic diagram is shown in Figure 2(a)”), and an output port (Figure 3a, 3d-f, 3g, show the output port as well). He et al. does not disclose that the symmetric arrangement is one comprising matched coupling gaps and optical path lengths as claimed. Mittal et al. (2016) teaches a 2D lattice of coupled ring resonators (Figure 1b, 1c) implementing a topological photonic system with topologically protected edge states (Figure 2, caption). Specifically, Mittal teaches that the coupling gap between ring waveguides is uniformly 140 nm across the lattice, the ring waveguides are uniformly 510 nm wide, and the site ring resonators have uniform perimeters of 70 microns (Section 3, Supplementary information). These features constitute ‘matched coupling gaps and optical path lengths’, supporting topologically protected edge states with winding numbers of +/- 1 (Figure 2, caption). Before the effective filing date of the claimed invention, one of ordinary skill in the art would have found it obvious to modify the invention described in He et al. under the teachings of Mittal et al. to implement the symmetric waveguide arrangement with matched coupling gaps and optical path lengths as taught in Mittal et al; Mittal demonstrates that a ring resonator lattice with uniform, matched coupling parameters successfully supports topologically protected edge states with robust, disorder-tolerant transport in a passive silicon photonic platform. This makes the configuration a known design approach requiring routine design oversight from a skilled artisan, and predictably results in a device which predictably supports topologically protected edge states and thus reliably carries optical signal for use in optical logical circuits with minimal loss. Regarding claim 10; He et al. in view of Mittal et al. discloses the device of claim 1. He et al. discloses an optical computing device comprising a plurality of the optical logic circuit devices of claim 1 (1. Introduction, paragraph 3: “All major logic gates, including OR, NOT, AND, XOR, XNOR, NAND, and NOR gates…”). Regarding claim 12; He et al. in view of Mittal et al. discloses the device of claim 1. He et al. discloses a method of operating the device of claim 1, the method comprising: Selectively providing excitation energy to the first input port and the second input port, wherein the symmetric arrange of waveguides transmit light through the propagation paths to the output port only when the excitation energy is applied to either the first input port of the second input port (Figure 3e shows the OR gate as described, where the output maps to input 1 or input 2, but not both). Regarding claim 13; He et al. in view of Mittal et al. discloses the device of claim 12, further comprising: Providing the excitation energy simultaneously to the first input port and the second input port at a phase difference to alter light transmitted in the output port (Figure 3e shows precisely this – light in input 1 and input 2 are separated by a phase of π, which would alter the light transmitted in the output port when compared to not having a phase separation). Regarding claim 14; He et al. in view of Mittal et al. discloses the method of claim 13, wherein: He et al. discloses that the phase difference is π such that no light is transmitted into the output port (Table 1, Row 1 depicts a phase difference of π with no output). Regarding claim 15; He et al. in view of Mittal et al. discloses the method of claim 13, wherein: He et al. discloses that the phase difference is 0 such that light is transmitted into the output port (Table 1, Rows 2 and 3 depict a phase difference of 0 with output). Regarding claim 16; He et al. in view of Mittal et al. discloses the method of claim 13, wherein: He et al discloses that the optical gate device provides one of an OR gate, an XOR gate, or an AND gate (Figure 3 shows how one of the XOR or OR gate is constructed when selecting a phase difference). Regarding claim 17; He et al. discloses a method of forming an optical logic gate (Sec. 3, Paragraph 1, Line 1, “we construct the all-optical logic gates by using the 50:50 BSs…”), comprising: Providing a first input port and a second input port (Figure 3a shows this explicitly), Coupling a symmetric arrangement of waveguides to the first input port and the second input port (Figures 3a, 3d-3f depict the arrangement of waveguides being a symmetric 2-D photonic crystal slab, a lattice of waveguides, coupled to the input ports) The symmetric arrangement of waveguides having a pair of topologically protected edge states that provide propagation paths through the symmetric arrangement of waveguides, and (page 3, “by using the ABC-type edge state, we propose the [band structure] …”, and Figures 3d-3f showing how the waveguides provide propagation paths), Coupling an output port to the symmetric arrangement of waveguides (Figure 3a shows this explicitly) He et al. does not disclose that the symmetric arrangement is one comprising matched coupling gaps and optical path lengths as claimed. Mittal et al. (2016) teaches a 2D lattice of coupled ring resonators (Figure 1b, 1c) implementing a topological photonic system with topologically protected edge states (Figure 2, caption). Specifically, Mittal teaches that the coupling gap between ring waveguides is uniformly 140 nm across the lattice, the ring waveguides are uniformly 510 nm wide, and the site ring resonators have uniform perimeters of 70 microns (Section 3, Supplementary information). These features constitute ‘matched coupling gaps and optical path lengths’, supporting topologically protected edge states with winding numbers of +/- 1 (Figure 2, caption). Before the effective filing date of the claimed invention, one of ordinary skill in the art would have found it obvious to modify the invention described in He et al. under the teachings of Mittal et al. to implement the symmetric waveguide arrangement with matched coupling gaps and optical path lengths as taught in Mittal et al; Mittal demonstrates that a ring resonator lattice with uniform, matched coupling parameters successfully supports topologically protected edge states with robust, disorder-tolerant transport in a passive silicon photonic platform. This makes the configuration a known design approach requiring routine design oversight from a skilled artisan, and predictably results in a device which predictably supports topologically protected edge states and thus reliably carries optical signal for use in optical logical circuits with minimal loss. Claim(s) 2-5, 7, 9, 11, 18, and 19 is/are rejected under 35 U.S.C. 103 as being unpatentable over He et al. (2020, Optics Express, “Topologically protected beam splitters and logic gates based on two-dimensional silicon photonic crystal slabs”) in view of Mittal et al. (2016, Nature Photonics, “Measurement of topological invariants in a 2D photonic system”), and further in view of Feng et al. (US 20220357631 A1). Regarding claim 2; He et al. in view of Mittal et al. discloses the device of claim 1. He et al. does not disclose that a symmetric arrangement of waveguides comprises a plurality of site rings and a plurality of link rings separated by a separation gap. Feng et al. discloses an optical circuit device comprising a symmetric arrangement of waveguides (Figure 1, photonic lattice 102 is made up of a plurality of site rings 106) coupling to an input and output port (Figure 2, input light port 206, any site ring can be an output port, in light of paragraph 34 of the specification), wherein: The symmetric arrangement of waveguides comprises a plurality of site rings and a plurality of link rings separated by a separation gap (Figure 2, Panel with the label “400 nm” depicts the closest zoom-in, and link ring 410 has a separation gap between adjacent rings). Before the effective filing date of the claimed invention, one of ordinary skill in the art would have found it obvious to modify the invention of claim 1 to include a symmetric arrangement of waveguides which comprise a plurality of link rings separated by a separation gap, as disclosed in Feng et al. This could be accomplished using methods known to the art (I.e. electron beam lithography, as disclosed in paragraph 41), and would predictably allow for one to control the coupling efficiency between adjacent waveguides. Regarding claim 3; He et al. in view of Mittal et al., and further in view of Feng et al. discloses the device of claim 2, wherein; He does not teach the link rings as claimed. Feng et al. discloses that the plurality of link rings that are separated by the separation gap are configured to be evanescently coupled (Figure 4 shows that there is a separation between the link rings, which means that the waveguide must necessarily operate on the evanescent field permitting the transmission of a signal, therefore, the link rings are configured to be evanescently coupled). Before the effective filing date of the claimed invention, one of ordinary skill in the art would have found it obvious to modify the link ring array in the device of claim 2 to configure the link rings to be evanescently coupled. Evanescent coupling is well understood in the art and a natural consequence propagating light through adjacent waveguides, and could be accomplished using methods known to the art (routine placement or machining of link ring resonators and device components), and would predictably result in a link-ring array which is configured to propagate signals without exposing them to the external environment and losing signal integrity. Regarding claim 4; He et al. in view in view of Mittal et al., and further in view of Feng et al. discloses the device of claim 2, wherein; Feng et al. discloses that the plurality of site rings and link rings are arrange in a lattice structure (Figure 2 depicts the plurality of rings being in a lattice structure). Before the effective filing date of the claimed invention, one of ordinary skill in the art would have found it obvious to design the device of claim 2 to have site/link rings arranged in a lattice structure. This may be accomplished exercising routine design judgment and techniques known to the art (lithography, etching), and would predictably result in a symmetric and homogenous device which operates consistently across the device. Regarding claim 5; He et al. in view of in view of Mittal et al., and further in view of Feng et al. discloses the device of claim 2, wherein; Feng et al. discloses that the plurality of site rings and the plurality of link rings are surrounded by a dielectric medium (Figure 8 depicts Si3N4 layer 810 surrounding the waveguides - Si3N4 is a known to the art for its dielectric properties). Before the effective filing date of the claimed invention, one of ordinary skill in the art would have found it obvious to configure the device of claim 2 to have the plurality of site rings and link rings be surrounded by a dielectric medium, as taught in Feng et al. This could be accomplished using methods known to the art (Paragraph 48 discloses that this may be accomplished using deposition), and would predictably result in an array of waveguides which are electrically insulated from the surrounding environment, permitting a much more efficient propagation of signals through the device. Regarding claim 7; He et al. in view of Mittal et al., and further in view of Feng et al. discloses the device of claim 2, wherein; Feng et al. discloses that the plurality of site rings and the plurality of link rings are rectangular shaped with rounded corners (Figure 2, the rings are annular rectangles). Before the effective filing date of the claimed invention, one of ordinary skill in the art would have found it obvious to modify the invention of claim 2 to have link and site rings which are rectangular shapes with rounded corners, under the teachings of Feng et al. This could be accomplished using methods known to the art, and would predictably result in a device where signals are efficiently transmitted with reduced backscattering and related interference/losses. Regarding claim 9; He et al. in view of Mittal et al., and further in view of Feng et al. discloses the device of claim 2. Feng et al. further discloses that the site rings have a resonant condition (paragraph 32, “…the topological lattice includes coupled microring resonators…”, and a resonator will necessarily have a resonant condition), and the link rings are anti-resonant (Abstract, “…anti-resonant link rings…”). Before the effective filing date of the claimed invention, one of ordinary skill in the art would have found it obvious to design the site and link rings in the device of claim 2 to have link rings with a resonant condition and site rings which are anti-resonant. This could be accomplished using routine design oversight when fabricating the link and site rings, and would predictably result in an alternating lattice where the anti-resonant link rings which support topological edge states, do not introduce delay/loss, and which provide tuning flexibility due to the relationship between gap dimension and coupling efficiency. Regarding claim 11; He et al. in view of Mittal et al. discloses the device of claim 10. He et al. does not disclose that a symmetric arrangement of waveguides comprises a plurality of site rings and a plurality of link rings separated by a separation gap. Feng et al. discloses an optical circuit device comprising a symmetric arrangement of waveguides (Figure 1, photonic lattice 102 is made up of a plurality of site rings 106) coupling to an input and output port (Figure 2, input light port 206, any site ring can be an output port, in light of paragraph 34 of the specification), wherein: The symmetric arrangement of waveguides comprises a plurality of site rings and a plurality of link rings separated by a separation gap (Figure 2, Panel with the label “400 nm” depicts the closest zoom-in, and link ring 410 has a separation gap between adjacent rings). Before the effective filing date of the claimed invention, one of ordinary skill in the art would have found it obvious to modify the invention of claim 10 to include a symmetric arrangement of waveguides which comprise a plurality of link rings separated by a separation gap, as disclosed in Feng et al. This could be accomplished using methods known to the art (I.e. electron beam lithography, as disclosed in paragraph 41), and would predictably allow for one to control the coupling efficiency between adjacent waveguides. Regarding claim 18; He et al. in view of Mittal et al. discloses the method of claim 17. He et al. does not disclose that a symmetric arrangement of waveguides comprises a plurality of site rings and a plurality of link rings separated by a separation gap. Feng et al. discloses an optical circuit device comprising a symmetric arrangement of waveguides (Figure 1, photonic lattice 102 is made up of a plurality of site rings 106) coupling to an input and output port (Figure 2, input light port 206, any site ring can be an output port, in light of paragraph 34 of the specification), wherein: The symmetric arrangement of waveguides for each of the optical logic circuit devices comprises a plurality of site rings and a plurality of link rings separated by a separation gap (Figure 2, Panel with the label “400 nm” depicts the closest zoom-in, and link ring 410 has a separation gap between adjacent rings). Before the effective filing date of the claimed invention, one of ordinary skill in the art would have found it obvious to modify the invention of claim 18 to include a symmetric arrangement of waveguides which comprise a plurality of link rings separated by a separation gap, as disclosed in Feng et al. This could be accomplished using methods known to the art (I.e. electron beam lithography, as disclosed in paragraph 41), and would predictably allow for one to control the coupling efficiency between adjacent waveguides. Regarding claim 19; He et al. in view of Mittal et al., and further in view of Feng et al. discloses the method of claim 18. Feng et al. further discloses that the plurality of site rings and the plurality of link rings are formed using electron beam lithography (paragraph 48, “…the photonic topological lattice can be fabricated using electron-beam lithography…”. Before the effective filing date of the claimed invention, one of ordinary skill in the art would have found it obvious to realize modify the method of claim 18 under the teachings of Feng et al. to form the site and link rings using electron-beam lithography. This could be accomplished using tools and materials known to the art, and would predictably result in a method which operates well at high resolution (nanometer scales), with arbitrary patterning/shapes, and high accuracy. Claim(s) 6, 8, and 20 is/are rejected under 35 U.S.C. 103 as being unpatentable over He et al. (2020, Optics Express, “Topologically protected beam splitters and logic gates based on two-dimensional silicon photonic crystal slabs”) in view of Mittal et al. (2016, Nature Photonics, “Measurement of topological invariants in a 2D photonic system”), and further in view of Feng et al. (US 20220357631 A1) and Hafezi (2012; US 20120308181 A1). Regarding claim 6; He et al. in view of Mittal et al., and further in view of Feng et al. discloses the device of claim 2. Feng et al. discloses that the separation gap between resonators is in view of the ring-to-ring separation (Paragraph 37, t is the coupling between two rings “controlled by the ring-to-ring separation”, which can either be modified by placing the rings closer together; if one wants to maintain the symmetry described in claim 1, this is accomplished by changing the sizes of all ring resonators). Hafezi et al. discloses a 2-D, evanescently coupled microring array with a separation gap between resonators (Figure 2 shows this), wherein the coupling strength is in view of the frequency (paragraph 75). Before the effective filing date of the claimed invention, one of ordinary skill in the art would have found it obvious to create the device of claim 2 under the teachings of Hafezi et al.; the separation gap between rings would be dependent on the size of the rings as well as the propagation wavelength. Feng et al. teaches that the ring-to-ring separation controls the coupling strength. Because symmetry must be maintained, the best way to range ring-to-ring separation is by changing the sizes of all rings proportionally about their centers. This means that the size of the rings is a component in determining their separation gap. Hafezi et al. teaches that the frequency of the incoming light is also related to coupling strength for a given resonator setup. A person having ordinary skill in the art knows the trivial relationship between wavelength and frequency, and thus the separation gap, which is related to the coupling strength, is also related to the wavelength. One of ordinary skill in the art knows that the evanescent coupling is dependent on the amount of media the evanescent field must travel through, as well as the phase/wavelength of the photon traveling through the medium. Feng and Hafezi make the connection obvious, and thus the inclusion of this oversight would predictably result in a device which optimally couples propagating modes of light with further site rings downstream, enabling the optical logic gates and performance of the system. Regarding claim 8; He et al. in view of Mittal et al., and further in view of Feng et al. discloses the device of claim 2. Neither reference explicitly discloses that the plurality of site rings and the plurality of link rings are formed from TiO2 or silicon). Hafezi et al. discloses a 2-D, evanescently coupled microring array (Figure 2), wherein the microring resonators are composed of silicon (paragraph 6, “…resonators in the form of silicon…”). The choice of high-index, low-loss dielectrics like silicon and TiO2 are a routine design consideration when forming resonators, waveguides, and many other components in integrated photonics. Before the effective filing date of the claimed invention, one of ordinary skill in the art would have found it obvious to modify the invention of claim 2 to use silicon as the resonator material, as indicated by Hafezi et al. This could be accomplished using methods known to the art, as silicon is a well-established material in photonics, and would predictably be a plentiful material with well-known characteristics and a large body of methods for operating with the material in industrial settings. Regarding claim 20; He et al. in view of Mittal et al., and further in view of Feng et al. discloses the device of claim 19. Neither reference explicitly discloses that the plurality of site rings and the plurality of link rings are formed from TiO2 or silicon). Hafezi et al. discloses a 2-D, evanescently coupled microring array (Figure 2), wherein the microring resonators (analogous to the link/site rings) are composed of silicon (paragraph 6, “…resonators in the form of silicon…”). The choice of high-index, low-loss dielectrics like silicon and TiO2 are a routine design consideration when forming resonators, waveguides, and many other components in integrated photonics. Before the effective filing date of the claimed invention, one of ordinary skill in the art would have found it obvious to modify the invention of claim 19 to use silicon as the resonator material, as indicated by Hafezi et al. This could be accomplished using methods known to the art, as silicon is a well-established material in photonics, and would predictably be a plentiful material with well-known characteristics and a large body of methods for operating with the material in industrial settings. Conclusion THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to PREET B PATEL whose telephone number is (571)272-2579. The examiner can normally be reached Mon-Thu: 8:30 am - 6:30 pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, THOMAS A HOLLWEG can be reached at 571-270-1739. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /PREET B PATEL/Examiner, Art Unit 2874 /THOMAS A HOLLWEG/Supervisory Patent Examiner, Art Unit 2874
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Prosecution Timeline

Apr 27, 2023
Application Filed
Aug 29, 2025
Non-Final Rejection — §103
Dec 10, 2025
Response Filed
Mar 04, 2026
Final Rejection — §103 (current)

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Prosecution Projections

3-4
Expected OA Rounds
20%
Grant Probability
-13%
With Interview (-33.3%)
2y 6m
Median Time to Grant
Moderate
PTA Risk
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