CTNF 18/140,481 CTNF 77727 DETAILED ACTION Notice of Pre-AIA or AIA Status 07-03-aia AIA 15-10-aia The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA. Claim Rejections - 35 USC § 102 07-06 AIA 15-10-15 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. 07-07-aia AIA 07-07 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – 07-08-aia AIA (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. 07-15 AIA Claim s 1 and 17 are rejected under 35 U.S.C. 102( a)(1 ) as being anticipated by Narayanan et al. (USP 10,103,626) . For claim 1, Figure 1 of Narayanan et al. teaches a device (100) comprising: a first switched circuit path (101) between a first input terminal (VDD_AUX) and an output terminal (120); a second switched circuit path (102) between a second input terminal (VDD_DOM) and the output terminal (120); and a first driver circuit (132) and a second driver circuit (134) which are arranged in a cross-coupled configuration with the first switched circuit path (101) and the second switched circuit path (102), wherein the second driver circuit (134) is to control the second switched circuit path (102) based on a first control signal (En_2), and wherein the first driver circuit (132) is to control the first switched circuit path (101) based on a second control signal (En_1). For claim 17, Figure 1 of Narayanan et al. teaches a method at a power multiplexer (100), the method comprising: receiving a first supply voltage (VDD_AUX) and a second supply voltage (VDD_DOM) at a first input terminal (VDD_AUX) and a second input terminal (VDD_DOM), respectively, wherein a first switched circuit path (101) is between the first input terminal (VDD_AUX) and an output terminal (120), wherein a second switched circuit path (102) between the second input terminal (VDD_DOM) and the output terminal (102), and wherein a first driver circuit (132) and a second driver circuit (134) are arranged in a cross-coupled configuration with the first switched circuit path (101) and the second switched circuit path (102); with the second driver circuit (134), controlling the second switched circuit path (102) based on a first control signal (En_2); and with the first driver circuit (132), controlling the first switched circuit path (102) based on a second control signal (En_2) . 07-15 AIA Claim s 1 and 17 are also rejected under 35 U.S.C. 102( a)(1 ) as being anticipated by Huang (US 2017/0077920) . For claim 1, Figure 2 of Huang teaches a device (200) comprising: a first switched circuit path (M1-M2) between a first input terminal (SIG IN1 ) and an output terminal (OUT); a second switched circuit path (M3-M4) between a second input terminal (SIG IN3 ) and the output terminal (OUT); and a first driver circuit (112) and a second driver circuit (114) which are arranged in a cross-coupled configuration with the first switched circuit path (M1-M2) and the second switched circuit path (M3-M4), wherein the second driver circuit (114) is to control the second switched circuit path (M3-M4) based on a first control signal (ENB), and wherein the first driver circuit (112) is to control the first switched circuit path (M1-M2) based on a second control signal (ENA). For claim 17, Figure 2 of Huang teaches a method at a power multiplexer (200), the method comprising: receiving a first supply voltage (SIG IN1 ) and a second supply voltage (SIG IN3 ) at a first input terminal (SIG IN1 ) and a second input terminal (SIG IN3 ), respectively, wherein a first switched circuit path (M1-M2) is between the first input terminal (SIG IN1 ) and an output terminal (OUT), wherein a second switched circuit path (M3-M4) between the second input terminal (SIG IN3 ) and the output terminal (OUT), and wherein a first driver circuit (112) and a second driver circuit (114) are arranged in a cross-coupled configuration with the first switched circuit path (M1-M2) and the second switched circuit path (M3-M4); with the second driver circuit (114), controlling the second switched circuit path (M3-M4) based on a first control signal (ENB); and with the first driver circuit (112), controlling the first switched circuit path (M1-M2) based on a second control signal (ENA) . Allowable Subject Matter 12-151-08 AIA 07-43 12-51-08 Claim s 2-11 and 18-20 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. 12-151-07 AIA 07-97 12-51-07 Claim s 12-16 are allowed. Claim 12 is allowed because the closet arts of record (Figure 1 of Narayanan et al., USP 10,103,626) and (Figure 2 of Huang, US 2017/0077920) each teaches a power multiplexer (as discussed in the rejections of claims 1 and 17 above) fails to teach the limitations “first circuitry to generate a first control signal based on a first selection signal, wherein the first circuitry is coupled to control the first switched circuit path based on the first control signal, and further to provide the first control signal to the second driver circuit; and second circuitry to generate a second control signal based on a second selection signal, wherein the second circuitry is coupled to control the second switched circuit path based on the second control signal, and further to provide the second control signal to the first driver circuit” in combination with other limitations as recited in the claim. Claims 13-16 are allowed because they depend on claim 12. Conclusion 07-101 Any inquiry concerning this communication or earlier communications from the examiner should be directly to Examiner Long Nguyen whose telephone number is (571) 272-1753. The Examiner can normally be reached on Monday to Friday from 8:30am to 5:00pm. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Regis Betsch, can be reached at (571) 270-7101. The fax number for this group is (571) 273-8300. Information regarding the status of an application may be obtained from the Patent Application Information Retrieval (PAIR) system. Status information for published applications may be obtained from either Private PAIR or Public PAIR. Status information for unpublished applications is available through Private PAIR only. For more information about the PAIR system, see http://pair-direct.uspto.gov. Should you have questions on access to the Private PAIR system, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. /Long Nguyen/ Primary Examiner Art Unit 2836 Application/Control Number: 18/140,481 Page 2 Art Unit: 2836 Application/Control Number: 18/140,481 Page 3 Art Unit: 2836 Application/Control Number: 18/140,481 Page 4 Art Unit: 2836 Application/Control Number: 18/140,481 Page 5 Art Unit: 2836
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