DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Priority
Foreign priority is not claimed for this application.
Information Disclosure Statement
The information disclosure statement (IDS) submitted on 05/02/2023 is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner.
Drawings
The drawings are objected to as failing to comply with 37 CFR 1.84(p)(4) because reference character “118” has been used to designate both the output impedance matching network and the second inductor in fig. 7. Paragraph 57 states that the first inductor #104 and the second inductor #108 are implemented in a loop form. However, it appears that fig. 7 incorrectly labels the second inductor as #118 instead of #108. The drawings are objected to as failing to comply with 37 CFR 1.84(p)(5) because they do not include the following reference sign(s) mentioned in the description: Par. 57-59 refer to #150, however there is no #150 in fig. 7 and 8. Corrected drawing sheets in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance.
Claim Objections
Claim 16 is objected to because of the following informalities:
Claim 16 would be better worded as: “wherein the receiver is configured to output an amplified received analog signal via the second impedance matching network, based on an analog signal received from the one or more antennas.” The original wording makes it seem as if the analog signal is being received from the second impedance matching network.
Appropriate correction is required.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 1-5, 10-13, 15-17 is/are rejected under 35 U.S.C. 103 as being unpatentable over US 6414547 by Shkap.
Regarding claim 1, Shkap teaches an amplifier comprising:
a first transistor (Fig. 1 #1) having a gate (While Shkap uses bipolar transistors, it is known in the art that different types of transistors such as FETs can also be used; FETs can be manufactured to be smaller which makes them more efficient in the design of the circuit and saves space (BJT vs FET (Transistors) “Learning about Electronics”)) coupled to an input impedance matching circuit, a drain coupled to an output impedance matching circuit (Fig. 1 #15), and a source coupled to a tunable resistor (Fig. 1 #3, 4, 5, Col. 3 lines 2-5) and a first inductor (Fig. 1 #13); and
a second transistor (Fig. 1 #2) having a gate coupled to the input impedance matching circuit, a drain coupled to the output impedance matching circuit (Fig. 1 #15), and a source coupled to the tunable resistor (Fig. 1 #3, 4, 5, Col. 3 lines 2-5) and a second inductor (Fig. 1 #14).
Shkap doesn’t teach an input matching circuit connected to the gates of the transistors; however, input matching networks are very commonly used in the art to improve power transfer (as shown in US 20220021353 by Han et al. Fig. 9 #T1).
Regarding claim 2, Shkap teaches the amplifier of claim 1, wherein the tunable resistor is configured to receive one or more control signals indicative of a resistance value, from one or more processors (Fig. 1 #7, 8, 23 vary the resistance and gain; Col. 4 line 12-29).
Regarding claim 3, Shkap teaches the amplifier of claim 2, wherein the tunable resistor is configured to provide an electrical resistance corresponding to the resistance value (Col. 3 lines 2-5).
Regarding claim 4, Shkap teaches the amplifier of claim 1, wherein the tunable resistor is configured to provide an electrical resistance below a first resistance threshold associated with an increased gain of the amplifier for generating amplified signals and above a second resistance threshold associated with a reduced gain of the amplifier for generating the amplified signals (Fig. 1 the gain is controlled by the resistance of the amplifier Col. 2 lines 28-30 so by increasing resistance, gain decreases and by decreasing resistance, gain increases. By controlling the transistors #3, 4, 5 (switching their operation modes) resistance varies).
Regarding claim 5, Shkap teaches the amplifier of claim 1, wherein the tunable resistor comprises an array of transistors adjustable to provide a desired electrical resistance (Fig. 1 #3, 4, 5).
Regarding claim 10, Shkap teaches an electronic device comprising:
one or more antennas (Shkap teaches an RF communication system and it is obvious and known in the art that these types of communication systems use antennas);
a transmitter (Col. 4 line 40) coupled to the one or more antennas (Not explicitly stated but it’s obvious and well known in the art that a transmitter is connected to an antenna) and comprising
a first transistor (Fig. 1 #1) having a gate (While Shkap uses bipolar transistors, it is known in the art that different types of transistors such as FETs can also be used; FETs can be manufactured to be smaller which makes them more efficient in the design of the circuit and saves space (BJT vs FET (Transistors) “Learning about Electronics”)) coupled to an input impedance matching circuit, a drain coupled to an output impedance matching circuit (Fig. 1 #15), and a source coupled to a tunable resistor (Fig. 1 #3, 4, 5, Col. 3 lines 2-5) and a first inductor (Fig. 1 #13); and
a second transistor (Fig. 1 #2) having a gate coupled to the input impedance matching circuit, a drain coupled to the output impedance matching circuit (Fig. 1 #15), and a source coupled to the tunable resistor (Fig. 1 #3, 4, 5, Col. 3 lines 2-5) and a second inductor (Fig. 1 #14); and
a power source (Fig. 1 #25) coupled to the first drain and the second drain.
Shkap doesn’t teach an input matching circuit connected to the gates of the transistors; however, input matching networks are very commonly used in the art to improve power transfer (as shown in US 20220021353 by Han et al. Fig. 9 #T1).
Regarding claim 11, Shkap teaches the electronic device of claim 10, wherein the transmitter (Col. 4 line 40) is configured to output an amplified signal for transmission by the one or more antennas (Shkap teaches an RF communication system and it is obvious and known in the art that these types of communication systems use antennas) via the second impedance matching circuit (Fig. 1 #15) based on an input signal (Fig. 1 #19, 20).
Regarding claim 12, Shkap teaches the electronic device of claim 10, wherein the tunable resistor is configured to provide an electrical resistance with a resistance value (Col. 3 lines 2-5) based on one or more control signals from a processor of the electronic device, the one or more control signals being indicative of a resistance value (Fig. 1 #7, 8, 23 vary the resistance and gain; Col. 4 line 12-29).
Regarding claim 13, Shkap teaches the electronic device of claim 12, wherein the tunable resistor comprises an array of transistors adjustable to provide the electrical resistance with the resistance value (Fig. 1 #3, 4, 5).
Regarding claim 15, Shkap teaches an electronic device comprising:
one or more antennas (Shkap teaches an RF communication system and it is obvious and known in the art that these types of communication systems use antennas);
a receiver coupled to the one or more antennas (Col. 1 lines 15-19 “transceiver chain”), the receiver comprising
a first transistor (Fig. 1 #1) having a gate (While Shkap uses bipolar transistors, it is known in the art that different types of transistors such as FETs can also be used; FETs can be manufactured to be smaller which makes them more efficient in the design of the circuit and saves space (BJT vs FET (Transistors) “Learning about Electronics”)) coupled to an input impedance matching circuit, a drain coupled to an output impedance matching circuit (Fig. 1 #15), and a source coupled to a tunable resistor (Fig. 1 #3, 4, 5, Col. 3 lines 2-5) and a first inductor (Fig. 1 #13); and
a second transistor (Fig. 1 #2) having a gate coupled to the input impedance matching circuit, a drain coupled to the output impedance matching circuit (Fig. 1 #15), and a source coupled to the tunable resistor (Fig. 1 #3, 4, 5, Col. 3 lines 2-5) and a second inductor (Fig. 1 #14); and
a power source (Fig. 1 #25) coupled to the first drain and the second drain.
Shkap doesn’t teach an input matching circuit connected to the gates of the transistors; however, input matching networks are very commonly used in the art to improve power transfer (as shown in US 20220021353 by Han et al. Fig. 9 #T1).
Regarding claim 16, Shkap teaches the electronic device of claim 15, wherein the receiver is configured to output an amplified received analog signal based on an analog signal received from the one or more antennas via the second impedance matching circuit.
Regarding claim 17, Shkap teaches the electronic device of claim 15, wherein the tunable resistor is configured to provide an electrical resistance with a resistance value (Col. 3 lines 2-5) based on one or more control signals from a processor of the electronic device, the one or more control signals being indicative of a resistance value (Fig. 1 #7, 8, 23 vary the resistance and gain; Col. 4 line 12-29).
Allowable Subject Matter
Claims 6-9, 14, and 18-20 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
US 10819303 by Park et al. teaches a gain boosting amplifier with a variable resistor.
US 20090219092 by Kim et al. teaching a differential amplifier circuit with source degeneration.
US 8229367 by Chan et al. teaches an LNA circuit with input matching, transistor pair, and a balun.
US 8576005 by Liao teaches an LNA circuit with a balun, transistor pair, and degeneration inductor winding.
US 6809581 by Rofougaran et al. teaches an LNA with a balun and input transistors with source degeneration.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to NAREH SHAMIRYAN whose telephone number is (703)756-4616. The examiner can normally be reached M-F: 7:00AM-4:00PM PT.
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/NAREH SHAMIRYAN/Examiner, Art Unit 2843
/ANDREA LINDGREN BALTZELL/Supervisory Patent Examiner, Art Unit 2843