DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claims 1-6, 8-17, 19 and 20 are rejected under 35 U.S.C. 103 as being unpatentable over Dunner et al. (US PG Pub 2020/0278426) in view of Jiang et al. (US 6,185,240).
Regarding claim 1, Dunner et al. disclose: a silicon interposer (6008) (Fig. 60, [0182]); an array of resonant cavity mesas (VCSEL array die 6002) monolithically integrated in a set of one or more epitaxial layers and flip-chip bonded to the silicon interposer (Fig. 60, [0038], [0182]), the array of resonant cavity mesas including, a first subset of resonant cavity mesas (VCSELs) connected to a first subset of conductors of the silicon interposer (silicon interposer inherently has conductors) (Fig. 60, [0038], [0182]).
Dunner et al. do not disclose: and biased to a first electrical polarity; and a second subset of resonant cavity mesas connected to a second subset of conductors of the silicon interposer, the second subset of resonant cavity mesas providing electrostatic discharge (ESD) protection for the first subset of resonant cavity mesas.
Jiang et al. disclose: VCSEL (103) connected to a first subset of conductors (terminals 203 and 205) biased to a first electrical polarity and diode (105) connected to a second subset of conductors (terminals 207 and 209) biased to a second electrical polarity and providing electrostatic discharge (ESD) protection for the VCSEL (Figs. 1 and 3, col. 2, line 1-18, col. 4, lines 1-29). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the device of Dunner by forming a second subset of resonant cavity mesas (a plurality of diodes 105) connected to a second subset of conductors and biasing the first subset of resonant cavity mesas to a first electrical polarity and the second subset of resonant cavity mesas to a second electrical polarity in order to provide ESD protection for the VCSEL array.
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Fig. 60 of Dunner
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Figs. 1 and 3 of Jiang
Regarding claim 2, Dunner as modified disclose: the first subset of resonant cavity mesas is forward biased and operable as a set of vertical cavity surface-emitting laser (VCSEL) diodes; and the second subset of resonant cavity mesas is reverse biased (Jiang, Fig. 3, col. 4, lines 1-29).
Regarding claim 3, Dunner as modified disclose: the first subset of resonant cavity mesas is reverse biased and operable as a set of resonant cavity photodetectors (RCPDs) (Dunner discloses photodetectors formed on the silicon interposer) (Dunner, (Fig. 60, [0038], [0182]) ; and the second subset of resonant cavity mesas is forward biased (Jiang, Fig. 3, col. 4, lines 1-29).
Regarding claim 4, Dunner as modified do not explicitly disclose: wherein the silicon interposer has n>2 metal layers.
However, In accordance with MPEP 2144.05 II, Optimization of Ranges: Where the general conditions of a claim are disclosed in the prior art, it is not inventive to discover the optimum or workable ranges by routine experimentation. In the prior art the general conditions are disclosed, an optoelectronic device comprising a silicon interposer having metal layers. Therefore, it would have been obvious to one of ordinary skill in the art at the time of the invention to obtain a workable range of values for the number of metal layers by routine experimentation.
Regarding claim 5, Dunner as modified do not explicitly disclose: the silicon interposer includes a set of metal layers; the first subset of conductors includes conductors disposed in at least a first metal layer of the set of metal layers; and the second subset of conductors includes conductors disposed in at least a second metal layer of the set of metal layers, the second metal layer different from the first metal layer (taught by the device of Dunner as modified, VCSEL and diode are coupled to different sets of conductors, see the rejection of claim 1).
Regarding claim 6, Dunner as modified do not explicitly disclose: wherein a ratio of a first number of resonant cavity mesas in the first subset of resonant cavity mesas to a second number of resonant cavity mesas in the second subset of resonant cavity mesas is other than 1:1.
However, In accordance with MPEP 2144.05 II, Optimization of Ranges: Where the general conditions of a claim are disclosed in the prior art, it is not inventive to discover the optimum or workable ranges by routine experimentation. In the prior art the general conditions are disclosed, an optoelectronic device comprising a first number of resonant cavity mesas and a second number of resonant cavity mesas. Therefore, it would have been obvious to one of ordinary skill in the art at the time of the invention to obtain a workable range of values for the first and second number of resonant cavity mesas by routine experimentation.
Regarding claim 8, Dunner et al. disclose: an array of resonant cavity mesas VCSEL array die 6002) formed on a common substrate and including a first subset of resonant cavity mesas (VCSELs) wherein, a first two or more resonant cavity mesas of the first subset of resonant cavity mesas are electrically biased to a first polarity and are operable as vertical cavity surface-emitting laser (VCSEL) diodes (Fig. 60, [0038], [0182]).
Dunner et al. do not disclose: and a second subset of resonant cavity mesas; and a second two or more resonant cavity mesas of the second subset of resonant cavity mesas are electrically biased to a second polarity and provide electrostatic discharge (ESD) protection for the first two or more resonant cavity mesas; and at least one trench in the common substrate electrically isolating the first subset of resonant cavity mesas from the second subset of resonant cavity mesas.
Jiang et al. disclose: VCSEL (103) connected to a first subset of conductors (terminals 203 and 205) biased to a first electrical polarity and diode (105) connected to a second subset of conductors (terminals 207 and 209) biased to a second electrical polarity and providing electrostatic discharge (ESD) protection for the VCSEL (Figs. 1 and 3, col. 2, line 1-18, col. 4, lines 1-29); and at least one trench (133) in the common substrate (101) electrically isolating the first subset of resonant cavity mesas (103) from the second subset of resonant cavity mesas (105) (Fig. 1, col. 2, lines 42-50). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the device of Dunner by forming a second subset of resonant cavity mesas (a plurality of diodes 105) including a trench and connected to a second subset of conductors and biasing the first subset of resonant cavity mesas to a first electrical polarity and the second subset of resonant cavity mesas to a second electrical polarity in order to provide ESD protection for the VCSEL array.
Regarding claim 9, Dunner as modified disclose: a silicon interposer (6008) (Dunner, Fig. 60, [0182]), the array of resonant cavity mesas (VCSELs) attached to the silicon interposer with the array of resonant cavity mesas disposed between the common substrate and the silicon interposer (see Fig. 60 of Dunner).
Regarding claim 10, Dunner as modified disclose: the first two or more resonant cavity mesas of the first subset of resonant cavity mesas are electrically biased to the first polarity using a first subset of conductors disposed in the silicon interposer; and the second two or more resonant cavity mesas of the second subset of resonant cavity mesas are electrically biased to the second polarity using a second subset of conductors disposed in the silicon interposer (Jiang, Figs. 1 and 3, col. 2, line 1-18, col. 4, lines 1-29).
Regarding claim 11, Dunner as modified disclose: wherein the first subset of conductors is disposed in at least a first metal layer of the silicon interposer that is different from at least a second metal layer of the silicon interposer in which the second subset of conductors is disposed (taught by the device of Dunner as modified, VCSEL and diode are coupled to different sets of conductors, see the rejection of claim 8).
Regarding claim 12, Dunner as modified do not explicitly disclose: wherein a ratio of a number of resonant cavity mesas of the first subset of resonant cavity mesas to a number of resonant cavity mesas of the second subset of resonant cavity mesas is n:1, and n is not equal to 1.
However, In accordance with MPEP 2144.05 II, Optimization of Ranges: Where the general conditions of a claim are disclosed in the prior art, it is not inventive to discover the optimum or workable ranges by routine experimentation. In the prior art the general conditions are disclosed, an optoelectronic device comprising a first number of resonant cavity mesas and a second number of resonant cavity mesas. Therefore, it would have been obvious to one of ordinary skill in the art at the time of the invention to obtain a workable range of values for the first and second number of resonant cavity mesas by routine experimentation.
Regarding claim 13, Dunner as modified do not explicitly disclose: wherein a ratio of a number of resonant cavity mesas of the first subset of resonant cavity mesas to a number of resonant cavity mesas of the second subset of resonant cavity mesas is 1:n, and n is not equal to 1.
However, In accordance with MPEP 2144.05 II, Optimization of Ranges: Where the general conditions of a claim are disclosed in the prior art, it is not inventive to discover the optimum or workable ranges by routine experimentation. In the prior art the general conditions are disclosed, an optoelectronic device comprising a first number of resonant cavity mesas and a second number of resonant cavity mesas. Therefore, it would have been obvious to one of ordinary skill in the art at the time of the invention to obtain a workable range of values for the first and second number of resonant cavity mesas by routine experimentation.
Regarding claim 14, Dunner as modified disclose: wherein the first subset of resonant cavity mesas and the second subset of resonant cavity mesas form a set of forward biased diodes and a set of reverse biased diodes, respectively, connected in parallel and providing a bidirectional transient voltage suppressor (TVS) (taught by the device of Dunner as modified, see the rejection of claim 8).
Regarding claim 15, the apparatus of claim 1 discloses the claimed method (see the rejection of claim 1).
Regarding claim 16, Dunner as modified disclose: wherein the optoelectronic device comprises a system-in-package (SiP) (device of Fig. 60 of Dunner comprises a system-in-package) (Dunner, Fig. 60, [0038], [0182]).
Regarding claim 17, Dunner as modified disclose: further comprising forming at least one trench (133) in the substrate (101), the at least one trench electrically isolating the first subset of resonant cavity mesas (VCSELS 103) from the second subset of resonant cavity mesas (diode 105) (Jiang, Fig. 1, col. 2, lines 42-50).
Regarding claim 19, Dunner as modified disclose: wherein the substrate comprises at least one of gallium arsenide, glass, or ceramic (Jiang, col. 2, lines 20-30).
Regarding claim 20, Dunner as modified disclose: wherein the first subset of vias connects to the first metal layer of the set of metal layers and the second subset of vias connects to the second metal layer of the set of metal layers (inherently taught by the device of Dunner as modified, see the rejection of claim 1).
Claims 7 and 18 are rejected under 35 U.S.C. 103 as being unpatentable over Dunner et al. (US PG Pub 2020/0278426) in view of Jiang et al. (US 6,185,240) and Otoma (US PG Pub 2006/0285567).
Regarding claim 7, Dunner as modified do not disclose: wherein the array of resonant cavity mesas further includes a third subset of resonant cavity mesas connected to the silicon interposer and providing structural support for the first and second subsets of resonant cavity mesas.
Otoma disclose: dummy portions 20 (subset of resonant cavity mesas) (Fig. 3, [0042]). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the device of Dunner as modified by forming a third subset of resonant cavity mesas connected to the silicon interposer in order to further protect the VCSEL array from electrostatic discharge. The device as modified disclose: providing structural support for the first and second subsets of resonant cavity mesas.
Regarding claim 18, Dunner as modified do not disclose: further comprising connecting a third subset of resonant cavity mesas of the array of resonant cavity mesas to a silicon interposer substrate, the third subset of resonant cavity mesas providing structural support for the first and second subsets of resonant cavity mesas.
Otoma disclose: dummy portions 20 (subset of resonant cavity mesas) (Fig. 3, [0042]). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the device of Dunner as modified by forming a third subset of resonant cavity mesas connected to the silicon interposer in order to further protect the VCSEL array from electrostatic discharge. The device as modified disclose: providing structural support for the first and second subsets of resonant cavity mesas.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Lewis et al. (US 7,315,560) disclose: an array of surface emitting laser diodes has a series electrical connection of laser diodes. Junction isolation is used to isolate laser diodes in the array (Abstract). Ilda et al. (US PG Pub 2018/0180827) disclose: a Si photonics device includes: a first semiconductor chip; a second semiconductor chip having a laser diode and mounted on the first semiconductor chip; a third semiconductor chip taking in a laser beam emitted from the laser diode and mounted on the first semiconductor chip; and a resin layer disposed on the first semiconductor chip so as to face the second semiconductor chip. Further, the Si photonics device has: a bump electrode connecting the second semiconductor chip and an upper layer electrode pad provided on the resin layer of the first semiconductor chip; and a bump electrode connecting the first semiconductor chip and the third semiconductor chip, and the second semiconductor chip is mounted on the first semiconductor chip via the resin layer (Abstract).
Any inquiry concerning this communication or earlier communications from the examiner should be directed to XINNING(TOM) NIU whose telephone number is (571)270-1437. The examiner can normally be reached M-F: 9:30am-6:00pm.
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/XINNING(Tom) NIU/Primary Examiner, Art Unit 2828