Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
This action is responsive to the following communications: remarks filed on December 12, 2025.
2. This application has been examined. Claims 1-20 are pending.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
5. Claims 1, 8, 15 are rejected under 35 U.S.C. § 102(a)(1) as being anticipated by Bodas et al. (US Pub No. 2016/0054780).
In regard to claims 1, 8, 15, Bodas et al. disclose a method, a system, a computer system comprising: a system management unit configured to: record (item 402 of figure 4) one or more first operating frequencies of a computing circuitry while executing a first task (as shown in Fig. 4, which is reproduced below for ease of reference and convenience, Bodas discloses the job manager 407 is coupled to an interface 412 to obtain power data for a job. In one embodiment, the power data comprises a node power, a processor power and a memory power for a job. In one embodiment, interface 412 is an IPMI interface. Job manager 407 is coupled to a processor 410 via a storage device 411. In one embodiment, processor 410 is a CPU. In alternative embodiments, processor 410 is a graphics processing unit (GPU), a digital signal processor (DSP), or any other processor. In one embodiment, the processor frequency value is communicated between the job manager 407 and storage device 411. In one embodiment, storage device 411 comprises an operating system (OS) model specific register (MSR) module, or other storage device. In one embodiment, job manager 407 obtains and sets processor register values related to the processor frequency via the OS MSR module. See ¶ 76-77);
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and execute a second task with one or more second operating frequencies, wherein the one or more second operating frequencies are selected for executing the second task based at least in part on the one or more first operating frequencies (in Bodas, the power aware job scheduler and manager are configured to maintain the rate of change of power consumption within predetermined limits. In one embodiment, the power aware job scheduler and manager are configured to maximize consumption of the allocated power and minimize the stranded power. In one embodiment, the power aware job scheduler and manager is configured to reduce power used by idle resources to improve energy efficiency and increase available power for computation. In one embodiment, the power aware job scheduler and manager is configured to deeply examine the job queue to identify and schedule the best candidates to fit within P.sub.SYS to schedule as many jobs as possible. See ¶ 116-117, 119-122).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. § 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art t which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 3-7, 9-14, 16-20 are rejected under AIA 35 U.S.C. § 103 as being unpatentable over Bodas et al. in view of Kaburlasos et al. (US Pub No. 2016/0054782).
In order to expedite and avoid piecemeal prosecution, the following rejection is made to the extent that the claims are understood, by considering those elements which are understood and interpreting their function in a manner which is consistent with the recited goals of the claims, and then applying the best available art.
The examiner relies on the entire teachings of Bodas and Kaburlasos references; the applicant should carefully consider the entire teachings of the above-mentioned references to better understand the examiner’s position.
In regard to claims 2, 9, 16, Bodas et al. disclose the claimed subject matter as discussed above rejection except the teaching of wherein the first task comprises rendering a frame and the second task comprises rendering a frame. In the same field of endeavor, Kaburlosas et al. disclose wherein the first task comprises rendering a frame and the second task comprises rendering a frame (as shown in Fig. 16, which is reproduced below for ease of reference and convenience, Kaburlasos discloses utilization counters are read to determine graphics core or sub-core utilization over the last time interval. In one embodiment, utilization information is recorded during the frame and windows of higher and lower utilization are identified for use in predicting utilization within in subsequent frames. While the utilization counters are read, state information can be read to determine the current position within the set of operations of the frame. See ¶ 139-140).
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It would have been obvious to a person of ordinary skill in the art before the effective filling date of the claimed invention to a person having ordinary skill in the art to modify the teaching of Bodas to include the type of task, as taught by Kaburlasos, in order to provide an efficient power allocation among the tasks.
In regard to claims 3, 11, Kaburlosas et al. disclose wherein system management circuitry is configured to record the one or more first operating frequencies responsive to the computing circuitry operating at a threshold operating frequency when executing each of a plurality of tasks preceding the first task (in Kaburlosas, the utilization 1802 shown for the each sub-core includes the utilization for execution resources, texture processing resources, pixel processing resources, and other resources provided by the sub-core. The exemplary graphics sub-core utilization shown indicates that graphics sub-core (and graphics core) utilization may vary dynamically during a frame. See ¶ 117, 133). It would have been obvious to a person of ordinary skill in the art before the effective filling date of the claimed invention to a person having ordinary skill in the art to modify the teaching of Bodas to include the type of task, as taught by Kaburlasos, in order to provide an efficient power allocation among the tasks.
In regard to claims 4, 18, even though Bodas et al. or Kaburlosas et al. do not disclose wherein responsive to the condition, the system management unit is further configured to disable a power management mode for the computing unit until one or more previously accumulated power credits are consumed by the computing circuitry. However it is merely one of several straightforward possibilities from which the skilled person in the art would wait for the system to stabilize before changing the frequency is a common feature used in the power management system and without the exercise of inventive skill, in order to solve the problem posed.
In regard to claims 5, 12, even though Bodas et al. or Kaburlosas et al. do not disclose wherein the system management unit is further configured to store the recorded one or more first operating frequencies in a data structure, wherein the data structure at least in part stores one or more portions of a frame and corresponding operating frequencies recorded when rendering each portion. However it is merely one of several straightforward possibilities from which the skilled person in the art would implement the use of credit is a common feature used in the power management system and without the exercise of inventive skill, in order to solve the problem posed.
In regard to claims 6, 19, even though Bodas et al. or Kaburlosas et al. do not disclose wherein the system management circuitry is further configured to record a power state associated with the computing circuitry. However it is merely one of several straightforward possibilities from which the skilled person in the art would implement the use of credit is a common feature used in the power management system and without the exercise of inventive skill, in order to solve the problem posed.
In regard to claims 7, 20, Kaburlosas et al. disclose wherein the one or more first operating frequencies are recorded at predetermined periodic intervals (in Kaburlosas, the logic operations are determined for the GPU as a whole, while one embodiment performs the illustrated operations on a per core or sub-core basis. The operations may repeat in regular time intervals ranging from several hundred microseconds to several milliseconds based on factors such as graphics processor type, execution frequency, and graphics workload. The utilization counters are read to determine graphics core or sub-core utilization over the last time interval. […] utilization information is recorded during the frame and windows of higher and lower utilization are identified for use in predicting utilization within in subsequent frames. While the utilization counters are read, state information can be read to determine the current position within the set of operations of the frame. See ¶ 137-139). It would have been obvious to a person of ordinary skill in the art before the effective filling date of the claimed invention to a person having ordinary skill in the art to modify the teaching of Bodas to include the type of task, as taught by Kaburlasos, in order to provide an efficient power allocation among the tasks.
In regard to claims 10, 17, Kaburlosas et al. disclose wherein the one or more first operating frequencies are recorded responsive to identifying, by the system management unit, a change in at least one characteristic associated with the set of tasks, the at least one characteristic comprising at least a frame length (in Kaburlosas, sub-core utilization follows a similar pattern across successive frames, with similar windows of high and low activity. In one embodiment, the pattern of graphics processor utilization observed across a frame is used to predict or to refine predictions of the graphics processor utilization within successive frames. See ¶ 136-138). It would have been obvious to a person of ordinary skill in the art before the effective filling date of the claimed invention to a person having ordinary skill in the art to modify the teaching of Bodas to include the type of task, as taught by Kaburlasos, in order to provide an efficient power allocation among the tasks.
In regard to claim 13, Kaburlosas et al. disclose wherein the one or more second operating frequencies are operating frequencies that were recorded during execution of the first task (in Kaburlosas, the pattern of graphics core utilization within a single frame of graphics operations for a graphics application may be correlated with the pattern of graphics core utilization within successive frames of the same graphics application. The sub-core utilization follows a similar pattern across successive frames, with similar windows of high and low activity. In one embodiment, the pattern of graphics processor utilization observed across a frame is used to predict or to refine predictions of the graphics processor utilization within successive frames. See ¶ 136-137, 145). It would have been obvious to a person of ordinary skill in the art before the effective filling date of the claimed invention to a person having ordinary skill in the art to modify the teaching of Bodas to include the type of task, as taught by Kaburlasos, in order to provide an efficient power allocation among the tasks.
In regard to claim 14, Kaburlosas et al. disclose wherein the one or more first operating frequencies are recorded during a while a power management mode is enabled (in Kaburlosas, utilization counters are read to determine graphics core or sub-core utilization over the last time interval. In one embodiment, utilization information is recorded during the frame and windows of higher and lower utilization are identified for use in predicting utilization within in subsequent frames. While the utilization counters are read, state information can be read to determine the current position within the set of operations of the frame. See ¶ 139-140). It would have been obvious to a person of ordinary skill in the art before the effective filling date of the claimed invention to a person having ordinary skill in the art to modify the teaching of Bodas to include the type of task, as taught by Kaburlasos, in order to provide an efficient power allocation among the tasks.
Examiner's note:
Examiner has cited particular columns and line numbers in the references applied to the claims above for the convenience of the Applicant. Although the specified citations are representative of the teachings of the art and are applied to specific limitations within the individual claim, other passages and figures may apply as well. It is respectfully requested from the Applicant in preparing responses, to fully consider the references in entirety as potentially teaching all or part of the claimed invention, as well as the context of the passages as taught by the prior art or disclosed by the Examiner.
Conclusion
6. All claims are rejected.
7. Any inquiry concerning this communication or earlier communications from the examiner should be directed to examiner Raymond Phan, whose telephone number is (571) 272-3630. The examiner can normally be reached on Monday-Friday from 6:30AM- 4:00PM. The Group Fax No. (571) 273-8300.
Communications via Internet e-mail regarding this application, other than those under 35 U.S.C. 132 or which otherwise require a signature, may be used by the applicant and should be addressed to [raymond.phan@uspto.gov].
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Any inquiry of a general nature or relating to the status of this application should be directed to the TC 2100 central telephone number is (571) 272-2100.
/RAYMOND N PHAN/
Primary Examiner, Art Unit 2175
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