Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Arguments
Applicant’s arguments, see 4th ¶ of page 6, filed 6/05/2026, with respect to Objection of Claims 6, 13 and 20 for informalities have been fully considered and are persuasive. Therefore, the Objection has been withdrawn.
Applicant's arguments, see pages 7-9, with respect to 35 U.S.C. 102 rejection of independent claims have been fully considered but they are not persuasive. In response to applicant’s arguments, see 1st ¶ of page 8, stating that “the office action relies on operations performed by the core storage apparatus 30 not the edge storage apparatus 20, and therefore Saito does not disclose: determining, by the edge device, at least one block of the plurality of blocks in the cache different from the content in the data volume based on the map, wherein the edge device determines the at least one block to send to the target system prior to sending the at least one block to the target system”, the examiner respectfully disagree.
Saito discloses an edge storage apparatus 20 [i.e. the edge device] which performs destaging of dirty data in response to receiving a request from core storage apparatus 30 (Abstract and ¶ 0190). In performing destaging process, dirty data destage program 210 of the edge storage apparatus 20 [i.e. the edge device] firstly determine a dirty data [i.e. at lease one block of the plurality of blocks] stored in the cache (¶ 0052 and ¶ 0054). Furthermore, Saito also discloses that the determination of the dirty data [i.e. at lease one block of the plurality of blocks] is based on stored data identification information 233 / the logical unit identification information 333 [i.e. the map] received from the core storage apparatus 30) (Fig. 3, Fig. 4, ¶ 0064 – 0065, ¶ 0075 and ¶ 0189 – 0190).
Therefore, Saito discloses:
determining, by the edge device / the computer, at least one block of the plurality of blocks in the cache different from the content in the data volume based on the map (i.e. the edge storage apparatus 20 [i.e. the edge device / the computer] may determine a dirty data [i.e. at least one block of the plurality of blocks] in the virtual logical unit 102 of the cache memory 25 [i.e. the cache] based on the logical unit identification information 333 [i.e. the map]; Note that the dirty data is a modified version [i.e. different] of the data [i.e. the content] stored in the logical unit 101 [i.e. the data volume]) (Fig. 3, Fig. 4, ¶ 0064 – 0065, ¶ 0075 and ¶ 0189 – 0190);
wherein the edge device determines the at least one block to send to the target system prior to sending the at least one block to the target system (i.e. dirty data destage program 210 of the edge storage apparatus 20 [i.e. the edge device] may determine a write data / dirty data [i.e. the at least one block] to send to the core storage apparatus 30 [i.e. the target system] before [i.e. prior to] sending it [i.e. the at least one block] to the core storage apparatus 30 [i.e. the target system]) (Fig. 3, ¶ 0052, ¶ 0054).
In response to applicant’s arguments, see last ¶ of page 8, stating that “the fingerprint operations in Wu are performed on the storage system 20a- 20n and therefore Wu does not disclose “wherein the edge device determines the at least one block to send based on determining that a fingerprint of the at least one block is different from predetermined fingerprint of the map”, the examiner respectfully disagree.
In Wu, ¶ 0067 explicitly discloses that when writing a data block to a target logical address, such as to an LBA of a LUN, the data may be stored in the cache 28 [i.e. the edge device] and then later destaged from the cache to backend physical storage 23 [i.e. the target system] (23 & 28 – Fig. 1 and ¶ 0067). So the process of destaging is performed from the cache 28 [i.e. the edge device] to the backend physical storage 23.
Therefore, Wu discloses: wherein the edge device determines the at least one block to send based on determining that a fingerprint of the at least one block is different from predetermined fingerprints of the map (i.e. the cache [i.e. the edge device / the computer] may determine whether the fingerprint of the data block [i.e. the at least one block to send] being destaged from the cache match a fingerprint of the fingerprint of a data block stored in backend physical storage; If there is not already an existing matching entry [i.e. a fingerprint of the at least one block is different from predetermined fingerprints] in the fingerprint hash table [i.e. the map], then it is determined that the data block is a new unique data block, and the new data block is determined to write into [i.e. determines the at least one block to send] a target) (¶ 0067, ¶ 0103 and ¶ 0104).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 1, 3, 5, 8, 10, 12, 15, 17 and 19 is/are rejected under 35 U.S.C. 103 as being unpatentable over Saito et al. (US PG PUB 20130132673), hereinafter "Saito", in views of Wu et al. (US PG PUB 20220012218), hereinafter "Wu".
Regarding Claim1, 8 and 15, Saito discloses:
(Claim 1) A computer-implemented method comprising:
(Claim 8) A system (Fig. 1 and ¶ 0032 - 0033) comprising:
a memory having computer readable instructions (i.e. memory 12, 42, 34 storing program instructions) (Fig. 1 and ¶ 0034 – 0036); and
a computer for executing the computer readable instructions (computer CPUs 22 & 32 for executing program instructions) (22 & 32 – Fig. 1 and ¶ 0033 – 0034), the computer readable instructions controlling the computer to perform operations comprising:
(Claim 15) A computer program product comprising a computer readable storage medium having program instructions embodied therewith (i.e. memory 12, 42, 34 storing program instructions) (Fig. 1 and ¶ 0034 – 0036), the program instructions executable by a computer to cause the computer to perform operations (computer CPUs 22 & 32 for executing program instructions) (¶ 0033 – 0034) comprising:
responsive to an emergency trigger, receiving, by an edge device / the computer, a map from a target system (i.e. responsive to forced destage request [i.e. an emergency trigger], edge storage apparatus 20 [i.e. an edge device / the computer] may receive logical unit identification information 333 [i.e. a map] registered in the forced destage request from core storage apparatus 30 [i.e. a target system]; Note that forced destage requests are issued in order to prevent overflow [i.e. therefore, it is an emergency trigger]) (20 & 30 - Fig. 1, ¶ 0182 and ¶ 0189 – 0190),
the edge device / the computer comprising a cache having a plurality of blocks (i.e. the edge storage apparatus 20 [i.e. the edge device / the computer] includes cache memory 25 storing various data blocks [i.e. a plurality of blocks] each of which corresponding to data identification information 233) (Fig. 5, ¶ 0061 and ¶ 0064),
wherein the map is representative of content in a data volume of the target system (i.e. the logical unit identification information 333 [i.e. the map] indicate address, e.g. logical unit number LUN [i.e. representative], of the data [i.e. content] stored in logical unit 101 [i.e. a data volume] of the core storage apparatus 30 [i.e. the target system]) (101 – Fig. 2, ¶ 0122 and ¶ 0189);
determining, by the edge device / the computer, at least one block of the plurality of blocks in the cache different from the content in the data volume based on the map (i.e. the edge storage apparatus 20 [i.e. the edge device / the computer] may determine a dirty data [i.e. at least one block of the plurality of blocks] in the virtual logical unit 102 of the cache memory 25 [i.e. the cache] based on the logical unit identification information 333 [i.e. the map]; Note that the dirty data is a modified version [i.e. different] of the data [i.e. the content] stored in the logical unit 101 [i.e. the data volume]) (¶ 0065, ¶ 0073 and ¶ 0189 - 0190);
wherein the edge device determines the at least one block to send to the target system prior to sending the at least one block to the target system (i.e. dirty data destage program 210 of the edge storage apparatus 20 [i.e. the edge device] may determine a write data / dirty data [i.e. the at least one block] to send to the core storage apparatus 30 [i.e. the target system] before [i.e. prior to] sending it [i.e. the at least one block] to the core storage apparatus 30 [i.e. the target system]) (Fig. 3, ¶ 0052, ¶ 0054); and
sending, by the edge device / the computer, the at least one block in the cache to the target system, responsive to the emergency trigger (i.e. upon receipt of the forced destage request [i.e. responsive to the emergency trigger], the edge storage apparatus 20 [i.e. the edge device / the computer] destage [i.e. sending] the dirty data [i.e. the at least one block] in the virtual logical unit 102 of the cache memory 25 [i.e. the cache] to the core storage apparatus 30 [i.e. the target system]) (¶ 0054 and ¶ 0190).
However, Saito does not explicitly disclose:
wherein the edge device determines the at least one block to send based on determining that a fingerprint of the at least one block is different from predetermined fingerprints of the map.
On the other hand, in the same field of endeavor, Wu teaches:
wherein the edge device determines the at least one block to send based on determining that a fingerprint of the at least one block is different from predetermined fingerprints of the map (i.e. the cache [i.e. the edge device / the computer] may determine whether the fingerprint of the data block [i.e. the at least one block to send] being destaged from the cache match a fingerprint of the fingerprint of a data block stored in backend physical storage; If there is not already an existing matching entry [i.e. a fingerprint of the at least one block is different from predetermined fingerprints] in the fingerprint hash table [i.e. the map], then it is determined that the data block is a new unique data block, and the new data block is determined to write into [i.e. determines the at least one block to send] a target) (¶ 0067, ¶ 0103 and ¶ 0104).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the method/system/computer readable medium of Saito to include wherein the edge device determines the at least one block to send based on determining that a fingerprint of the at least one block is different from predetermined fingerprints of the map as taught by Wu in order to destage the data blocks from the cache to the physical storage based on matching the finger print associated with the data blocks (¶ 0067, ¶ 0103 and ¶ 0104).
Regarding Claims 3, 10 and 17 Saito and Wu disclose, in particular, Wu teaches:
wherein the edge device is configured to utilize an algorithm to compare the cache to the content in the data volume based on the map (i.e. based on target logical address, e.g. LBA or LUN [i.e. based on the map], cache [i.e. the edge device / the computer] may utilize one or more processes [i.e. an algorithm] to determine whether the fingerprint of the data block being destaged from the cache match [i.e. compare the cash to] a fingerprint of the fingerprint of a data block [i.e. the content] stored in backend physical storage [i.e. the data volume]) (¶ 0067, ¶ 0085 and ¶ 0088).
The prior art used in the rejection of the current claim is combined using the same motivations as was applied in claim 1, 8 and 15.
Regarding Claims 5, 12 and 19 Saito discloses:
wherein the determining the at least one block of the plurality of blocks in the cache is utilized to avoid sending other blocks of the plurality of blocks to the target system, responsive to the emergency trigger (i.e. in response to the forced destage request [i.e. responsive to the emergency trigger], the edge storage apparatus 20 [i.e. the edge device] determines a particular dirty data [i.e. at least one block of the plurality of blocks in the cache] as a modified version of the data stored in corresponding address of the logical unit 101 [i.e. the target system]; such determination is made in order to send only the relevant dirty data [i.e. avoid sending other blocks of the plurality of blocks] that corresponds to the one already stored in the logical unit 101 [i.e. the target system]) (¶ 0189 – 0190 and ¶ 0200).
Claim(s) 2, 9 and 16 is/are rejected under 35 U.S.C. 103 as being unpatentable over Saito in views of Wu as applied to claims 1, 8 and 15 above, and further in view of Agombar et al. (US PG PUB 20170351615), hereinafter "Agombar".
Regarding Claims 2, 9 and 16 Saito and Wu disclose all the features with respect to Claims 1, 8 and 15 as described above.
However, the combination of Saito and Wu does not explicitly disclose:
wherein the edge device / the computer receives an algorithm associated with the map.
On the other hand, in the same field of endeavor, Agombar teaches:
wherein the edge device / the computer receives an algorithm associated with the map (i.e. cache appliance 310 [i.e. the edge device / the computer] may receive input utilization model [i.e. algorithm] associated with destaging of the data occupying a data volume represented with Logical Unit Number LUN [i.e. the map]) (310 – Fig. 3, ¶ 0033, ¶ 0041 and ¶ 0063).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the method/system/computer readable medium of Saito and Wu to include wherein the edge device / the computer receives an algorithm associated with the map as taught by Agombar in order to track resource utilization associated with cache operations (310 – Fig. 3, ¶ 0033, ¶ 0041 and ¶ 0063).
Claim(s) 6, 13 and 20 is/are rejected under 35 U.S.C. 103 as being unpatentable over Saito in views of Wu as applied to claims 1, 8 and 15 above, and further in view of Lee et al. (US PG PUB 20030229767), hereinafter "Lee".
Regarding Claims 6, 13 and 20, Saito and Wu discloses all the features with respect to Claims 1, 8 and 15 as described above.
However, the combination of Saito and Wu does not explicitly disclose:
wherein at least one updated pointer corresponding to one block of the plurality of blocks is sent to the target system, the at least one updated pointer identifying the content previously stored in the target system for the one block.
On the other hand, in the same field of endeavor, Lee teaches:
wherein at least one updated pointer corresponding to one block of the plurality of blocks is sent to the target system (i.e. metadata controller 20 issues/sends a destage request including the pointer [i.e. at least one updated pointer] corresponding to the data block_215 [i.e. one block of the plurality blocks] to data mover 30 [i.e. the target system], wherein the metadata controller updates the metadata comprised of the pointer to reflect the location of the destaged data blocks [i.e. in other words, pointer is updated]) (Fig. 4, ¶ 0038, ¶ 0046 and ¶ 0057),
the at least one updated pointer identifying the content previously stored in the target system for the one block (i.e. multiple versions of the data block [i.e. the content previously stored in the target system] may be identified by the pointer [i.e. the at least one updated pointer]) (¶ 0039 and ¶ 0057).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the method/system/computer readable medium of Saito and Wu to include wherein at least one updated pointer corresponding to one block of the plurality of blocks is sent to the target system, the at least one updated pointer identifying the content previously stored in the target system for the one block as taught by Lee so that data blocks may be moved from cache to storage location based on the metadata that points locations of the data blocks (¶ 0039 and ¶ 0057).
Claim(s) 7 and 14 is/are rejected under 35 U.S.C. 103 as being unpatentable over Saito in views of Wu as applied to claims 1 and 8 above, and further in view of Yuasa et al. (US PG PUB 20140317436), hereinafter "Yuasa".
Regarding Claims 7 and 14, Saito and Wu disclose all the features with respect to Claims 1 and 8 as described above.
In addition, Saito further teaches:
wherein: the sending the at least one block in the cache to the target system causes the target system to store the at least one block without validating a fingerprint for the at least one block (i.e. the edge storage apparatus 20 [i.e. cache] destages/sends the dirty data [i.e. the at least one block in the cache] corresponding to the cache management entry 231 selected in step SP830 to the core storage apparatus 30 [i.e. the target system]; Then, the dirty data is written into logical unit 101 of the core storage apparatus 30 [i.e. the target system stores the at least one block]; Note that the core storage apparatus 30 stores the data without going through any validation procedure [i.e. without validating a fingerprint for the at least one block]) (Fig. 13, ¶ 0138 - 0139).
However, the combination of Saito and Wu does not explicitly disclose:
the emergency trigger occurs responsive to a power failure at the edge device / the computer such that the edge device / the computer requires backup power.
On the other hand, in the same field of endeavor, Yuasa teaches:
the emergency trigger occurs responsive to a power failure at the edge device / the computer such that the edge device / the computer requires backup power (i.e. in response to the power failure determination register 16d indicating activation associated with transition from the memory backup mode to the cache destage mode [i.e. responsive to a power failure at the edge device] such that the cache [i.e. the edge device] is being operated on battery/backup power [i.e. the edge device requires backup power], the CPU 11 executes the cache destage processing [i.e. the emergency trigger occurs], and writes the cache data from the cache memory 12 into the non-volatile memory 13) (¶ 0007 and ¶ 0112 - 0113).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the method/system/computer readable medium of Saito and Wu to include wherein the emergency trigger occurs responsive to a power failure at the edge device / the computer such that the edge device / the computer requires backup power as taught by Yuasa in order to avoid loss of data during a power failure (¶ 0007 and ¶ 0112 - 0113).
Conclusion
THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
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/Soe Hlaing/ Primary Examiner, Art Unit 2451
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